JPS62149139A - Formation of thin insulating film - Google Patents
Formation of thin insulating filmInfo
- Publication number
- JPS62149139A JPS62149139A JP28989385A JP28989385A JPS62149139A JP S62149139 A JPS62149139 A JP S62149139A JP 28989385 A JP28989385 A JP 28989385A JP 28989385 A JP28989385 A JP 28989385A JP S62149139 A JPS62149139 A JP S62149139A
- Authority
- JP
- Japan
- Prior art keywords
- film
- insulating film
- thin
- pinholes
- gate insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はＭＩＳ Ｌ、９Ｉのゲート絶縁膜の形成方法
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a gate insulating film for MISL, 9I.
「発明の概要」
本発明は、薄い絶縁膜の形成方法に関し、ｖｒ工、５Ｌ
ＳＩのゲート絶縁膜を形成するに当り、シリコン上には
薄いシリコン窒化膜を形成後、酸化処理をする事を特徴
とする。"Summary of the Invention" The present invention relates to a method for forming a thin insulating film,
In forming a gate insulating film for SI, a thin silicon nitride film is formed on silicon and then oxidation treatment is performed.
（従来の技術〕
従来、ＶＩ日 ＬＳＩのゲート絶縁膜をシリコンを熱酸
化して得るのが通例であった。(Prior Art) Conventionally, it has been customary to obtain a gate insulating film for an LSI by thermally oxidizing silicon.
〔発明が解決しようとする問題点及び目的〕しかし、上
記従来技術によるとゲート絶縁膜を２ｎｏＸ以下にする
には、熱生ｂｌｔｓｉｏ、膜のピンホールが増大すると
いう問題点があった、本発明は、かかる従来技術の問題
点を解決し、ピンホールの無い薄いゲート絶縁膜を得る
方法を提供する事を目的とする。[Problems and Objectives to be Solved by the Invention] However, according to the above-mentioned conventional technology, in order to reduce the gate insulating film to 2NOX or less, there was a problem that thermal generation bltsio and pinholes in the film increase. The object of the present invention is to solve the problems of the prior art and provide a method for obtaining a thin gate insulating film without pinholes.
上記問題点を解決するための本発明の手段基本的な構成
は、シリコン上には薄いシリコン窒化膜を形成後、熱酸
化処理することを特徴とする。The basic structure of the present invention for solving the above problems is characterized in that a thin silicon nitride film is formed on silicon and then subjected to thermal oxidation treatment.
以下、実施例により本発明を詳述する。 Hereinafter, the present invention will be explained in detail with reference to Examples.
第１図は本発明の一実施例を示す薄い絶縁膜の形成工程
図である。すなわち、（ａ）ＳｉＩ上にＳｉ、Ｎ４膜２
ｔ−１２００℃のアンモニア雰囲気中で熱窒化するか、
あるいは、ＯＶＤ法でデポジションするかして５０１乃
至１００人形成し、該Ｓｉ３Ｎ４膜２にピンホール３が
ある。（ｂ）次でＢ Ｓ１３ Ｎ４模を形成したＳｌを
＋ｏｎｎ℃程度の酸臭雰囲気中で熱酸化することにより
、前記ピンホール５内に５１０２膜４を形成する。FIG. 1 is a process diagram for forming a thin insulating film showing an embodiment of the present invention. That is, (a) Si, N4 film 2 on SiI
thermal nitriding in an ammonia atmosphere at t-1200°C, or
Alternatively, 501 to 100 layers are formed by deposition using the OVD method, and the pinhole 3 is formed in the Si3N4 film 2. (b) Next, the 5102 film 4 is formed in the pinhole 5 by thermally oxidizing the Sl on which the B S13 N4 pattern has been formed in an acidic atmosphere at about +onn°C.
尚、５１３Ｎ４膜４ （ｊ Ｏｘｙ Ｎ１ｔｒｉｄｅと
してＳｉ、Ｎ４とＳ１０．が混合した膜でも艮く、この
場会には薄いＳ１０．膜が該膜上に、熱酸化膜に形成さ
れることとなる。Note that the 513N4 film 4 (jOxyN1tride may be a film in which Si, N4, and S10. are mixed); in this case, a thin S10. film is formed as a thermal oxide film on the film.
本発明により、ピンホールのない薄い絶縁膜が各局に形
成できる効果があると共に、例えばダイナミックＭＯ８
ＲＡＭのｔ荷蓄積容量部に不膜を用いると、Ｓｉ３Ｎ４
の誘電率が１２と、Ｓ１０．の９よりも普く、小面積で
大容量が得られる効果もある。According to the present invention, a thin insulating film without pinholes can be formed at each station, and, for example, a dynamic MO8
If a non-film is used in the t-load storage capacitor of the RAM, Si3N4
has a dielectric constant of 12, and S10. It is more popular than 9, and has the effect of providing a large capacity in a small area.
第１１ゾｌ （ａ）（ｂ）は本発明の一実施例を示す薄
い絶縁膜の形成工程断面図である。
１ ・・・ Ｂ１
２・・・８１．Ｎ４
３・・・ピンホール
４ ・・・ＳｉＯ
以 上No. 11 (a) and (b) are cross-sectional views showing a process for forming a thin insulating film, showing an embodiment of the present invention. 1...B1 2...81. N4 3...Pinhole 4...SiO or more
Claims (1)
ン上には薄いシリコン窒化膜を形成後熱酸化処理をする
事を特徴とする薄い絶縁膜の形成方法。A method for forming a thin insulating film, which is characterized in that when forming a gate insulating film for MISLSI, a thin silicon nitride film is formed on silicon and then subjected to thermal oxidation treatment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28989385A JPS62149139A (en) | 1985-12-23 | 1985-12-23 | Formation of thin insulating film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28989385A JPS62149139A (en) | 1985-12-23 | 1985-12-23 | Formation of thin insulating film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62149139A true JPS62149139A (en) | 1987-07-03 |
Family
ID=17749130
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28989385A Pending JPS62149139A (en) | 1985-12-23 | 1985-12-23 | Formation of thin insulating film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62149139A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5913149A (en) * | 1992-12-31 | 1999-06-15 | Micron Technology, Inc. | Method for fabricating stacked layer silicon nitride for low leakage and high capacitance |
-
1985
- 1985-12-23 JP JP28989385A patent/JPS62149139A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5913149A (en) * | 1992-12-31 | 1999-06-15 | Micron Technology, Inc. | Method for fabricating stacked layer silicon nitride for low leakage and high capacitance |
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