JPS62147913U - - Google Patents

Info

Publication number
JPS62147913U
JPS62147913U JP3542486U JP3542486U JPS62147913U JP S62147913 U JPS62147913 U JP S62147913U JP 3542486 U JP3542486 U JP 3542486U JP 3542486 U JP3542486 U JP 3542486U JP S62147913 U JPS62147913 U JP S62147913U
Authority
JP
Japan
Prior art keywords
input terminals
trimming
circuit
blown
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3542486U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3542486U priority Critical patent/JPS62147913U/ja
Publication of JPS62147913U publication Critical patent/JPS62147913U/ja
Pending legal-status Critical Current

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Landscapes

  • Oscillators With Electromechanical Resonators (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図および第２図は第１実施例を示し、第１
図はその時計回路のブロツク回路図、第２図は入
力回路、発振回路の詳細回路図、第３図は第２実
施例の詳細回路図である。 １……発振回路、２……分周回路、３……計時
回路、６―１，６―２，６―３……ラツチ回路、
９……デコーダ、１５……ボルテージレギユレー
タ、ＢＬＣ，Ｂ１，Ｂ２，Ｂ３，Ｔ１……端子、
Ｆ１，Ｆ２，Ｆ３……ヒユーズ。 Figures 1 and 2 show a first embodiment;
The figure is a block circuit diagram of the clock circuit, FIG. 2 is a detailed circuit diagram of the input circuit and oscillation circuit, and FIG. 3 is a detailed circuit diagram of the second embodiment. 1... Oscillation circuit, 2... Frequency dividing circuit, 3... Timing circuit, 6-1, 6-2, 6-3... Latch circuit,
9...Decoder, 15...Voltage regulator, BLC, B1, B2, B3, T1...Terminal,
F1, F2, F3... Hughes.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の入力端子と、この複数の入力端子に接続
され上記複数の入力端子からの電圧によつて溶断
されるヒユーズ溶断型ＰＲＯＭ（プログラムリー
ドオンリメモリ）と、このヒユーズ溶断型ＰＲＯ
Ｍによつてトリミング制御される電子回路とを有
することを特徴とするトリミング装置。 A fuse blowing type PROM (program read only memory) which is connected to the plurality of input terminals and is blown by the voltage from the plurality of input terminals;
A trimming device comprising an electronic circuit whose trimming is controlled by M.
JP3542486U 1986-03-13 1986-03-13 Pending JPS62147913U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3542486U JPS62147913U (en) 1986-03-13 1986-03-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3542486U JPS62147913U (en) 1986-03-13 1986-03-13

Publications (1)

Publication Number Publication Date
JPS62147913U true JPS62147913U (en) 1987-09-18

Family

ID=30844902

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3542486U Pending JPS62147913U (en) 1986-03-13 1986-03-13

Country Status (1)

Country Link
JP (1) JPS62147913U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5473672A (en) * 1977-11-25 1979-06-13 Seiko Epson Corp Electronic watch
JPS5486252A (en) * 1977-12-21 1979-07-09 Seiko Epson Corp Oscillation circuit
JPS58205886A (en) * 1982-05-25 1983-11-30 Seiko Instr & Electronics Ltd Electronic timepiece

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5473672A (en) * 1977-11-25 1979-06-13 Seiko Epson Corp Electronic watch
JPS5486252A (en) * 1977-12-21 1979-07-09 Seiko Epson Corp Oscillation circuit
JPS58205886A (en) * 1982-05-25 1983-11-30 Seiko Instr & Electronics Ltd Electronic timepiece

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