JPS62147487A - Graphic pattern generator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a graphic pattern generator for projecting symbols, etc. on the screen of a scanning video display device such as a television, and more particularly, relates to a graphic pattern generator for projecting symbols, etc. on the screen of a scanning video display device such as a television, and more specifically, for generating symbol pattern data, colors, etc. The present invention relates to a graphic pattern generation device configured to specify addresses of both symbol pattern data and modification data based on output data of a video memory.

<Prior Art> A graphic pattern generator that projects symbols, etc. on a screen such as a television generally has a character memory that stores data such as symbols (hereinafter referred to as symbol pattern data), and an address for the length of the character memory. A video memory that stores specified address data. Conventionally, such graphic pattern generators have symbols on the screen? When displaying f, the addresses of the pattern data stored in the character memory are stored in the video memory in the order of display.
Address data stored in the video memory is sequentially read out based on a clock signal synchronized with a horizontal synchronization signal, and symbol pattern data in the character memory is output based on this address data.

<Problems to be solved by this invention> However,
In such conventional graphic pattern generators, only the symbol pattern data stored in the character memory is specified depending on the address data of the video memory, so the color of the symbols, etc. displayed on the screen cannot be changed. Alternatively, specifying the size requires a separate circuit, which complicates the circuit configuration and also makes it difficult to develop software.

<Means for Solving the Problems> The graphic pattern generating device according to the present invention has been made in view of the above problems, and stores pattern data representing the image pattern of an image and control data representing the appearance requirements of the image in a character memory. At the same time, the pattern data of the character memory and the address data specifying the address of the control data are stored in the video memory in a predetermined order, and the address data is read out in a predetermined order according to the control signal. It is configured to output pattern data and control data specified by address data.

<Operation> According to the graphic pattern generation device according to the present invention, pattern data representing an image of a video, an image pattern, and control data representing appearance requirements of the video pattern are stored in the character memory, and a constant j@ is stored in the character memory. Both pattern data and control data are specified and output based on the address data read out in the sequence. Therefore, there is no need to provide a separate circuit for specifying visual requirements such as color, size, position, etc. to describe the video pattern, and software for displaying the video does not become complicated.

<Example> Embodiments of the present invention will be described below based on the drawings.

The drawing is a block diagram showing one embodiment of a graphic pattern generator according to the present invention.

In the drawing, (11) is a video memory, and the video memory (11) has address data (11) representing the address of data stored in the character memory (described later).
Ao) are stored in a certain order, and line feed data indicating the end of the read line (Ao) is also stored. This video memo! J (11) is the video memory address pointer (
(Hereinafter, abbreviated as address pointer) (12) Address data (AO) of one address is read out j & primary in the above fixed order in synchronization with the signal (control signal) input from (12) and output to the decoder (13) be done. Decoder (1
3) outputs line feed data to the address pointer (12) based on the input address data (Ao), and also outputs the first line feed data to the pattern memory area and control data memory area of the character memory (14), which will be described later. Character memory address data (AI) and second character memory address (A2) are output.

The line feed data input to the address pointer (12) is
While the horizontal synchronization signal is counted up to the last one for each row, the data in the video memory address stack (hereinafter abbreviated as address stack) (15) is used as the address pointer! : It is a signal that commands you to get into it, but
When the last horizontal synchronization signal for each line is counted, the address next to the line feed data of the line currently being rewritten is transferred from the address pointer (12) to the address stack (15).
) is a command signal to write to.

Character memo! j (14) is a pattern memory area (16) in which pattern data (V, ) representing the figure/pattern of the video is stored, and control data representing appearance requirements such as size, screen display position, color, etc. regarding the figure/pattern. (V,) is stored in the control data memory area (17).

Pattern memory area (16) Fi,, the address of the pattern data (■,) is specified by the input first character memory address data (As), and the pattern data (V,) of the address is output, and similarly, The control data memory area (17) specifies the address of the control data (Vc) by the input second character memory address data (A2) and outputs the control data (VC) at the address. These pattern data (V, ) and control data (Vc) are output to the decoder (18), and the pattern data (V p ) is stored in the pattern buffer (19) via the decoder (18). (■e) passes through the decoder (18) to the control buffer (20) K
Stored. The pattern data (V,) stored in the pattern buffer y (19) is transferred to the shift register (21) at a predetermined timing, and then transferred to this shift register (21).
21) is output in synchronization with a clock signal synchronized with the horizontal synchronization signal. Also, the control buffer (20)
The control data (VC) stored in is transmitted to each circuit before the pattern data (VP) to be expressed is output from the shift register (21).

Such a graphic pattern generator generates pattern data (
V, )k While being shifted out from the shift register (21), the video data (■) output from the character memory (14) is converted into pattern data (V, ) and control data (Vc) by the decoder (18). Pattern buffer (19) and control buffer (2)
0).

For example, when displaying up to 16 characters on the screen of a scanning video display device, it takes 3 to shift and mount 1 data from the normal pattern data (Vp) t-shift register (21).
．． Since it requires 3 [μ organs], the video data (V
,) is set within 2.2 [μ].

And in this graphic pattern generator.

Pattern data (V, ) and control data CVC) are stored in the character memory (14), and these pattern data (VP) and control data (Vc) are used as address data (A) output from the video memory (11).
character memory (14) with address specified by o)
Since the configuration is configured to output from
The software does not become complicated, and it becomes easier to specify the appearance requirements of patterns such as color.

<Effects of the Invention> As explained above, according to the graphic pattern generation device according to the present invention, control data is stored together with pattern data in the character memory, and these pattern data and control data are output from the video memory. Since addresses are specified and output using address data, there is no need to provide additional circuits to specify appearance requirements such as color, and the software does not become complicated.
Descriptive requirements can be easily specified.

[Brief explanation of drawings]

The drawing is a block diagram showing an embodiment of a graphic pattern generator according to the present invention. 11...Video memory, 12...Video memory address pointer, 13.18...Decoder, 14...Character memo 1c 16......
Pattern memory area, 17...Control data memory area, Ao...Address data, 戊...
...First character memory address data, A,...
...Second character memory address data,■.
...Video data, ■, ...Pattern f-1,
V. ...Control data.

Claims (1)

[Claims] Video data for displaying video is stored in a character memory, and address data specifying the address of the video data is stored in a predetermined order in the video memory, and the address data is read out in a predetermined order in response to a control signal to determine the address. In a graphic pattern generation device that sequentially outputs video data specified by data, pattern data representing a video pattern and control data representing appearance requirements of the video pattern are stored as video data in the character memory, and these pattern data and control data specified by the address data and sequentially output.