JPS62146015A - Level converting circuit - Google Patents

Abstract

PURPOSE:To attain interface easily without requiring a level converting device or the like whose power consumption is relatively high, by using the terminal voltage of an ECL circuit from its output to obtain a TTL output in the side of a positive power source. CONSTITUTION:Since an external circuit having a transistor TR Q4 is added to the output of an ECL device, the TR Q4 is made conductive and a level approximating a terminal voltage VT is generated in its collector output by the voltage drop of a resistance R4 when the output level of the ECL is high. However, the low level of a TTL of the positive power source is generated actually by clamping of a diode D1. When the output level of the ECL is low, the TR Q4 is cut off completely and an output voltage V0 approximates a positive supply power Vcc to generate the high level of the TTL. Though each TLL output level obtained in this manner is not always a regular TTL level, it has a practically sufficient characteristic when a light-load device is driven, and the power consumption is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a level conversion circuit that obtains the input level of a TTL circuit from the output level of an ECL circuit.

[Conventional technology]

The ECL logic circuit is a typical circuit for forming rapid logic, and devices with 6-way functions have been commercialized using standard products such as SS engineering, and recently, LSIs configured with ECL, Gate arrays have also appeared as semi-custom products.

Normally, these devices employ an ECL interface for the input/output section in order to take advantage of their high speed, and the output section has an emitter follower configuration with an open emitter.

With this ECL interface, all the systems to be configured are unified with the ECL logic, and other TTL
Alternatively, if devices such as CMO8 are not used, it is extremely effective and the fastest system can be configured, but such examples are limited to computer mainframes, and general logical devices require the latest microcomputer control and With the trend toward semiconductor memory implementation, multiple interface levels are required.

In other words, the high-speed operation part of the device is constructed with ECL, the control part is controlled by a standard microprocessor, etc., and the memory part is a standard semiconductor memory product that is cheap in terms of cost. However, these standard products currently have input/output interfaces at the most common TTL or CA408 level.

Therefore, as the degree of integration increases even in parts designed with ECL, it becomes difficult to isolate the logic in a form that completely separates the interface level, and even in one ECL device, several input/output terminals are required. TTL or CM
It becomes necessary to perform input or output at the OS level.

Conventionally, the means for establishing these interfaces is TT.
Level conversion ICs from L level to ECL level and vice versa are standard products, and these are widely used.

FIG. 1 shows a typical circuit example of an ECL to TTL level conversion circuit used inside these ICs. G
The ECL level input to the ECL circuit configured between the ND potential and the negative power source VER is configured between the GND potential and the positive power source VCC by the current switch output obtained from the collector output of the transistor Q2. The on/off control of the TTL output circuit is performed, and a TTL level output is obtained at the output terminal o.

[Problem that the invention seeks to solve]

Standard level conversion ICs usually have several of these basic circuits built-in, and their output section is the standard T'r.
Since it has the same configuration as the L circuit, it has a complete TTL interface and has sufficient driving ability, so it is effective when driving regular TTL standard products.

However, high-speed ECL devices are often used together with microprocessors or memory devices based on CMO8 or NMOS processes that have a TTL interface, as described above, rather than so-called standard TTL devices, and because their load is light, they do not necessarily provide accurate TT.
In many cases, the same level and driving ability as L is not required.

Standard level conversion IC with the circuit configuration shown in Fig. 2
The operating speed and drive capacity are both higher than necessary,
On the other hand, power consumption is high; for example, even if you only want to use one circuit, the power for several circuits is always consumed.
The drawback was that it was inefficient.

[Means for solving problems]

The purpose of the present invention is to provide a level conversion circuit 'IC' that consumes less power and can obtain a practically sufficient TTL or CMOS level by adding an external circuit with an hour wheel configuration to the output of an ECL device. be.

The configuration of the present invention is such that the emitter is connected to the first terminal source, the collector is connected to the second positive power source through the first resistor, and the base is connected to the second positive power source through the third resistor. Connect the emitter-lower output of the ECL@buried circuit operated with the first negative power supply to the base of the first NPN transistor connected to the termination power supply, and connect the collector of the -0th NPN transistor! l) , '+E' TTL operating on til source
This is a level conversion circuit characterized by obtaining a signal level that allows the circuit to operate over an OT.

〔Example〕

FIG. 1 is a diagram showing a specific embodiment of the present invention.

Transistors Q1 to Q8, resistors R1 to Rs and current y
jJ and It form an ECL logic circuit, and the output obtained at the emitter of Q3 is normally connected to a terminal voltage vT of about -2V through a resistor of about 500V.

The present invention actively utilizes this termination voltage vT to obtain a TTL output on the positive power supply side.

That is, when the output level of ECL is high, transistor Q4 becomes conductive and its collector output is connected to resistor R.
A voltage drop of 4V generates a level close to vT, but it is actually clamped by the diode D, resulting in a voltage of approximately -0.8V, generating a TTL low level of the positive power supply.

Next, when the output level of ECL is low, the emitter potential of transistor Q3 is approximately -1.8V, so transistor Q4 is completely cut off, and the output voltage v0 becomes almost the positive power supply VCC, generating a TTL high level. do. Although each TTL output level obtained by the above is not necessarily a regular TTL level, the microprocessor,
It has practically sufficient characteristics when driving a TTL level input of a memory or a device with a TTL load. Note that the resistor R5 is for setting the bias current of the transistor Q3. Transistor Q4 is completely unsaturated, so the conversion speed is high, and the power supply voltage V
Stable operation is possible over a wide range of CC1 termination voltage ■T.

In the embodiment shown in FIG. 1, a resistor R is inserted into the emitter of transistor Q4 to adjust the bias current for saturation control of transistor Q, but even if this resistor is inserted at the base of transistor Q4, the same result will be obtained. It is obvious that this will have an effect.

〔Effect of the invention〕

As is clear from the above explanation, according to the present invention, the termination voltage V
By adding a simple circuit to the output of an ECL circuit using -r, a practically sufficient TTL output level of a positive power supply can be obtained with low power consumption. The effect is great because there is no need for a level conversion device or the like which consumes relatively large amount of power when driving the device, and the interface can be easily established.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a specific embodiment of the present invention, and FIG. 2 is a diagram showing an example of a conventional ECL-+TTL level conversion circuit. Q1 to Q6...Transistor, R,%R,...
...Resistance, D, ...Diode, ■, ...
...Radio wave source, vl...Input terminal, vo...
...Output terminal, VCC...Positive power supply, vBB
・・・・・・Negative power supply, ■〒・・・・・・Terminal power supply, vR
EF...Reference source terminal. Agent Patent Attorney Uchihara Bi bur-e Yu f Figure L/EE Figure Z

Claims (1)

[Claims] The emitter is connected to a first terminating power source, the collector is connected to a first positive power source via a second resistor, and the base is connected to the first terminating power source via a third resistor. Connecting the emitter follower output of an ECL logic circuit operating with a first negative power supply to the base of the first NPN transistor,
A level conversion circuit characterized in that a signal level capable of driving a TTL circuit operating on a positive power source is obtained from the collector of the first NPN transistor.