JPS62145720A - Manufacture of single crystal thin film - Google Patents

Manufacture of single crystal thin film

Info

Publication number
JPS62145720A
JPS62145720A JP28543785A JP28543785A JPS62145720A JP S62145720 A JPS62145720 A JP S62145720A JP 28543785 A JP28543785 A JP 28543785A JP 28543785 A JP28543785 A JP 28543785A JP S62145720 A JPS62145720 A JP S62145720A
Authority
JP
Japan
Prior art keywords
single crystal
thin film
film
crystal thin
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28543785A
Other languages
Japanese (ja)
Inventor
Katsunori Mihashi
克典 三橋
Hiroi Ootake
大竹 弘亥
Takahiro Imai
高広 今井
Toshiaki Miyajima
利明 宮嶋
Koji Shiozaki
宏司 塩崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP28543785A priority Critical patent/JPS62145720A/en
Publication of JPS62145720A publication Critical patent/JPS62145720A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a method for recrystallization which has a high stability against fluctuation of a laser beam or the like and against delicate variation of a sample structure by a method wherein an energy beam or heat of a lamp, a heater or the like is applied to a belt-shape polycrystalline thin film covering the recessed part of a non-single crystal thin film. CONSTITUTION:Steps 16a and 16b for control of grain boundary are formed on the surface of a smoothened layer insulating film 15 at the positive which are the two edges of a region to be single-crystallized as protruded patterns with the distance of 10-100mum between the steps in the direction parallel to the beam scanning direction. It is to be noted that the height of the unevenness formed at that time is 0.1-2mum and, most preferrably, 0.4-0.5mum. A polycrystalline silicon film 17 which is to be an active layer and a silicon oxide layer 18 are formed successively on the whole surface and a laser beam 20 is applied and made to scan along the stripe-shape steps to melt, solidify and single-crystallize the polycrystalline silicon film 17 between the step protrusions 16a and 16b.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明は半導体装置を製造する分野で利用される単結晶
薄膜の形成方法に関し、さらに詳細には非晶質絶縁下地
上に形成した非晶質あるいは多結晶等の非単結晶薄膜に
エネルギービームを照射したり、ヒータやランプ等で加
熱して、非単結晶薄膜を単結晶化する方法の改良に関す
るものである。
[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a method for forming a single crystal thin film used in the field of manufacturing semiconductor devices, and more specifically relates to a method for forming a single crystal thin film formed on an amorphous insulating base. This invention relates to improvements in methods for converting non-single-crystalline thin films into single crystals by irradiating them with an energy beam or heating them with heaters, lamps, etc.

〈従来技術〉 従来より、結晶性を有しない絶縁膜の上に非晶質あるい
は多結晶等の非単結晶薄膜を形成し、この非単結晶薄膜
にエネルギービーム照射を行ったり、ヒータやランプ等
による加熱を行って溶融再結晶化させることにより単結
晶薄膜を作製する方法が各種提案されている。
<Prior art> Conventionally, an amorphous or polycrystalline non-single crystal thin film is formed on an insulating film that does not have crystallinity, and this non-single crystal thin film is irradiated with an energy beam, or a heater, lamp, etc. Various methods have been proposed for producing single-crystal thin films by melting and recrystallizing them by heating.

その方法のいくつかを第3図乃至第6図に示す。Some of the methods are shown in FIGS. 3 to 6.

第3図はビーム21の強度を整形することにより、双峰
型の温度分布を得て非単結晶薄膜22の単結晶化を行な
うものであり、第4図乃至第6図はそれぞれアイランド
法(埋め造型)、SiN選択反射防止膜法、ポリシリコ
ンキャップ複層溶融再結晶化法における試料構造を示し
ており、第4図乃至第6図において23は基板、24は
絶縁膜、25は多結晶シリコン層、26は絶縁膜、27
は 6再結晶シリコン層、28はSiN膜、29は絶縁
膜、30は多結晶シリコンキャップ層である。この第4
図乃至第6図に示す方法は、それぞれ試料構造により反
射率や熱伝導等を場所的に変化させ双峰型の温度分布を
得て、単結晶化を行なうものであり、また、これらを混
合して使用する方法もとられている。
FIG. 3 shows a method in which a bimodal temperature distribution is obtained by shaping the intensity of the beam 21 to single-crystallize a non-single-crystal thin film 22, and FIGS. 4 to 6 respectively show the island method ( Embedded molding), SiN selective anti-reflection coating method, and polysilicon cap multilayer melt recrystallization method. silicon layer, 26 is an insulating film, 27
6 is a recrystallized silicon layer, 28 is a SiN film, 29 is an insulating film, and 30 is a polycrystalline silicon cap layer. This fourth
The methods shown in Figures 6 to 6 are for obtaining a bimodal temperature distribution by locally changing the reflectance, heat conduction, etc. depending on the sample structure, and producing a single crystal. There is also a method of using it.

〈発明が解決しようとする問題点〉 上記第3図乃至第6図に示した従来の方法ではいずれも
下地が平坦なときに理想的な単結晶化を行なうことが出
来る。即ち、例えば積層型半導体装置においては、絶縁
膜を介して能動層となる単結晶層を積層していくため、
表面の段差は、結晶成長工程やその結晶性に影響を及ぼ
しているのが現状であり、このため下地表面を平坦化し
て単結晶化を行なっているのが通例である。
<Problems to be Solved by the Invention> The conventional methods shown in FIGS. 3 to 6 above can all perform ideal single crystallization when the base is flat. That is, for example, in a stacked semiconductor device, single crystal layers that become active layers are stacked with an insulating film interposed between them.
Currently, surface steps affect the crystal growth process and its crystallinity, and for this reason, it is customary to flatten the underlying surface and perform single crystallization.

しかし、この下地表面の平坦化が充分でない場合、ある
いは、下地が平坦なときでさえ、ビームのゆらぎや試料
構造の微妙な変化があると、上記したいずれの方法にお
いても良好な単結晶を得るのが困難な場合が多く、結晶
粒界が発生ずると共に、結晶成長の不連続性が生じその
結晶性を低下させる等の問題点があった。
However, if the underlying surface is not sufficiently flattened, or even when the underlying surface is flat, there may be beam fluctuations or subtle changes in the sample structure, making it difficult to obtain a good single crystal using any of the above methods. In many cases, it is difficult to achieve this, and there are problems such as the generation of grain boundaries and discontinuity in crystal growth, which reduces the crystallinity.

本発明は上記の点に鑑みて創案されたもので、レーザ、
ビーム等のゆらぎや試料構造の微妙な変化に対して安定
性の高い再結晶化方法を提供することを目的としている
The present invention was created in view of the above points, and includes a laser,
The aim is to provide a recrystallization method that is highly stable against beam fluctuations and subtle changes in sample structure.

〈問題点を解決するための手段〉 上記の目的を達成するため、本発明の単結晶薄膜の形成
方法は、基板絶縁物あるいは基板上を被覆した絶縁膜表
面に、単結晶化領域内の粒界制御や欠陥の防止、ストレ
ス緩和を目的として、あらかじめビーム走査方向と平行
な10μm乃至100μm幅、0.1μm乃至2μm深
さの凹状の帯状の段差を形成し、その後この帯状段差を
有する絶縁物基板あるいは絶縁膜上に単結晶化すべき非
単結晶薄膜を形成し、この非単結晶薄膜上に15μm乃
至110μm幅の帯状の多結晶薄膜を薄い絶縁膜を介し
て上記凹部を覆うように形成し、次にこの帯状の多結晶
薄膜上からエネルギービーム照射あるいはヒータ、ラン
プ等による加熱を行なって、上記凹部の非単結晶薄膜を
単結晶化するように構成している。
<Means for Solving the Problems> In order to achieve the above-mentioned object, the method for forming a single crystal thin film of the present invention includes forming grains in a single crystallized region on the surface of a substrate insulator or an insulating film coated on a substrate. For the purpose of field control, defect prevention, and stress mitigation, a concave band-like step parallel to the beam scanning direction with a width of 10 μm to 100 μm and a depth of 0.1 μm to 2 μm is formed in advance, and then an insulator having this band-like step is formed. A non-single crystal thin film to be made into a single crystal is formed on a substrate or an insulating film, and a belt-shaped polycrystalline thin film with a width of 15 μm to 110 μm is formed on this non-single crystal thin film so as to cover the recessed portion with a thin insulating film interposed therebetween. Next, energy beam irradiation or heating with a heater, lamp, etc. is performed from above this band-shaped polycrystalline thin film, so that the non-single crystalline thin film in the recessed portion is made into a single crystal.

〈作 用〉 上記のような構成により、結晶粒界の発生が帯状段差部
の凸部にのみ局在し、凹部に粒界のない単結晶領域が形
成される。
<Function> With the above configuration, the generation of grain boundaries is localized only in the convex portions of the band-like step portions, and single crystal regions without grain boundaries are formed in the concave portions.

第1図は、本発明にしたがって単結晶化を行なおうとす
る領域の両側に平行な段差を設けて、単結晶した場合の
基板表面の状態を示す平面図である。
FIG. 1 is a plan view showing the state of the substrate surface when a single crystal is formed by providing parallel steps on both sides of a region to be single crystallized according to the present invention.

第1図において、lは単結晶化領域、2は段差部、3は
結晶粒界であり、この第1図からも明らかなように、本
発明によれば、 f+)  凸部及び単結晶化領域外で発生した粒界の成
長を第1図の■に示すように段差部2で停止さ上の拡大
を防ぐ。
In FIG. 1, l is a single crystallized region, 2 is a stepped portion, and 3 is a grain boundary.As is clear from FIG. 1, according to the present invention, f+) convex portions and single crystallization The growth of grain boundaries generated outside the area is stopped at the stepped portion 2, as shown in (■) in FIG. 1, to prevent upward expansion.

(3)単結晶化部1の応力を段差部2に集中させ、そこ
で第1図の■に示すように欠陥を生じさせることにより
単結晶化部1での応力を緩和させ  ゛る。
(3) The stress in the single crystallized portion 1 is concentrated on the stepped portion 2, and defects are generated there as shown in (■) in FIG. 1, thereby relaxing the stress in the single crystallized portion 1.

等の作用により粒界のない単結晶領域1が容易に得られ
ることになる。
Due to these effects, a single crystal region 1 without grain boundaries can be easily obtained.

なお、本発明の実施に当って、凹状の帯状段差の幅を1
0μmより小さくした場合には、その凹部内に形成され
る単結晶化薄膜内に実際に実用的な素子を作り込むこと
が困難となって好ましくない。
In carrying out the present invention, the width of the concave band-like step is set to 1.
If it is smaller than 0 μm, it is not preferable because it becomes difficult to actually fabricate a practical element in the single crystal thin film formed in the recess.

また凹状の帯状段差の幅を100μmより大きくした場
合にはレーザ光等の照射によって、その幅内の非単結晶
薄膜を均一に単結晶化することが困難となり好ましくな
い。
Furthermore, if the width of the concave band-like step is larger than 100 μm, it becomes difficult to uniformly convert a non-single crystal thin film within the width into a single crystal by irradiation with laser light or the like, which is not preferable.

また凹状の帯状段差の深さを01μmより小さく単結晶
薄膜等に段差切れが生じ、良質な単結晶化を行なうこと
が困難となり好ましくない。
Further, the depth of the concave band-like step is less than 0.1 .mu.m, which is not preferable because step breakage occurs in the single crystal thin film, etc., making it difficult to form a high-quality single crystal.

また最上部に形成する多結晶薄膜については凹状の帯状
の段差の幅より5μm乃至10μm程度より幅広く形成
することにより、単結晶化に必要な良好な双峰型の温度
分布が得られることになる。
In addition, by forming the polycrystalline thin film formed at the top to be wider than the width of the concave band-like step by about 5 μm to 10 μm, a good bimodal temperature distribution necessary for single crystallization can be obtained. .

〈実施例〉 以下、図面を参照して本発明の一実施例を詳細に説明す
る。
<Example> Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

第2図(a)乃至(e)はそれぞれ本発明を複層溶融再
結晶化法に適用した場合の各工程を説明するための断面
図である。
FIGS. 2(a) to 2(e) are cross-sectional views for explaining each step when the present invention is applied to a multilayer melt recrystallization method.

まず第2図(a)に示すように要求されるMOS)ラン
ジスタ等の回路素子を半導体基板11に素子分離用酸化
膜12.上面酸化膜13等を含んで作り込むと共に、各
回路要素間をポリシリコン、高融点金属等の導電体14
によって電気的接続を行ない、表面を層間絶縁膜15で
被う。この第2図(a)に示す状態では、絶縁膜■5の
表面には、下地となっている半導体基板IIが導電体1
4等によって凹凸を生じているため、それに対応した凹
凸が生じている。
First, as shown in FIG. 2(a), required circuit elements such as MOS transistors are placed on a semiconductor substrate 11 with an oxide film 12 for element isolation. A conductor 14 such as polysilicon or high melting point metal is formed between each circuit element.
The surface is covered with an interlayer insulating film 15. In the state shown in FIG. 2(a), the underlying semiconductor substrate II is on the surface of the insulating film 5.
Since the unevenness is caused by the 4th grade, corresponding unevenness is generated.

次に、第2図(l〕)に示すように絶縁膜15を被覆し
た半導体基板表面を公知の平坦化法、例えばエッチバッ
ク法等により平坦化する。
Next, as shown in FIG. 2(l), the surface of the semiconductor substrate covered with the insulating film 15 is planarized by a known planarization method, such as an etch-back method.

なお、エッチバック法は凹凸の生じている半導体基板表
面にフォトレジスト等の有機膜を塗布すを行ない、有機
膜の平面形状を下地に転写するものである。
Note that the etch-back method is a method in which an organic film such as a photoresist is applied to the uneven surface of a semiconductor substrate, and the planar shape of the organic film is transferred to the base.

次に第2図(c)に示すように、平坦化された層間絶縁
膜15の表面に粒界制御用の段差+6a、16b。
Next, as shown in FIG. 2(c), steps +6a and 16b are formed on the surface of the planarized interlayer insulating film 15 for grain boundary control.

・・・を、これから単結晶化を行なおうとする部分の両
端に来るような位置にビーム走査方向と平行な帯状段差
の間隔10μm乃至100μm幅(例えば40μm幅)
の凸パターンとして形成する。なお、このとき形成する
凹凸の量は01μm〜2μmとし、0.4〜0,5μm
が最適である。
. . . At the positions at both ends of the part to be single-crystalized, the interval between strip-like steps parallel to the beam scanning direction is 10 μm to 100 μm wide (for example, 40 μm wide).
It is formed as a convex pattern. Note that the amount of unevenness formed at this time is 0.1 μm to 2 μm, and 0.4 to 0.5 μm.
is optimal.

次に第2図(d)に示すように単結晶化するための構造
を形成する。ここではポリシリコンのキャップを用いる
複層溶融再結晶化法を用いた。即ち、菅一段差部+6a
、16b、・・・の形成された層間絶縁膜15、”上の
全面に活性層となる多結晶シリコン17及びシリコン酸
化膜18をこの順序で例えば化学気相1ド 成長法(CVD法)で堆積、更にそのシリコン酸化膜1
8の段差部を含む領域(段差部を両端に含んだ単結晶化
領域)に多結晶シリコンキャップ層19を例えば化学気
相成長法(CVD法)で15μm〜110μm幅(例え
ば50μm幅)に形成して単結晶化するための構造を形
成する。
Next, as shown in FIG. 2(d), a structure for single crystallization is formed. Here, a multilayer melt recrystallization method using a polysilicon cap was used. That is, the first level difference in the tube +6a
, 16b, . . . are formed on the entire surface of the interlayer insulating film 15, a polycrystalline silicon 17 and a silicon oxide film 18, which will become an active layer, are deposited in this order by, for example, a chemical vapor deposition method (CVD method). Deposition, and then the silicon oxide film 1
Form a polycrystalline silicon cap layer 19 with a width of 15 μm to 110 μm (for example, 50 μm width) in the region including the step portion of No. 8 (single-crystalline region including the step portion at both ends) by, for example, chemical vapor deposition (CVD method). to form a structure for single crystallization.

以上の構造を形成した後、第2図(e)に示すようにレ
ーザビーム20を照射し、帯状の段差に沿って走査する
ことにより、段差凸部16a、16bにはさまれた領域
の多結晶シリコン17を溶融固化させて単結晶化させる
After forming the above structure, as shown in FIG. 2(e), the laser beam 20 is irradiated and scanned along the band-shaped step, thereby increasing the area sandwiched between the step protrusions 16a and 16b. The crystalline silicon 17 is melted and solidified to become a single crystal.

以上のような各工程により、段差を所望の単結晶領域外
に配置し、この段差部を犠牲領域として粒界や欠陥を集
中させることにより単結晶領域内に粒界や欠陥が発生す
るのを防止し、良質の単結晶化層を得る。
Through each of the above steps, a step is placed outside the desired single crystal region, and this step is used as a sacrificial region to concentrate grain boundaries and defects, thereby preventing grain boundaries and defects from occurring within the single crystal region. prevent and obtain a good quality single crystallized layer.

〈発明の効果〉 以上述べたように、本発明によれば次のような効果が得
られる。
<Effects of the Invention> As described above, according to the present invention, the following effects can be obtained.

(1)凸部または単結晶領域外で発生した粒界の成長が
段差部で停止し単結晶領域内への侵入が防止されるため
凹部に均一で良質な単結晶が得られる。
(1) Growth of grain boundaries generated outside the convex portion or the single crystal region is stopped at the stepped portion and prevented from penetrating into the single crystal region, so that a uniform and high quality single crystal can be obtained in the concave portion.

(2)単結晶領域内の凹部で発生した粒界を段差部の単
結晶領域外へ導き、それ以上の拡大を防ぐことが出来る
ため、均一で良質な単結晶が得られる。
(2) Grain boundaries generated in the recesses in the single crystal region can be guided outside the single crystal region at the stepped portion and can be prevented from further expansion, so that a uniform and high quality single crystal can be obtained.

(3)単結晶化部の応力を段差部に集中させ、そこで故
意に欠陥を生じさせることにより、単結晶化部での応力
を緩和させることができる。
(3) By concentrating the stress in the single crystallized part on the stepped part and intentionally creating defects there, the stress in the single crystallized part can be relaxed.

(4)双峰の絶縁膜段差により、断面温度プロファイル
が双峰型となるため、さらに広い領域で単結晶を得るこ
とができる。
(4) Since the cross-sectional temperature profile becomes bimodal due to the bimodal insulating film step, a single crystal can be obtained over a wider area.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明により形成された単結晶化基板表面の状
態を示す平面図、第2図(a)乃至(e)はそれぞれ本
発明の一実施例の工程を説明するための断面図、第3図
乃至第6図はそれぞれ従来技術を説明するための断面図
である。 l・・単結晶化領域、2・・・段差部、3・・・結晶粒
界、11・・・半導体基板、15・・・層間絶縁層、1
6a、16b・・・段差凸部、17・・・活性層となる
多結晶シリコン、18 シリコン酸化膜、19・・・多
結晶シリコンキャップ層、20・・・レーザビーム。
FIG. 1 is a plan view showing the state of the surface of a single crystallized substrate formed according to the present invention, and FIGS. 2(a) to (e) are sectional views for explaining the steps of an embodiment of the present invention, respectively. FIGS. 3 to 6 are sectional views for explaining the prior art, respectively. l... Single crystallized region, 2... Step portion, 3... Crystal grain boundary, 11... Semiconductor substrate, 15... Interlayer insulating layer, 1
6a, 16b... Stepped convex portion, 17... Polycrystalline silicon serving as an active layer, 18 Silicon oxide film, 19... Polycrystalline silicon cap layer, 20... Laser beam.

Claims (1)

【特許請求の範囲】 1、絶縁物基板あるいは絶縁膜で被覆された基板の表面
に形成された非単結晶薄膜にエネルギービームを照射、
あるいはヒータ、ランプ等で加熱して上記単結晶薄膜を
単結晶化する単結晶薄膜形成方法において、 上記基板絶縁物あるいは基板上を被覆した絶縁膜表面に
あらかじめ10μm乃至100μm幅、0.1μm乃至
2μm深さの凹状の帯状の段差を形成し、 上記工程によって形成した帯状段差を有する絶縁物基板
あるいは絶縁膜上に単結晶化すべき非単結晶薄膜を形成
し、 上記工程によって形成した単結晶化すべき非単結晶薄膜
上に薄い絶縁膜を形成し、 上記工程によって形成した薄い絶縁膜上に上記凹部を覆
うように15μm乃至110μm幅の帯状の多結晶薄膜
を形成し、 上記工程によって形成された帯状の多結晶薄膜上からエ
ネルギービーム照射あるいはヒータ、ランプ等による加
熱を行い、 上記凹部の非単結晶薄膜を単結晶化することを特徴とす
る単結晶薄膜の形成方法。 2、前記単結晶化されるべき非単結晶薄膜がシリコン薄
膜であることを特徴とする特許請求の範囲第1項記載の
単結晶薄膜の形成方法。
[Claims] 1. Irradiating an energy beam to a non-single crystal thin film formed on the surface of an insulating substrate or a substrate covered with an insulating film;
Alternatively, in a method for forming a single crystal thin film in which the single crystal thin film is made into a single crystal by heating with a heater, a lamp, etc., the surface of the substrate insulator or the insulating film coated on the substrate is preliminarily coated with a width of 10 μm to 100 μm and a width of 0.1 μm to 2 μm. forming a concave belt-like step in depth, forming a non-single crystal thin film to be made into a single crystal on the insulating substrate or insulating film having the step in the step formed by the above process; A thin insulating film is formed on the non-monocrystalline thin film, and a strip-shaped polycrystalline thin film with a width of 15 μm to 110 μm is formed on the thin insulating film formed by the above process so as to cover the recessed part, and the strip-like polycrystalline film formed by the above process is A method for forming a single crystal thin film, which comprises irradiating the polycrystalline thin film with an energy beam or heating it with a heater, lamp, etc. to convert the non-single crystal thin film in the recess into a single crystal. 2. The method for forming a single crystal thin film according to claim 1, wherein the non-single crystal thin film to be single crystallized is a silicon thin film.
JP28543785A 1985-12-20 1985-12-20 Manufacture of single crystal thin film Pending JPS62145720A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28543785A JPS62145720A (en) 1985-12-20 1985-12-20 Manufacture of single crystal thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28543785A JPS62145720A (en) 1985-12-20 1985-12-20 Manufacture of single crystal thin film

Publications (1)

Publication Number Publication Date
JPS62145720A true JPS62145720A (en) 1987-06-29

Family

ID=17691509

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28543785A Pending JPS62145720A (en) 1985-12-20 1985-12-20 Manufacture of single crystal thin film

Country Status (1)

Country Link
JP (1) JPS62145720A (en)

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