JPS6214444A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6214444A
JPS6214444A JP15358085A JP15358085A JPS6214444A JP S6214444 A JPS6214444 A JP S6214444A JP 15358085 A JP15358085 A JP 15358085A JP 15358085 A JP15358085 A JP 15358085A JP S6214444 A JPS6214444 A JP S6214444A
Authority
JP
Japan
Prior art keywords
film
bpsg
melt
coating
flattening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15358085A
Other languages
Japanese (ja)
Other versions
JPH0799759B2 (en
Inventor
Yoshimi Shiotani
喜美 塩谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60153580A priority Critical patent/JPH0799759B2/en
Publication of JPS6214444A publication Critical patent/JPS6214444A/en
Publication of JPH0799759B2 publication Critical patent/JPH0799759B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To increase resistance to moisture and to improve flatness by a method wherein a coating of boron-phosphorus silicate glass (BPSG) or of the same including some germanium is formed on an insulating film and the coating is caused to melt for the production of a flattened surface. CONSTITUTION:On a polycrystalline silicon wiring 2 provided on a semiconductor substrate 1, a coating is provided by CVD of a 5,000Angstrom -thick PSG film 3. A BPSG film 5 approximately of the same thickness is laid on the PSG film 3. The BPSG film 5 is heated to melt for the flattening of the surface. Annealing in a high-humidity oxygen atmosphere by means of a carbon dioxide gas laser or a lamp suits the purpose. By using this method, the BPSG film 5 may be caused to melt with the PSG film 3 remaining not melted, which contributes to the flattening of the surface.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法のうち、特に絶縁膜の形
成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming an insulating film.

ICなどの半導体装置は、LSI、VLSIと高度に集
積化されているが、それは微細化・高集積化されるほど
、高速動作などの性能を向上する利点があるからである
Semiconductor devices such as ICs are highly integrated, such as LSI and VLSI, because the smaller and more highly integrated they are, the more they have the advantage of improving performance such as high-speed operation.

一方、ICをWXm化・高集積化すれば、その上面で微
細素子を接続するための配線が複雑になって、2層、3
層と多層に配線が形成されるようになってきた。
On the other hand, if ICs become WXm and highly integrated, the wiring to connect minute elements on the top surface becomes complicated, resulting in two-layer, three-layer
Wiring has come to be formed in multiple layers.

このような多層配線は、眉間に絶縁膜を介して形成され
るが、段差の激しい面に配線を形成することになって、
配線が断線したり、短絡したりし易くなる。従って、眉
間絶縁膜の表面を出来るだけ平坦にすることが望まれて
いる。
Such multilayer wiring is formed through an insulating film between the eyebrows, but since the wiring is formed on a surface with severe steps,
Wiring becomes easily disconnected or short-circuited. Therefore, it is desired to make the surface of the glabellar insulating film as flat as possible.

〔従来の技術と発明が解決しようとする問題点]従来よ
り、表面の平坦化には、種々の方法が採られているが、
それらは工程が複雑になる等の欠点があったり、また、
十分に平坦化されない場合も多い。そのうち、最も簡単
で形成が容易と考えられる平坦化法に、溶液を表面に塗
布し、これをベーキングして固着させる方法があり、第
2図にその一例の構造断面図を示している。
[Prior art and problems to be solved by the invention] Conventionally, various methods have been used to flatten the surface.
They have drawbacks such as complicated processes, and
In many cases, the surface is not sufficiently flattened. Among these, the planarization method that is considered to be the simplest and easiest to form is a method of applying a solution to the surface and baking it to fix it. FIG. 2 shows a structural cross-sectional view of an example of this method.

第2図において、1は半導体基板、2は多結晶シリコン
からなる配線、3は燐シリケートガラス(PSG)膜、
4はスピンオングラス股である。
In FIG. 2, 1 is a semiconductor substrate, 2 is a wiring made of polycrystalline silicon, 3 is a phosphorous silicate glass (PSG) film,
4 is a spin-on glass crotch.

この形成方法の概要は、配線2の上に化学気相成長(C
VD)法でPSG膜を被着し、その上に、スピンオング
ラス溶液を塗布する。そうすると、表面が平坦になって
、次に、約400℃の温度で熱処理して溶液を固着させ
る。
The outline of this formation method is that chemical vapor deposition (C
A PSG film is deposited by VD) method, and a spin-on glass solution is applied thereon. Then, the surface becomes flat, and then heat treatment is performed at a temperature of about 400° C. to fix the solution.

このスピンオングラス(Spin on Glass)
はシリコン化合物を有機溶剤に熔かしたもので、低温度
で処理して溶媒を飛ばし、酸化シリコン(Si02) 
N!iを残存させる。この残存膜は絶縁性が良いから、
眉間の平坦化絶縁膜としての役目を果たすことができる
ものである。
This spin on glass
is a silicon compound melted in an organic solvent, which is treated at low temperatures to evaporate the solvent and form silicon oxide (Si02).
N! Let i remain. This remaining film has good insulation properties, so
It can serve as a flattening insulating film between the eyebrows.

また、スピンオングラスの他に、PLO3と呼ばれるも
のもあり、同様に有機樹脂系で、同様の性質を有するた
め、スピンオングラスと同じく配線層間の平坦化に利用
されている。
In addition to spin-on glass, there is also something called PLO3, which is also based on organic resin and has similar properties, so it is used for flattening between wiring layers like spin-on glass.

このように、溶液を塗布する方法は形成が容易で、平坦
性に優れている。しかし、その絶縁膜は有機樹脂が膜中
に残存するため、耐湿性が十分でなく、且つ、他の不純
物も含有していて、ICに悪影響を与える心配があるこ
と艇判ってきた。
As described above, the method of applying a solution is easy to form and has excellent flatness. However, it has been found that the insulating film does not have sufficient moisture resistance because the organic resin remains in the film, and also contains other impurities, which may have an adverse effect on the IC.

本発明は、このような心配がなく、形成が容易で、且つ
、平坦性に優れている形成方法を提案するものである。
The present invention proposes a forming method that is free from such concerns, is easy to form, and has excellent flatness.

[問題点を解決するための手段] その問題は、絶縁膜上に硼素燐ンリケートガラス(BP
SG)、または、ゲルマニウムを含む硼素燐シリケート
ガラス(GeB P S G)を被着し、該BPSG、
または、GeBPSGを熔融して、表面を平坦にする工
程が含まれる半導体装置の製造方法によって解決される
[Means for solving the problem] The problem is that boron phosphorus silicate glass (BP) is used on the insulating film.
SG) or boron phosphorus silicate glass containing germanium (GeB PSG),
Alternatively, the problem can be solved by a semiconductor device manufacturing method that includes a step of melting GeBPSG to flatten the surface.

[作用] 即ち、本発明はPSG膜よりも融点の低いBPSG、ま
たは、GeBPSGを、psc膜の上に気相成長させて
、これを溶融して平坦化させる。
[Operation] That is, in the present invention, BPSG or GeBPSG, which has a lower melting point than the PSG film, is grown in a vapor phase on the psc film, and is melted and planarized.

そうすると、耐湿性の良いこれらの絶縁膜で平坦な表面
が形成される。
Then, a flat surface is formed with these insulating films having good moisture resistance.

[実施例] 以下、図面を参照して実施例によって詳細に説明する。[Example] Hereinafter, embodiments will be described in detail with reference to the drawings.

第1図(a)〜(C)は本発明にかかる形成工程順断面
図を示しており、まず、同図(a)に示すように、半導
体基板1に設けた多結晶シリコン配線2の上に、CVD
法によって膜厚5000人程度以上SGIJi3を被着
する。次いで、同図(b)に示すように、その上に同程
度の膜厚のBPSG膜5を被着する。PSG膜3.Bp
sclff5は共にCVD法で被着するため、同−CV
D装置内で引き続いて成長することができる。
FIGS. 1(a) to 1(C) show sequential cross-sectional views of the formation process according to the present invention. First, as shown in FIG. In, CVD
Deposit SGIJi3 to a film thickness of approximately 5,000 or more using a method. Next, as shown in FIG. 2B, a BPSG film 5 of approximately the same thickness is deposited thereon. PSG film 3. Bp
Since both sclff5 are deposited by CVD method, the same -CV
Can continue to grow in the D apparatus.

次いで、第1図TC)に示すように、BPSG膜5を加
?!熔融して、表面を平坦化する。それには、高湿酸素
中で炭酸ガスレーザアニール、または、ランプアニール
する方法が適当である。そうすると、PSG膜3を溶融
させることなく、BPSGIll15を溶かして、表面
を平坦にすることができる。
Next, as shown in FIG. 1 (TC), a BPSG film 5 is added. ! Melt and flatten the surface. For this purpose, carbon dioxide laser annealing or lamp annealing in high humidity oxygen is suitable. This allows the BPSGIll 15 to be melted and the surface to be flattened without melting the PSG film 3.

なお、BPSG膜は、5i02の中に燐(P)。Note that the BPSG film contains phosphorus (P) in 5i02.

硼素(B)がそれぞれ4重量%程度含まれている材料で
、PSGllの融点が約1050℃であるのに対して、
BPSG膜の融点は950℃程度になる。そのため、上
記例でBPSG膜のみ溶融させることができる。
It is a material containing about 4% by weight of boron (B), and the melting point of PSGll is about 1050 ° C.
The melting point of the BPSG film is about 950°C. Therefore, in the above example, only the BPSG film can be melted.

また、B P S G11l!の代わりに、GeBPS
G膜を成長して同様に熔融し、表面を平坦化でも良い。
Also, B P S G11l! Instead of GeBPS
A G film may be grown and similarly melted to flatten the surface.

GeBPSG膜とは、上記のBPSG膜に数重量%のゲ
ルマニウム(Ge)を含有させた材料で、その融点を約
800℃程度まで下げることが可能で、熱処理が更に容
易になる。
The GeBPSG film is a material obtained by adding several weight percent of germanium (Ge) to the BPSG film described above, and its melting point can be lowered to about 800° C., making heat treatment easier.

上記実施例のように、本発明の形成方法はその形成が簡
単であって、平坦化膜の耐湿性は良く、不純物の含有も
少ないく、勿論、有機物は含有していない。しかも、平
坦性は溶液塗布法と同様に優れているので、最良の平坦
化法である。
As in the above embodiments, the formation method of the present invention is easy to form, the flattening film has good moisture resistance, contains few impurities, and, of course, does not contain organic substances. Furthermore, since the flatness is as excellent as that of the solution coating method, it is the best flattening method.

[発明の効果] 以上の説明から明らかなように、本発明によれば耐湿性
が良く、平坦性の優れた絶縁膜が容易に形成される。従
って、ICの信頼性・品質向上に顕著に役立つものであ
る。
[Effects of the Invention] As is clear from the above description, according to the present invention, an insulating film with good moisture resistance and excellent flatness can be easily formed. Therefore, it is significantly useful for improving the reliability and quality of ICs.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(C1は本発明にかかる形成工程順断面
図、第2図は従来の構造断面図である。 図において、 1は半導体基板、 2は多結晶シリコン配線、 3はPSGI!!、 4はスピンオングラス膜、 5はBPSG膜 @ 1 図 第 2 図
FIGS. 1(a) to (C1 are cross-sectional views in order of the formation process according to the present invention, and FIG. 2 is a cross-sectional view of a conventional structure. In the figures, 1 is a semiconductor substrate, 2 is a polycrystalline silicon wiring, and 3 is a PSGI !!, 4 is spin-on glass film, 5 is BPSG film @ 1 Fig. 2

Claims (1)

【特許請求の範囲】[Claims] 絶縁膜上にそれよりも融点が高い硼素燐シリケートガラ
ス、または、ゲルマニウムを含む硼素燐シリケートガラ
スを被着し、該硼素燐シリケートガラス、または、ゲル
マニウムを含む硼素燐シリケートガラスを溶融して、表
面を平坦化する工程が含まれてなることを特徴とする半
導体装置の製造方法。
A boron phosphorus silicate glass having a higher melting point or a boron phosphorus silicate glass containing germanium is deposited on the insulating film, and the boron phosphorus silicate glass or boron phosphorus silicate glass containing germanium is melted to form a surface. 1. A method for manufacturing a semiconductor device, comprising the step of planarizing the semiconductor device.
JP60153580A 1985-07-11 1985-07-11 Method for manufacturing semiconductor device Expired - Lifetime JPH0799759B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60153580A JPH0799759B2 (en) 1985-07-11 1985-07-11 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60153580A JPH0799759B2 (en) 1985-07-11 1985-07-11 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6214444A true JPS6214444A (en) 1987-01-23
JPH0799759B2 JPH0799759B2 (en) 1995-10-25

Family

ID=15565595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60153580A Expired - Lifetime JPH0799759B2 (en) 1985-07-11 1985-07-11 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0799759B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03120825A (en) * 1989-09-28 1991-05-23 Applied Materials Inc Boron phosphorus silicate glass compound layer on semiconductor wafer
US5215933A (en) * 1990-05-11 1993-06-01 Kabushiki Kaisha Toshiba Method of manufacturing nonvolatile semiconductor memory device
US5409858A (en) * 1993-08-06 1995-04-25 Micron Semiconductor, Inc. Method for optimizing thermal budgets in fabricating semiconductors
US5474955A (en) * 1993-08-06 1995-12-12 Micron Technology, Inc. Method for optimizing thermal budgets in fabricating semconductors
US6319848B1 (en) * 1993-10-12 2001-11-20 Texas Instruments Incorporated Inhomogenous composite doped film for low temperature reflow

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6081840A (en) * 1983-10-11 1985-05-09 Nec Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6081840A (en) * 1983-10-11 1985-05-09 Nec Corp Semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03120825A (en) * 1989-09-28 1991-05-23 Applied Materials Inc Boron phosphorus silicate glass compound layer on semiconductor wafer
US5215933A (en) * 1990-05-11 1993-06-01 Kabushiki Kaisha Toshiba Method of manufacturing nonvolatile semiconductor memory device
US5409858A (en) * 1993-08-06 1995-04-25 Micron Semiconductor, Inc. Method for optimizing thermal budgets in fabricating semiconductors
US5474955A (en) * 1993-08-06 1995-12-12 Micron Technology, Inc. Method for optimizing thermal budgets in fabricating semconductors
US5646075A (en) * 1993-08-06 1997-07-08 Micron Technology, Inc. Method for optimizing thermal budgets in fabricating semiconductors
US6319848B1 (en) * 1993-10-12 2001-11-20 Texas Instruments Incorporated Inhomogenous composite doped film for low temperature reflow

Also Published As

Publication number Publication date
JPH0799759B2 (en) 1995-10-25

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