JPS621435U - - Google Patents

Info

Publication number
JPS621435U
JPS621435U JP9127185U JP9127185U JPS621435U JP S621435 U JPS621435 U JP S621435U JP 9127185 U JP9127185 U JP 9127185U JP 9127185 U JP9127185 U JP 9127185U JP S621435 U JPS621435 U JP S621435U
Authority
JP
Japan
Prior art keywords
clock signal
channel fet
mos
fet
clock gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9127185U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9127185U priority Critical patent/JPS621435U/ja
Publication of JPS621435U publication Critical patent/JPS621435U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Logic Circuits (AREA)
JP9127185U 1985-06-17 1985-06-17 Pending JPS621435U (enrdf_load_html_response)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9127185U JPS621435U (enrdf_load_html_response) 1985-06-17 1985-06-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9127185U JPS621435U (enrdf_load_html_response) 1985-06-17 1985-06-17

Publications (1)

Publication Number Publication Date
JPS621435U true JPS621435U (enrdf_load_html_response) 1987-01-07

Family

ID=30647015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9127185U Pending JPS621435U (enrdf_load_html_response) 1985-06-17 1985-06-17

Country Status (1)

Country Link
JP (1) JPS621435U (enrdf_load_html_response)

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