JPS62142474A - Photoelectric converter - Google Patents

Abstract

PURPOSE:To prevent blooming by decreasing a voltage applied to a capacitor at erasure more than a voltage fed to the capacitor at read. CONSTITUTION:A pulse generator 8 is operated so as to increase a read pulse more than a refresh pulse. That is, an output potential of a k-line m-column cell outputted at the m-column after the read of the k-th line is added with the sum of a storage potential and a potential corresponding to the increment caused when the read pulse is higher the the refresh pulse. Thus, the emitter- base of the l-line m-column is biased reversely and the reverse bias state is kept until the selection of the m-th column. Thus, the carrier flowing from the base of the l-line m-column cell to the emitter is prevented sufficiently. Thus, when a strong light is made incident in the l-line n-column, no blooming is caused.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a photoelectric conversion device, particularly a photoelectric conversion device suitable for a two-dimensional semiconductor solid-state imaging device.

<Prior Art> Such a conventional photoelectric conversion device will be described with reference to the drawings.

FIG. 3 is a circuit diagram of a photoelectric conversion device having five two-dimensional rows of optical sensor cells.

Such a photoelectric conversion device has a photosensor cell 1 surrounded by a dotted line.
(Indicates that the potential of the collector attached to the collector of the Bibo 2 transistor is VCC), horizontal lines 2 (1), 2 (2), . . . for applying read pulses and refresh pulses. ...,
2(m), buffer MO8 for applying read pulses and refresh pulses) transistor BT1 tB
T2 + ” ” , BTms buffer MO8
) Transistor BT I T BT2 e...,B
The pulse φv1. applied to the gate of T. φv2. ...
・Vertical shift register 3 for generating φvm, vertical line 4 for reading out accumulated voltage from basic optical sensor 7/I/1 (1), 4(2), 4(n), Pulse φ51 for selecting each vertical line. φh2f・
..., a horizontal shift register 5 that generates φhn,
Gate MO transistors GT1, GT2t..., GTn for opening and closing each vertical line, output line 6 for reading out the accumulated voltage to the amplifier section, and after reading, the charge accumulated in the output line is M08 transistor Rτ for readout, amplifier 7 for amplifying the output signal, vertical line 4(1)p in read operation.
4 (2) ,...e' (MOS for reducing the charge accumulated in (n)) transistor I
FT1. FT2.・・・・・・．

It is composed of FTn. Further, in the configuration shown in FIG. 3, φ1 is a read/fresh pulse, φ2 is a pulse applied to the gate of the transistor T, and φ is the transistor FT1, :tpT2 t..., F
T.

V is the pulse applied to the gate of V, which is output by the pulse generator 8. . is the positive power supply potential of the amplifier, V, - is the negative power supply potential of the amplifier, and the vertical line y4 (1) t4 (2) *... at the time of vvC Hiro 7 resetting.

4(n).

The operation of the photoelectric conversion device configured as described above will be explained using pulse timing charts shown in FIGS. 3 and 384.

In FIG. 4, the transistor BT1 is turned on by the first pulse of -〇, and the reading of the sensor cells in the first row is performed by the readout pulse of φ, and the vertical lines 4 (t) and 4 (t), respectively, are read. 4 (2) #・・・・・・.

4 (The sensor cell signal is non-destructively output to the Reno specific capacitance. Next, from the shift register 5)
. . ., the φ engineer is the transistor GT1. Gτ2゜h1
# hl ......, GT, are sequentially applied to the gates of vertical lines 4 (1), 4 (2) p ... # 4 (n
) is input to the amplifier 7 through the horizontal 2-in 6. In this case, the pulse φ2 is applied to the gate of the transistor RT every time each vertical line is read, and the horizontal line 6 is refreshed. When the reading of all the vertical twins is completed (corresponding to the end of the period tl in FIG. 4), φ3 becomes H level, and the transistors FT, , FT2, . . .

FT, the vertical line is set to potential VVC (GND in this case), and at the same time φ71. φ, gold H level, and apply a pulse to the control electrode of the sensor cell in the first row via the capacitor to perform a refresh (this corresponds to the end of the period t2 in FIG. 4). Similarly, φv2? φ75. .......

The sensor cells in the second row, third row, . . . m, first row are read and refreshed by the pulse of φ. The accumulation time of optically excited carriers (the fourth
(corresponds to tB in the figure).

Here, after refreshing, the base B1 is the control electrode area after reading out the signal during accumulation, and the vertical readout line 4 (K
) (K is a natural number) The emitter E is the output electrode region connected to the collector 0 whose potential is fixed at V2C (band edge potential).
This will be explained using figures.

In FIG. 5, (IS) is a diagram showing the potential state after refreshing, (1)) is a diagram showing the potential state during a accumulation, and (0) is a diagram showing the potential state after reading. - As shown in the figure, after refreshing, the emitter E is at ground potential (GND) and the collector C is at vo. , and the base and emitter B-B are reverse biased. Furthermore, when photo-excited carriers are accumulated in the base B in this state, the potential of the base B gradually increases (in the figure, this corresponds to the potential of the base B becoming deeper).

Next, when a read pulse is applied to the above-mentioned base region for reading, an output signal corresponding to the photoexcited carriers accumulated in the base region during accumulation appears at the emitter. As described above, such output signals are charged into the capacitors of vertical lines 4(1) to 4(n), and then sequentially read out.

<Problems to be Solved by the Invention> However, when reading out signals using such a conventional driving method, there is a problem in that the reading is not performed from the cells in the row that are strongly illuminated by light. , a so-called blooming phenomenon occurs in which charge flows into the vertical output line and mixes with the output of the cell to be read. This situation is shown in a cell potential diagram in FIG. In Figure 6, (a) is (k-1)
The state before the 7th refresh in the row, (is the state after refreshing the (k-1)th row, (0) is the state at the time of reading the row, and (~ is the state when the mth column is selected. In Figure 6, strong light is incident on the cell in the 1st row and mth column, so carriers due to photoexcitation increase significantly, and the base potential at that point is lower than the reading in the 2nd row. ).(
k-1) When refreshing the row, the emitters of all the sensor cells are dropped to GND, so excess carriers flow out from the base of the cell in the m-th row and the m-th cell. (corresponding to 1 row being performed by strong incident light during the time after the readout of the row 1 until the vertical line selection of the m column is performed), the m column where the output of the cell of the 1st row and the m column is made. When excess carriers flow out to the vertical line of the eye, the potential of the emitter E of the 1st row and m column also increases, and the potential of the vertical line that is common to the emitter E of the 1st row m column increases.
There is a drawback that so-called blooming, in which noise is added to the output of the cells in the row, occurs.

<Means for Solving the Problems> The present invention aims to solve the above-mentioned conventional problems. For this purpose, the present invention provides a method for controlling the potential of a control electrode of a semiconductor transistor via a capacitor. In a photoelectric conversion device having a plurality of photoelectric conversion cells that performs an accumulation operation in which carriers generated by an incident electromagnetic wave are accumulated in the control electrode region, a readout operation in which the carriers are outputted to the main electrode region, and a carrier erasing operation, a readout operation is performed. The present invention is characterized by comprising a control means for making the voltage applied to the capacitor higher than the voltage applied to the capacitor at the time of reading. Blooming is prevented by making the voltage applied to the capacitor during the erase operation lower than the voltage applied to the capacitor during the operation, thereby increasing the voltage of the main electrode region during the read operation.

<Example> Hereinafter, an example of the present invention will be described using FIG. 1 and FIG. 2. The operation mode in this embodiment is shown in FIG.
It works very differently. Everything else is 4th
The non-detailed time chart will be omitted as it is very different from the mode shown in the figure. Next, the state of the photoelectric cell in this example is
This will be explained using the potential diagram shown in the figure. The state of the (k-1) row before and after refreshing is the same as the potential diagram shown in FIG. 6, so the description thereof will be omitted. After reading the kth row, m
The output potential of the cell in row k and column m is outputted to the column by adding a potential corresponding to the amount by which the read pulse is higher than the refresh pulse to the accumulated potential.

Therefore, the distance between the emitter and base of the cell in the 1st row and mth column is
The reverse bias is even more reverse biased than in the case shown in FIG. This will be prevented. Therefore, even if strong light is incident on the cell in the first row and column while reading the signal of the cell in the row and m column, blooming will not occur.

<Effects of the Invention> As explained above, according to the present invention, the interference phenomenon of output signals can be significantly suppressed by simply improving the operation mode by making the read signal higher than the erase signal. be effective.

[Brief explanation of drawings]

Fig. 1 is a time chart for explaining one embodiment of the present invention, Fig. 2 is a potential diagram showing the potential distribution of the photoelectric cell in the operation mode shown in Fig. 1, and Fig. 3 is a potential diagram of the photoelectric conversion device. Equivalent circuit diagram, Figure 4 is a time chart showing the conventional operation mode, Figure 5 is a potential diagram showing the potential distribution of the photoelectric cell in the conventional operation mode, Figure 6 is a diagram showing the distribution of the potential of the photoelectric cell in the conventional operation mode, 1 is a potential diagram showing the distribution of the potential of a photovoltaic cell during a conventional mode of operation when irradiated; FIG. 1 is a photoelectric cell, 4 (1) t4 (2) t...4
(n) is the vertical signal line, BTl, BT2 *...
...BTm is a buffer transistor for applying read pulses and refresh pulses, GTl, GT2e
...GTn is a gate transistor for selecting a vertical line, 1FT1, FT2 +...
The transistor φ, which determines the potential of the FTnd vertical line, is a read and refresh pulse.

Claims (1)

[Claims] An accumulation operation in which carriers generated by incident electromagnetic waves are accumulated in the control electrode region by controlling the potential of the control electrode of the semiconductor transistor via a capacitor, a readout operation in which the carriers are output to the main electrode region, and a carrier erasing operation A photoelectric conversion device having a plurality of photoelectric conversion cells that performs a reading operation, the photoelectric conversion device comprising a control means for making a voltage applied to the capacitor during a read operation higher than a voltage applied to the capacitor during an erase operation. Photoelectric conversion device.