JPS62141742A - Package of semiconductor device - Google Patents
Package of semiconductor deviceInfo
- Publication number
- JPS62141742A JPS62141742A JP28188285A JP28188285A JPS62141742A JP S62141742 A JPS62141742 A JP S62141742A JP 28188285 A JP28188285 A JP 28188285A JP 28188285 A JP28188285 A JP 28188285A JP S62141742 A JPS62141742 A JP S62141742A
- Authority
- JP
- Japan
- Prior art keywords
- cap
- package
- printed board
- semiconductor device
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Abstract
Description
【発明の詳細な説明】
〔概 要〕
半導体装置のパッケージであって、樹脂プリント板を基
体とするパッケージのキャップの材料をパッケージ基体
と同じ樹脂材料とすることにより高い信顛性を実現した
のである。[Detailed Description of the Invention] [Summary] High reliability is achieved by using the same resin material as the package base for the cap of a package for a semiconductor device whose base is a resin printed board. be.
本発明は半導体装置のパッケージに関し、特にパッケー
ジの材料に関する。The present invention relates to a package for a semiconductor device, and more particularly to a material for the package.
半導体装置のパッケージは従来より多くの種類が提案さ
れまた実用に供されているが、最近、樹脂プリント板を
基体とする新型のバ・ノケージが考えられている。しか
し実用化のためにはまだ後述するような問題があり、そ
の解決が要望されている。Many types of packages for semiconductor devices have been proposed and put into practical use, but recently a new type of package based on a resin printed board has been considered. However, for practical use, there are still problems as described below, and their solutions are desired.
上記の如き半導体装置の従来例を第５図に断面図で示し
である。図中、符号１は半導体素子（以下「チップ」と
も称する）を示し、符号２がこのチップ１を収容するパ
ッケージを示す。A conventional example of the semiconductor device as described above is shown in cross-section in FIG. In the figure, reference numeral 1 indicates a semiconductor element (hereinafter also referred to as a "chip"), and reference numeral 2 indicates a package that accommodates this chip 1.
パッケージ２は、チップ１をＲ置するパッケージ基体３
と、その蓋になるキャップ４とから構成されている。そ
してパッケージ基体３は更にプリント板３Ａとその上面
周辺に形成された封止用ダム３Ｂとからなっている。チ
ップ１はプリント板３Ａの上面の凹部内に固定され、チ
ップ上面の電気回路はボンディングワイヤ５によってプ
リント板３Ａの内部導体パターン（図示せず）を介し外
部接続端子（リード）６に接続されている。The package 2 has a package base 3 on which the chip 1 is placed.
and a cap 4 serving as its lid. The package base 3 further includes a printed board 3A and a sealing dam 3B formed around the top surface of the printed board 3A. The chip 1 is fixed in a recess on the top surface of the printed board 3A, and the electric circuit on the top surface of the chip is connected to external connection terminals (leads) 6 by bonding wires 5 through internal conductor patterns (not shown) of the printed board 3A. There is.
キャップ４はパッケージ基体３の封止用ダム３Ｂの上面
に接着剤７ （例えばエポキシ樹脂）によって接合され
、これによりパッケージ２は封止される。The cap 4 is bonded to the upper surface of the sealing dam 3B of the package base 3 with an adhesive 7 (for example, epoxy resin), thereby sealing the package 2.
第５図に示す従来例のパンケージ２は、パッケージ基体
３のプリント板３Ａおよび封止用ダム３Ｂがいずれも例
えばエポキ系またはトリアジン系の樹脂材料から成り、
一方キャップ４は例えばコバール、Ｆ ｅ −Ｎ ｉ合
金（４２−ＡＬＬＯＹ）、アルミニウム、またはアルミ
ナセラミック等から形成されている。In the conventional pancage 2 shown in FIG. 5, the printed board 3A and the sealing dam 3B of the package base 3 are both made of an epoxy or triazine resin material, for example.
On the other hand, the cap 4 is made of, for example, Kovar, Fe-Ni alloy (42-ALLOY), aluminum, or alumina ceramic.
しかるに、前者の樹脂材料と後者の材料との間では熱膨
張計数に大きな差がある。このため温度変動の大きな環
境下ではパッケージ基体３とキャップ４の熱膨張差によ
って両者間の接合部に剥離や隙間が生じ、封止機能が損
なわれる恐れがある。However, there is a large difference in thermal expansion coefficient between the former resin material and the latter material. For this reason, in an environment with large temperature fluctuations, the difference in thermal expansion between the package base 3 and the cap 4 may cause peeling or gaps at the bonded portion between the two, which may impair the sealing function.
このため長期間にわたる信頼性が保証されないという問
題がある。Therefore, there is a problem that long-term reliability is not guaranteed.
本発明は上記問題点を解決するため、前記のような半導
体装置の樹脂プリント板を基体とするパッケージにおい
てパッケージのキャップの材料をパッケージ基体と同じ
樹脂材料としたパッケージ構造を提供するものである。In order to solve the above-mentioned problems, the present invention provides a package structure in which the cap of the package is made of the same resin material as the package base in a package having a resin printed board as a base for a semiconductor device as described above.
上記の如くパッケージの基体とキャップの材料を同じ樹
脂材料としたことにより両者の熱膨張が等しくなる。こ
れにより温度変動の激しい環境下でも両者の接合部の破
損が防止され、長期間にわたって高い封止機能を保証す
ることが可能である。As mentioned above, by using the same resin material for the package base and the cap, the thermal expansion of both becomes equal. This prevents damage to the joint between the two even in an environment with severe temperature fluctuations, making it possible to guarantee high sealing performance over a long period of time.
以下本発明の実施例について図面を参照して説明する。 Embodiments of the present invention will be described below with reference to the drawings.
第１図は本発明の半導体装置の第１実施例の断面図であ
る。この装置の基本構造は第５図に示す従来例と同様で
あるが、キャップ４はパッケージ基本３（つまりプリン
ト板３Ａ及び封止用ダム３Ｂ）と同じく例えばエポキシ
系あるいはトリアジン系の樹脂材料から形成されている
。FIG. 1 is a sectional view of a first embodiment of the semiconductor device of the present invention. The basic structure of this device is the same as the conventional example shown in FIG. 5, but the cap 4 is made of, for example, an epoxy or triazine resin material like the package basic 3 (that is, the printed board 3A and the sealing dam 3B). has been done.
この結果、パッケージ基本３とキャップ４との熱膨張が
等しくなり、激しい環境温度変化のもとでも両者の接合
部が破損して気密封止が損なわれることがない。As a result, the thermal expansion of the package base 3 and the cap 4 becomes equal, and even under drastic environmental temperature changes, the joint between them will not be damaged and hermetic sealing will not be impaired.
また、パッケージ基本及びキャップを同じ樹脂材料とし
たことにより樹脂接着剤による両者の接合強度が増加す
るという効果も得られる。Further, by using the same resin material for the package base and the cap, an effect can be obtained in that the bonding strength between the two by the resin adhesive is increased.
次に第２図及び第３図は本発明の第２及び第３の実施例
を示す。これらの実施例は基本的に上記第１実施例と同
様であるが、第２実施例（第２図）ではキャップ４の外
面に金属箔（例えばＣｕ） ８を貼付し、また第３実
施例（第３図）ではキャップ４の内外両面に同様の金属
箔８．９を貼付した構造としである。Next, FIGS. 2 and 3 show second and third embodiments of the present invention. These embodiments are basically the same as the first embodiment, but in the second embodiment (FIG. 2) a metal foil (for example, Cu) 8 is pasted on the outer surface of the cap 4, and in the third embodiment (FIG. 3) shows a structure in which similar metal foils 8 and 9 are pasted on both the inner and outer surfaces of the cap 4.
かかる構造によれば、耐水性、放熱性、放射線（特にα
線）及び光の遮蔽性、そして捺印性（特にエツチングに
よる印字）の向上が得られる。According to this structure, water resistance, heat dissipation, radiation (especially α
Improvements in line) and light shielding properties, as well as marking properties (particularly printing by etching) can be obtained.
また、図示してないが、キャップ４の表面に例えばソル
ダーレジストなどの耐候性樹脂を塗布することにより耐
候性の向上を得ることも可能である。Although not shown, it is also possible to improve the weather resistance by coating the surface of the cap 4 with a weather resistant resin such as a solder resist.
更に、第４図は本発明の第４実施例を示す。この実施例
は、上記第１〜第３実施例がいずれもキャップ４が外部
接続端子６と反対側に位置する半導体装置であるのに対
して、キャップが外部接続端子と同じ側に位置するいわ
ゆる「キャビティダウン（ｃａｖｉｔｙ ｄｏｗｎ）型
と呼ばれる半導体装置である。第４図において符号１２
がパッケージを示し、これは金属板１３Ａの下面に樹脂
プリント板１３Ｂを接合してなるパッケージ基体１３と
キャップ１４とからなる。チップ１はプリン１１３Ｂの
凹部内で金属板１３Ａに固定されており、ボンディング
ワイヤ５によってプリント板１３Ｂの内部導体パターン
（図示せず）を介して外部接続端子（リード）１６に接
続されている。キャップ１４はプリント板１３Ｂにそれ
の凹部の下側開口部にて接着剤７によって接合される。Furthermore, FIG. 4 shows a fourth embodiment of the present invention. This embodiment is a semiconductor device in which the cap 4 is located on the opposite side to the external connection terminal 6 in the first to third embodiments, whereas the so-called semiconductor device in which the cap is located on the same side as the external connection terminal 6 is used. "This is a semiconductor device called a cavity down type. In FIG.
indicates a package, which consists of a package base 13 and a cap 14, which are formed by bonding a resin printed board 13B to the lower surface of a metal plate 13A. The chip 1 is fixed to the metal plate 13A within the recess of the printed board 113B, and is connected to external connection terminals (leads) 16 by bonding wires 5 via internal conductor patterns (not shown) of the printed board 13B. The cap 14 is bonded to the printed board 13B at the lower opening of the recessed portion of the cap 14 with the adhesive 7.
プリント板１３Ｂ及びキヤ・ノブ１４はいずれも前述の
エポキシ系あるいはトリアジン系の樹脂から形成されて
おり、そしてまたキャップ１４の内面には金属箔（Ｃｕ
Ｈ８が貼付されている。The printed board 13B and the cap knob 14 are both made of the aforementioned epoxy or triazine resin, and the inner surface of the cap 14 is coated with metal foil (Cu.
H8 is attached.
この実施例の場合、キャップ１４の材料をパッケージ基
体１３（特にプリント板１３Ｂ）の樹脂材料と同じもの
としたことによる前述したような効果に加えて、金属板
１３Ａにより放熱性が良好であるという長所がある。更
にプリント板１３Ｂ及びキャップ１４が共に樹脂である
ことから、半導体装置を実装用プリント板に実装した場
合に半導体装置の金属部分が実装用プリント板の導体パ
ターンに接触するという問題は生じない。In the case of this embodiment, in addition to the above-mentioned effects due to the fact that the material of the cap 14 is the same as the resin material of the package base 13 (particularly the printed circuit board 13B), the metal plate 13A has good heat dissipation. There are advantages. Furthermore, since both the printed board 13B and the cap 14 are made of resin, when a semiconductor device is mounted on the printed board for mounting, there is no problem that the metal part of the semiconductor device comes into contact with the conductor pattern of the printed board for mounting.
以上のように本発明によれば、樹脂プリント板を基体と
するパッケージのキャップの材料をパッケージ基体と同
じ樹脂材料としたことにより温度変動の激しい環境下で
も熱ストレスによりパッケージの封止機能が損われる恐
れがなく、従って長期間にわたって高い信顛性を保証し
得る半導体装置が実現可能である。As described above, according to the present invention, since the material of the cap of a package based on a resin printed board is the same resin material as the package base, the sealing function of the package is damaged due to thermal stress even in an environment with severe temperature fluctuations. Therefore, it is possible to realize a semiconductor device that can guarantee high reliability over a long period of time.
特に前述した実施例、つまりキャップの片面または両面
に金属箔を貼付した例（第２図、第３図）や、キャップ
の表面に耐候性樹脂を塗布した例、更にキャビティダウ
ン型の例（第４図）では更に前述のようなそれら特有の
付加利点が得られる。In particular, the above-mentioned examples, examples in which metal foil is pasted on one or both sides of the cap (Figs. 2 and 3), examples in which weather-resistant resin is applied to the surface of the cap, and cavity-down type examples (Fig. FIG. 4) also offer additional advantages unique to them as described above.
尚、前述の実施例はいずれもパッケージが外部接続端子
（リード）を有する型式のものであるが、本発明の適用
はこれに限られない。つまりパンケージの底面にパッド
状の外部接続電極が形成されたリードレスチップキャリ
ア（ｌｅａｄｌｅｓｓ ｃｈｉｐｃａｒｒｉｅｒ）と呼
ばれるパッケージにも適用可能である。In addition, although the above-mentioned embodiments are all of the type in which the package has external connection terminals (leads), the application of the present invention is not limited to this. In other words, the present invention can also be applied to a package called a leadless chip carrier in which a pad-shaped external connection electrode is formed on the bottom surface of a pan cage.
第１図〜第４図はそれぞれ本発明による半導体装置の第
１〜第４の実施例の断面図、
該５図は従来の半導体装置の断面図である。
第１図〜第４図において、
■は半導体素子（チップ）、２はパッケージ、３はパッ
ケージ基体、 ３Ａはプリント板、３Ｂは封止用ダ
ム、 ４はキャップ、５はボンディングワイヤ、
６は外部接続端子、
７は接着剤、 ８，９は金属箔、１２はパッ
ケージ、 １３はパッケージ基体、１３Ａは金属板、
１３Ｂはプリント板、１４はキャップ、 １
６は外部接続端子、１８は金属箔である。
本発明の第１実施例
ＩＩ ＠
本発明の第２実施例
８２囚
１ ・・ 半導体素子（チップ） ６ ・ 外部
接続端子２・・・ ・リケーノ ７・
・ 接着剤３０． ・初ケージ基体 ８・
・ 金属箔３Ａ・・・ プリント板
３Ｂ−・ 封止用ダム
本発明の第３実施例
＠３ｒｉＪ
本発明の第４実施例
′ｇｊＩ４ｒＩＪ
１２・・・ ・ぐッケージ
１３・・・ ノぐツケージ基体
１３Ａ・・・金属板
１３Ｂ・・・ プリント板
１４・・・ キャップ
従来例
１・・・ 半導体素子（チップ）
２・・・ パッケージ
３・・・ パッケージ基体
３Ａ・・・ プリント板
３Ｂ・・・ 封止用ダム
４・・・ キャップ
５・・・ ボンディングワイヤ
６・・・ 外部接続端子
７・・・ 接着剤1 to 4 are sectional views of first to fourth embodiments of a semiconductor device according to the present invention, respectively, and FIG. 5 is a sectional view of a conventional semiconductor device. In Figures 1 to 4, ① is a semiconductor element (chip), 2 is a package, 3 is a package base, 3A is a printed board, 3B is a sealing dam, 4 is a cap, 5 is a bonding wire, 6 is an external part Connection terminal, 7 is adhesive, 8, 9 is metal foil, 12 is package, 13 is package base, 13A is metal plate,
13B is a printed board, 14 is a cap, 1
6 is an external connection terminal, and 18 is a metal foil. First embodiment of the present invention II @ Second embodiment of the present invention 82 Prisoner 1... Semiconductor element (chip) 6 - External connection terminal 2... - Riken 7.
・Adhesive 30.・First cage base 8・
- Metal foil 3A... Printed board 3B - Sealing dam Third embodiment of the present invention@3riJ Fourth embodiment of the present invention'gjI4rIJ 12... - Gutter cage 13... Gutter cage base 13A ...Metal plate 13B... Printed board 14... Cap conventional example 1... Semiconductor element (chip) 2... Package 3... Package base 3A... Printed board 3B... Sealing Dam 4... Cap 5... Bonding wire 6... External connection terminal 7... Adhesive
Claims (1)
ジにおいて、 パッケージのキャップの材料を前記パッケージ基体と同
じ樹脂材料としたことを特徴とする半導体装置のパッケ
ージ。 ２、前記キャップの片面または両面に金属箔を貼付した
ことを特徴とする特許請求の範囲第１項記載の半導体装
置。 ３、前記キャップの表面に耐候性樹脂を塗布したことを
特徴とする特許請求の範囲第１項記載の半導体装置。[Scope of Claims] 1. A package for a semiconductor device having a resin printed board as a base, characterized in that a cap of the package is made of the same resin material as the package base. 2. The semiconductor device according to claim 1, wherein metal foil is attached to one or both sides of the cap. 3. The semiconductor device according to claim 1, wherein a weather-resistant resin is applied to the surface of the cap.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28188285A JPS62141742A (en) | 1985-12-17 | 1985-12-17 | Package of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28188285A JPS62141742A (en) | 1985-12-17 | 1985-12-17 | Package of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62141742A true JPS62141742A (en) | 1987-06-25 |
Family
ID=17645281
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28188285A Pending JPS62141742A (en) | 1985-12-17 | 1985-12-17 | Package of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62141742A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5662342A (en) * | 1979-10-26 | 1981-05-28 | Hitachi Ltd | Semiconductor device |
| JPS5833856A (en) * | 1981-08-24 | 1983-02-28 | Hitachi Ltd | Semiconductor device |
-
1985
- 1985-12-17 JP JP28188285A patent/JPS62141742A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5662342A (en) * | 1979-10-26 | 1981-05-28 | Hitachi Ltd | Semiconductor device |
| JPS5833856A (en) * | 1981-08-24 | 1983-02-28 | Hitachi Ltd | Semiconductor device |
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