JPS62138893A - Dot matrix display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a dot matrix display device that performs line sequential scanning, and particularly to a dot matrix display device that allows enlarged display in the vertical direction.

[Background of the invention]

In recent years, with the spread of information processing devices, the use of flat display devices has become smaller, that is, the use of flat display devices has increased.
Along with this, there is also a recent trend of increasing the capacity for one display.

As the display capacity of one display device increases in this way, a problem arises in how one display data is displayed when display data created with an information processing device having a conventional display capacity is displayed on a display device with a large display capacity. i.e. 1, for example, horizontal 640
Naturally, when display data created on a conventional information processing device with a display capacity of 640 dots wide x 400 dots high is transferred and displayed on an information processing device with a large display capacity of 640 dots wide x 400 dots high, However, there was a problem that the empty area could be displayed vertically on the screen.

In order to solve this problem, for example, Japanese Unexamined Patent Application Publication No. 58-
As disclosed in Japanese Patent No. 95394, a dot matrix display device is known in which 1 display data is enlarged and displayed in the vertical direction to eliminate empty areas on the 0 screen. Explain using.

FIG. 15 is a configuration diagram showing an example of a conventional dot matrix liquid crystal display device, in which 1 is a liquid crystal display panel, 11 is a dot, 2 is a row electrode drive circuit, 21 is a shift register,
3 is a column electrode drive circuit, 31 is a shift register, 32 is a latch circuit, 4 is a display memory, 5 is a liquid crystal controller, 6
7 is a row electrode signal line, and 7 is a column electrode signal line.

In the figure, in the liquid crystal display panel 1, a plurality of row electrode signal lines Itj6 and a plurality of column electrode signal lines 7 are arranged so as to be orthogonal to each other. There is one dot 11 at each intersection. Therefore, the dots 11 are arranged in a matrix, and a scanning pulse is supplied from the row electrode drive circuit 2 via the row electrode signal line 6, and a display pulse is supplied from the column electrode drive circuit 3 via the column electrode signal line 7. Driven by data. The row electrode drive circuit 2 is composed of a plurality of stages of shift registers 21.
The column electrode drive circuit 3 is composed of a plurality of stages of shift registers 31 and a latch circuit 32 opposite thereto. Display memory 4 is used to store display contents in units of an arbitrary number of bits. The liquid crystal controller 5 reads parallel display data consisting of an arbitrary number of bits from the 1-display memory 4, converts it into serial display data D, transfers it to the column electrode drive circuit 3, and clocks the shift register 31 of the 1-column electrode drive circuit 3. CL2.

A latch pulse LP is supplied to the latch circuit 32, respectively.

Scanning pulse data LD and clock C are supplied to the row electrode drive circuit 2.
Supply LI.

Next, the operation of this prior art will be explained. Furthermore, here,
To simplify the explanation, an example is shown in which the liquid crystal display panel 1 is shown as a display area for one character, and the display capacity of this display area is 6 dots horizontally by 14 dots vertically, and the English character rAJ is displayed.

However, as a single display capacity, it is not limited to this, but any MXN
The 0-row electrode drive circuit 2 and the column electrode drive circuit 3 include a liquid crystal drive circuit that converts each signal into a voltage level necessary to drive the liquid crystal display panel 1. 1 is omitted because it is not important to the explanation of the present invention.

The column' electrode drive circuit 3 receives serial display data D and a clock CL2 from the fL crystal controller 5, and the serial display data D is converted into parallel display data by a shift register 31. The parallel-converted display data is input to the latch circuit 32 and held for one line scanning period (that is, the period in which one row of the liquid crystal display panel 10?jtffl signal line 7 is scanned), and one column is sent to the latch circuit 32 via the polar signal @6. Each bit of display data is simultaneously output to one product display panel 1.

FIG. 16 shows the operation of this column electrode drive circuit 3. Now, looking at the display data D on the No. 1 line, 6 bits of this serial display data D are shifted in synchronization with the clock CL2. The bits are transferred one stage at a time while being supplied to the register 31, and when all these bits are stored in the shift register 31, the latch circuit 3 is transferred by the latch pulse LPK.
2 at the same time. As a result, the latch circuit 532
Each bit is transmitted through a column electrode signal line 7.

Output.

On the other hand, the one-row electrode drive circuit 2 receives scanning pulse data LD and a clock CLI whose duty ratio is 1/the number of scanning lines from the liquid crystal controller 5, and receives one bit from the serial input parallel output shift register 21. The scanning pulses are sequentially outputted to each row electrode signal line 6 with a delay of
It is supplied to the liquid crystal display panel 1. FIG. 17 shows the operation of the row electrode and drive circuit 2 in relation to the output signal of the column electrode drive circuit 3. The numbers attached to each output of the latch circuit 32 in FIG. 1 indicate the data of each line. (the same applies below). Namely.

The timing of the input of the clock CLI of the row electrode drive circuit °2 and the output of the display data bit of the latch circuit 32 is matched. Further, FIG. 18 shows in detail the timing relationship between the scanning pulse data LD and clock CLI input to the row electrode drive circuit 2 and the row electrode signal which is the output of the shift register 21 with respect to the output of the latch circuit 32. Each row electrode signal is output from the 0th row electrode drive circuit 2 during the period in which the latch circuit 32 outputs the display data bit. This method of displaying by sequentially scanning lines is called line sequential scanning.

FIG. 19 schematically shows a display method based on this operating principle. In the figure, display data stored in one display memory 4 is read in parallel line by line by a liquid crystal controller 5.

After being converted from parallel to serial, it is transferred to the 0th column electrode drive circuit 3. This display data is.

The column electrode drive circuit 3 further performs serial-parallel conversion and outputs the resultant signal from the liquid crystal display panel 11C. At this time.

The row electrode drive circuit 2 scans the row electrodes having the same line number as the display data output to the liquid crystal display panel l. By sequentially performing these operations from the first line to the last line, the display of one frame is completed.

In such a dot matrix display device, it is conventional to enlarge the display in the vertical direction to 5 m rows.

Enlargement processing is performed in advance to form two identical display data for each line, and as shown in FIG.
There is a method of storing data in the display memory 4, but it requires the use of a display memory 4 with a memory capacity twice the amount of data originally required, and also requires an enlargement processing means.
This only led to an increase in software processing or hardware means. Furthermore, as another conventional example for vertically enlarged display, as shown in FIG.
A method of realizing vertical enlargement by storing only the minimum necessary amount of display data in the display and having the liquid crystal controller 5 read out the same line twice (for example, Japanese Patent Laid-Open No. 59-6
1874), however, the complexity of processing for double reading and the waste of transferring the same data twice.

[Purpose of the invention]

An object of the present invention is to eliminate the drawbacks of the above-mentioned prior art, use a display memory with a minimum necessary display data capacity, and reduce the transfer of the necessary minimum display data to the necessary minimum, thereby enabling vertically enlarged display. An object of the present invention is to provide a dot matrix display device that can perform the following operations.

[Summary of the invention]

To achieve this purpose, the present invention includes a dot mark)
1) Focusing on the driving method of the screen display device, the present invention is characterized in that a plurality of consecutive row electrodes are scanned every second to display data of the same content on a plurality of lines.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of essential parts showing an embodiment of a dot matrix display device according to the present invention, and 8 is a shift clock multiplexing circuit, and parts corresponding to those in FIG. 15 are given the same reference numerals.

This embodiment includes a liquid crystal controller 5 and a row electrode drive circuit 2.
A shift clock multiplex circuit 8 is installed on the clock transmission line between
The only difference from the conventional technology shown in FIG. 15 is that
Since the other parts are basically the same, in FIG. 1, the related liquid crystal controller 5 and row electrode drive circuit 2 are particularly shown, and the enclosed parts are omitted.

This shift clock multiplexing circuit 8 is connected to the liquid crystal controller 5.
The clocks CL1 . . . , . , . , . l
is supplied to the row electrodes and the drive circuit 2.

v, Figure 2 shows the shift clock multiplexing circuit 8 in Figure 1.
81 is a circuit configuration diagram showing a specific example of a delay circuit;
82 is an OR circuit.

To explain the operation of this specific example using FIG. 3, the clock CLI is supplied to the delay circuit 81 and the OR circuit 82,
A clock CLL and a clock CI 11 are obtained by delaying the clock CLI by a delay circuit 81. The delay time of this delay circuit 81 is set to be N longer than the pulse width of the clock CLI and sufficiently smaller than the period of the clock CLI.

1 - the resulting clock CLII is a pulse group or a rannary of two pulses close to each other.

The period of the pulse group is equal to one line scanning period.

Each pulse of the clock CL11 is used to shift the scanning pulse data LD by one stage in the 0th row electrode drive circuit 2. For this purpose, as explained earlier, the 1st row electrode drive circuit 2 outputs a scanning pulse to each row electrode signal line 6 (FIG. 15) every time the scanning pulse data LD is shifted. As shown in the figure, the latch circuit 32 (FIG. 15)
When the display data bits for one line are latched, the scanning pulse h''- is output almost simultaneously to the two row electrode signal lines 7 which are arranged consecutively.As a result, the same content of data is displayed on the two lines. It will be displayed.

In this way, data with the same content is displayed two lines at a time, and the display data is thereby enlarged and displayed twice in the vertical rows.

Furthermore, as shown in Fig. 5, by reducing the actual scanning line by half, the duty ratio is reduced to 1 compared to the conventional example.
The change will be from /14 to 1/7, but the operating speed of the liquid crystal controller 5 will be halved.

This can be easily dealt with by changing the duty ratio of the liquid crystal controller 5. An example of this type of liquid crystal controller is the HD61830 manufactured by Hitachi.

Through the operations described above, as shown in FIG. 6, enlarged display in the vertical direction can be achieved by using the minimum amount of display memory 4 and transferring the minimum amount of display data.

In addition, here we have described a method of enlarging the image twice in the vertical direction and displaying it in 2, but 1, for example, in figure jg7.

As shown, by providing two delay circuits 81 and 83 in the shift clock multiplexing circuit 8 and scanning three row electrodes in one line scanning period, the signal can be expanded three times in the vertical direction. It can also be easily displayed. FIG. 8 shows signal waveforms at various parts of the shift clock multiplexing circuit 8 in this case. In this way, the number of delay circuits can be arbitrarily determined as needed, but this allows for arbitrary vertical direction N
Needless to say, it is possible to achieve double enlarged display. In this case, as shown in FIG. 9, the l-line scanning period becomes longer due to the increased duty ratio, but if the transfer rate of the display data D is kept high as before, the extra period is transferred to the display memory 4. It can also be used to change the content.

In this embodiment, as in the previous conventional example, -6 horizontally per character.
Dosotoma with a display capacity of 14 vertical dots) I
Although the J-X liquid crystal display device has been described, it goes without saying that this embodiment can also be applied to a tri-matrix liquid crystal display device having an arbitrary MXN dot display capacity. Further, as another display device, the present invention can be similarly applied to a display device using an EL (electroluminescence) or plasma isoline progressive scanning method.

FIG. 10 is a block diagram of main parts showing another embodiment of the dot matrix display device according to the present invention.

9 is a multiple row electrode simultaneous scanning circuit, and parts corresponding to those in FIG. 15 are given the same reference numerals.

The only difference in this embodiment is that a multiple row electrode simultaneous scanning circuit 9 is provided between the one row electrode drive circuit 2 and the liquid crystal display panel 1.
Unlike the prior art shown in FIG. 5, other parts are basically the same, so they are omitted in FIG. 10.

This multi-row electrode simultaneous scanning circuit 9 simultaneously generates a plurality of scanning pulses for each scanning pulse supplied from the one-row electrode drive circuit 2, and transmits the scanning pulses to the plurality of row electrode signals arranged continuously on the liquid crystal display panel 1. 6 (FIG. 15) at the same time.

FIG. 11 is a block diagram showing a specific example of the multiple row electrode simultaneous scanning circuit 9, in which 601 to 604 are output lines of the row electrode drive circuit 2, 601 to 614 are row electrode signal lines, and 70
1 to 713 are selectors.

In the figure, scanning pulses are outputted to the output lines 601' to 614 from the row electrode drive circuit 2 (FIG. 10) to white number 11, and the first row electrode signal lines 601 to 614 are connected to the liquid crystal display panel l (FIG. 10), respectively. A scanning pulse is supplied to each row electrode. The selector 701 selects one of the outputs H6ot' and 602', and the selector 702 selects the output lines 602 and 603.
Choose one. As similarly illustrated below, each of the selectors 703 to 713 selects one of the two output lines.

Generally, the k-th selector from the top of one drawing (same below) (
For example, the first selector is selector 701) and the mth and rth output lines (for example, selector 701).

The first output line is a 2tO1 selector that selects one of the output lines 601). however.

-1+1 Also, the 0th row electrode signal line 601 is connected to the output line 601',
be done. Row electrode signal line 602 is connected to selector 701.

Row electrode signal line 603 is connected to selector 702.

Similarly, each row electrode is connected to a selector.

In such a configuration, when vertical enlargement display is not performed, the selectors 701 to 703 select the output lines located at the top and bottom of the drawing from among the output lines, and scan pulses output from the 1-row electrode drive circuit 2 to the output lines. is directly supplied to the row electrodes on the liquid crystal display panel 1 via other signal lines to scan the rows having the same code as this output line and having no data source. Also, when performing enlarged display in the vertical direction.

Selectors 701 to 713 each select the output line positioned at the top of the drawing from among the output lines. As a result, the 12th
As shown in the figure, each output line is connected to two consecutive row electrode signal lines, and the output scanning pulse is transmitted to two row electrode signal lines on the liquid crystal display panel 1. are transmitted simultaneously. Therefore, as shown in FIG. 13, each time the latch circuit (FIG. 15) latches one line of display data bits, a scanning pulse is simultaneously supplied to two consecutive row electrode signal lines. The same data will be displayed on the two lines.

In this way, data having the same content is displayed two lines at a time, and thereby the display data is enlarged twice in the vertical direction and displayed.

As described above, in order to simultaneously scan the two row electrodes, as in the embodiment shown in FIG. 1, as shown in FIG.
Enlarged display in the vertical direction can be achieved by using the display memory 4 with the minimum necessary capacity and by transferring the minimum necessary display data.

In this embodiment, the method of displaying 2 times magnification in the vertical direction as shown in FIG. 1 and similar to the previous embodiment has been described. Display can be realized. Further, in this embodiment, a dot matrix liquid crystal display device having a display capacity of 6 dots horizontally x 14 dots vertically was described, but any M×N
This embodiment is also applied to a dot matrix liquid crystal display device having a display capacity of dots.

It goes without saying that the object of the present invention can be achieved. Further, as another display device, the present invention can be similarly applied to a display device using a line 11N primary scanning method, such as an EL (electroluminescence) plasma.

〔Effect of the invention〕

As explained above, according to the present invention, by simultaneously scanning a plurality of consecutive row electrodes.

Since it enables enlarged display in the vertical direction, the display data is not subjected to any processing for enlarged display, uses a display memory of the minimum necessary capacity, and uses the minimum necessary display data transfer button.

Enlarged display in the vertical direction can be achieved, and since the display is enlarged in the vertical direction through hardware processing, the configuration is streamlined and the processing for enlarged display is speeded up, which is an excellent effect. It will be done.

[Brief explanation of drawings]

FIG. 1 is a block diagram of main parts showing an embodiment of a dot matrix display device according to the present invention, and FIG. 2 is a block 1g showing a specific example of the shift clock multiplexing circuit in FIG. 1.
, FIG. 3 is a timing chart for explaining the operation of this specific example, FIG. 4 is a timing chart showing the generation timing of scanning pulses in the embodiment of FIG. 1, and FIG. 5 is the same operation during one frame period. Explanatory diagram. Figure 6 is a schematic diagram showing the display method, and Figure 7 is a schematic diagram showing the display method.
FIG. 8 is a block diagram showing a specific example of the shift clock multiplexing circuit shown in FIG. 8. FIG. 8 is a timing chart for explaining the operation of this specific example. FIG. FIG. 1O is a block diagram of a main part showing another embodiment of the dot matrix display device according to the present invention, and FIG. 11 is a block diagram showing a specific example of the multiple row electrode simultaneous scanning circuit in FIG. 1O. FIG. 12 is a wiring diagram showing the operation during vertical enlarged display of this specific example, FIG. 13 is a timing chart showing the generation timing of scanning pulses in the embodiment of FIG. 1O,
Figure 14 is a schematic diagram showing the ffrl display method,
FIG. 5 is a block diagram showing an example of a conventional dot matrix display device, FIG. 16 is a timing chart showing display operation in l line scanning period, and FIG. 17 is a timing chart showing display operation in l frame period. , ts is a timing chart showing the generation timing of scanning pulses,
FIG. 19 is a schematic diagram showing a normal display method, and FIGS. 20 and 21 are schematic diagrams each showing a conventional example of a vertically enlarged display method. 1...Liquid crystal display panel, 2...Row electrode drive circuit. 3... Column electrode movement circuit, 4... Display memory. 5...LCD controller. 8...Shift clock multiplexing circuit. 9... Multiple row electrode simultaneous scanning circuit.

Claims (1)

[Claims] A dot matrix display means driven by a plurality of column electrodes and row electrodes that intersect with each other; a column electrode drive means and a row electrode drive means provided at the ends of the column electrodes and row electrodes, respectively; a display content storage means for storing in units of an arbitrary number of bits; and a display content storage means for transferring display data consisting of an arbitrary number of bits from the display content storage means to the column electrode drive means, and for the row electrode drive means to transfer display data consisting of an arbitrary number of bits to the row electrode drive means. In a dot matrix display device comprising display control means for sending control signals for sequentially scanning and driving electrodes,
By providing means for simultaneously scanning consecutive N (where N is an integer of 2 or more) row electrodes and displaying the same display data on N lines, it is possible to enlarge the display by N times in the vertical direction. A dot matrix display device characterized by comprising: