JPS62138204U

JPS62138204U -

Info

Publication number: JPS62138204U
Application number: JP2297486U
Authority: JP
Priority date: 1986-02-21
Filing date: 1986-02-21
Publication date: 1987-08-31

Description

[Brief explanation of the drawing]

第１図はこの考案の一実施例による数値制御装
置のデータ伝送制御装置のブロツク接続図、第２
図は同じくデータ伝送の処理フロー図、第３図は
従来のデータ伝送制御装置のブロツク接続図であ
る。１は制御カード、３，４，５，６，７は設定ピ
ン、８はデータバツフアメモリ、９はシステムソ
フトロジツクを格納したＲＯＭ。なお、図中、同
一符号は同一、または相当部分を示す。 Fig. 1 is a block connection diagram of a data transmission control device for a numerical control device according to an embodiment of this invention;
This figure is also a data transmission processing flow diagram, and FIG. 3 is a block connection diagram of a conventional data transmission control device. 1 is a control card; 3, 4, 5, 6, and 7 are setting pins; 8 is a data buffer memory; and 9 is a ROM that stores system software logic. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

補正昭６１．４．１７考案の名称を次のように補正する。考案の名称数値制御装置のデータ伝送制御
方式実用新案登録請求の範囲、図面の簡単な説明を
次のように補正する。Amendment April 17, 1981 The name of the invention is amended as follows. Title of the invention Data transmission control system for numerical control equipment The scope of the claims for utility model registration and the brief description of the drawings are amended as follows.

【実用新案登録請求の範囲】数値制御装置のデータ伝送を制御する制御カー
ド上に、外部計算機などとの間でデータ伝送する
データの伝送速度を設定できる複数種類の速度設
定ピンを有し、その速度設定ピンを介して入力さ
れる上記データを、システムソフトロジツクに従
つてデータバツフアメモリに格納する数値制御装
置のデータ伝送制御方式において、上記データの
伝送時に、上記システムソフトロジツクがデータ
伝送速度に対応する速度を順次検索し、一致した
速度があつたとき、その速度にて上記データ伝送
を行うようにしたことを特徴とする数値制御装置
のデータ伝送制御方式。[Claim for Utility Model Registration] A control card that controls data transmission of a numerical control device has multiple types of speed setting pins that can set the transmission speed of data transmitted to and from an external computer, etc. In a data transmission control method for a numerical control device in which the above data input via a speed setting pin is stored in a data buffer memory according to system software logic, when the above data is transmitted, the system software logic Search for speeds corresponding to the transmission speed sequentially and find a match.
1. A data transmission control method for a numerical control device, characterized in that when the speed is high, the data transmission is performed at that speed .

【図面の簡単な説明】第１図はこの考案の一実施例による数値制御装
置のデータ伝送制御装置のブロツク接続図、第２
図は同じくデータ伝送の処理フロー図、第３図は
従来のデータ伝送制御装置のブロツク接続図であ
る。１は制御カード、８はデータバツフアメモリ、
９はシステムソフトロジツクを格納したＲＯＭ。
なお、図中、同一符号は同一、または相当部分を
示す。[Brief Description of the Drawings] Fig. 1 is a block connection diagram of a data transmission control device for a numerical control device according to an embodiment of this invention;
This figure is also a data transmission processing flow diagram, and FIG. 3 is a block connection diagram of a conventional data transmission control device. 1 is a control card, 8 is a data buffer memory,
9 is a ROM that stores system software logic.
In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims

[Scope of utility model registration request]

The control card that controls the data transmission of the numerical control device has multiple types of speed setting pins that can set the transmission speed of data transmitted to and from an external computer, etc. In a data transmission control method of a numerical control device in which the above-mentioned data is stored in a data buffer memory according to system software logic, when the above-mentioned data is transmitted, the system software logic sets the above-mentioned speed setting corresponding to the data transmission speed. A data transmission control method for a numerical control device, characterized in that pins are sequentially searched, and when a matching speed setting pin is found, the data transmission is performed through the pin at the set speed.