JPS6213759B2 - - Google Patents
Info
- Publication number
- JPS6213759B2 JPS6213759B2 JP55063062A JP6306280A JPS6213759B2 JP S6213759 B2 JPS6213759 B2 JP S6213759B2 JP 55063062 A JP55063062 A JP 55063062A JP 6306280 A JP6306280 A JP 6306280A JP S6213759 B2 JPS6213759 B2 JP S6213759B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- bias
- circuit
- self
- sub
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000010355 oscillation Effects 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000003068 static effect Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 238000005086 pumping Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6306280A JPS56159891A (en) | 1980-05-13 | 1980-05-13 | Semiconductor integrated circuit device |
| US06/260,994 US4460835A (en) | 1980-05-13 | 1981-05-06 | Semiconductor integrated circuit device with low power consumption in a standby mode using an on-chip substrate bias generator |
| DE8181103606T DE3162416D1 (en) | 1980-05-13 | 1981-05-11 | Semiconductor integrated circuit device |
| EP81103606A EP0039946B1 (en) | 1980-05-13 | 1981-05-11 | Semiconductor integrated circuit device |
| CA000377457A CA1185665A (en) | 1980-05-13 | 1981-05-13 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6306280A JPS56159891A (en) | 1980-05-13 | 1980-05-13 | Semiconductor integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56159891A JPS56159891A (en) | 1981-12-09 |
| JPS6213759B2 true JPS6213759B2 (enrdf_load_html_response) | 1987-03-28 |
Family
ID=13218469
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6306280A Granted JPS56159891A (en) | 1980-05-13 | 1980-05-13 | Semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56159891A (enrdf_load_html_response) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2783138B2 (ja) * | 1993-12-03 | 1998-08-06 | 株式会社日立製作所 | 半導体装置 |
| JP2011254305A (ja) * | 2010-06-02 | 2011-12-15 | Asahi Kasei Electronics Co Ltd | クロック負昇圧回路 |
-
1980
- 1980-05-13 JP JP6306280A patent/JPS56159891A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56159891A (en) | 1981-12-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2557271B2 (ja) | 内部降圧電源電圧を有する半導体装置における基板電圧発生回路 | |
| EP0039946B1 (en) | Semiconductor integrated circuit device | |
| US6545525B2 (en) | Semiconductor device including interface circuit, logic circuit, and static memory array having transistors of various threshold voltages and being supplied with various supply voltages | |
| US6239650B1 (en) | Low power substrate bias circuit | |
| US20040080340A1 (en) | Low power consumption MIS semiconductor device | |
| JPH0114712B2 (enrdf_load_html_response) | ||
| US5444362A (en) | Dual back-bias voltage generating circuit with switched outputs | |
| US4705966A (en) | Circuit for generating a substrate bias | |
| JPH043110B2 (enrdf_load_html_response) | ||
| JP3807799B2 (ja) | 半導体装置 | |
| EP0451870B1 (en) | Reference voltage generating circuit | |
| US6304120B1 (en) | Buffer circuit operating with a small through current and potential detecting circuit using the same | |
| US6380792B1 (en) | Semiconductor integrated circuit | |
| US4267465A (en) | Circuit for recharging the output nodes of field effect transistor circuits | |
| US4737902A (en) | Inner potential generating circuit | |
| JPH04239221A (ja) | 半導体集積回路 | |
| JPS6213759B2 (enrdf_load_html_response) | ||
| JPH07113862B2 (ja) | 基準電圧発生回路 | |
| US5532652A (en) | Oscillation circuit with enable/disable frequency stabilization | |
| US4868484A (en) | Reference voltage generator using a charging and discharging circuit | |
| JP2906148B2 (ja) | 半導体集積回路 | |
| JP3224712B2 (ja) | 論理&レベル変換回路及び半導体装置 | |
| JPH0358182B2 (enrdf_load_html_response) | ||
| JPH025058B2 (enrdf_load_html_response) | ||
| JP2000339981A (ja) | 半導体集積回路 |