JPS6213432Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a DC converter, that is, a DC-DC converter, which can prevent saturation of a transformer.

To explain a conventional transistor converter with reference to FIG. 1, a primary winding 3 of an output transformer 2 is connected to a DC power supply 1, a transistor 4 is connected in series to this primary winding 3 as a switching element, A rectifier circuit 7 consisting of a rectifier diode 6 is connected to the secondary winding 5 of the output transformer 2, and a diode 8 and a reactor 9 are connected to the output stage of the rectifier circuit 7.
A load 12 is connected via a smoothing circuit 11 consisting of a capacitor 10 and a capacitor 10 . 13 is a control circuit for the transistor 4 for controlling the DC output voltage to be constant; and an error amplification circuit 1 for obtaining an error output voltage between the output voltage and the reference voltage of the reference voltage source 14.
5, a triangular wave generation circuit 16 that generates a triangular wave with the same period as the on/off period of the transistor 4,
It consists of a voltage comparator 17 that compares the triangular wave and the error output voltage, and a drive circuit 18 that generates a base drive signal for the transistor 4 corresponding to the output of the comparator 17. A resistor 20 connected in parallel to the transformer primary winding 3 via a rectifier diode 19
is for resetting the transformer 2, and a capacitor 21 connected in parallel with this resistor 20 is for removing spike voltage.

When the transistor 4 of the converter configured in this way is turned on during the period _t1 to _t2 in FIG. 2, the voltage of the power supply 1 is applied to the primary winding 3, and the corresponding voltage is applied to the secondary winding. 5 and is supplied to the load 12 via the rectifier circuit 7 and the smoothing circuit 11. Second
In the figure, when the base drive signal of transistor 4 disappears and transistor 4 turns off at time t ₂ , the energy stored in transformer 2 during the on period of transistor 4 is transferred to primary winding 3 and rectifier diode 1.
9 and a resistor 20, and the second
The increase in collector-emitter voltage _VCE of transistor 4 shown in FIG. A is limited, and transformer 2 is magnetically reset. The generation period of the reset voltage V _R during the off period of the transistor 4 is from t ₂ to t ₃ , and the voltage V _S of the power supply 1 is applied to the transistor 4 after the transformer 2 is reset.

By the way, when the variation in the load current I _L is small, the transformer 2 is reset every cycle, so saturation of the transformer 2 does not occur, but when the load current I _L suddenly changes from a small state to a large state. , it becomes impossible to obtain a sufficient reset voltage, the transformer 2 becomes saturated, the collector current I _C of the transistor 4 becomes large, and the transistor 4 is destroyed or deteriorated. That is, during the period t ₄ to _{t 9} when _the load current I _L is small as _shown in FIG. The voltage V _R also becomes lower. Therefore, the charging voltage of the capacitor 21 naturally becomes low. Next, after _t9 , when the on-time of transistor 4 becomes longer as shown in _t9 to _t10 due to the increase in load current _IL , a high voltage is required to reset transformer 2. A relatively large amount of energy is stored in the transformer 2 during the time period t ₉ to t ₁₀ , but since the capacitor 21 for removing spike voltage is provided, the energy stored in the transformer 2 when it is on is used as a reset voltage as it is. Instead, it is used to charge the capacitor 21, and the reset voltage gradually increases.
Therefore, the voltage that resets the transformer 2 during the off period from _t10 to _t11 becomes lower than the full-load reset voltage level V _A corresponding to the collector current I _C at this time, making it impossible to reset the transformer 2. Become. For this reason, as is clear from the B-H curve shown in Figure 2C, the B-H curve cannot return to its original state in the period from _t9 to _t12 , and is not reset in the next cycle after _t11 . The operation begins, the transformer 2 becomes saturated, and the transistor 4 becomes saturated as shown in FIG. 2B.
collector current I _C becomes excessive. For this reason, in the past, a transistor 4 with a large power capacity was used to prevent destruction or deterioration of the transistor 4, or the magnetic flux density of the transformer 2 was designed to be low. Therefore,
Equipment has become larger and more expensive.

Therefore, an object of the present invention is to provide a DC converter capable of limiting the saturation of the transformer.

To achieve the above object, the present invention includes a transformer having a primary winding and a secondary winding, a switching element connected in series to the primary winding, and a switching element connected in series to the primary winding.
A DC power source supplies power to a series circuit consisting of a secondary winding and the switching element, a self-excited or separately excited switching control circuit that turns on and off the switching element, and a rectifier diode connected to the primary winding. a resistor connected in parallel; a spike voltage removal capacitor connected in parallel to the resistor;
and a capacitor charging circuit connected to the capacitor for charging the capacitor to a voltage approximately equal to the reset voltage required at full load.

According to the present invention, a charging circuit is connected to the capacitor for removing spike voltage, and a voltage approximately equal to the reset voltage required at full load is supplied. Even if the level drops, the spike voltage removal capacitor is charged by the power supply circuit connected here. Therefore, when the load current suddenly increases, the voltage generated from the transformer is not reduced below the reset level by the spike voltage removal capacitor, and the transformer is reliably reset. As a result, it becomes possible to reduce the size and cost of transistors and/or transformers.

Hereinafter, a DC converter according to an embodiment of the present invention will be described with reference to FIGS. 3 and 4. Third
Components designated by reference numerals 1 to 21 in the drawings are substantially the same as those designated by the same reference numerals in FIG. 1, so their explanation will be omitted. Furthermore, since the waveforms A to D in FIG. 4 correspond to the waveforms A to D in FIG. 2, explanations of the same operations will be omitted.

In the DC converter of this embodiment, the charging power supply circuit 22 is connected in parallel to the spike voltage removal capacitor 21. This charging power supply circuit 22 consists of a power supply 23 and a rectifier diode 24 for blocking reverse current, and the power supply 23 is configured to be a power supply separate from the DC power supply 1 of the main circuit, and the power supply 23 is configured to be a power supply separate from the _DC power supply 1 of the main circuit. A voltage V _RM approximately equal to the reset voltage level V _A to be reset is supplied to the capacitor 21.

In the device provided with _the charging power supply circuit 22 as described above, as _shown in _{FIG .} When the current I _L becomes the full load current I _LM , the collector current I _C becomes small during the on period from t ₆ to t ₇ and the flyback voltage during the off period from t ₇ to _{t 8} naturally becomes low. Therefore, the diode 19 is turned off, and the voltage V of the DC power supply 1 is applied to the transistor 4.
The sum _{of S} and the voltage of transformer 2 is applied. _t7 to _t8
Even if the flyback voltage during this period is low, since the capacitor 21 is charged with the voltage _VRM by the separate power supply 23, the charging voltage does not drop as in the conventional circuit shown in FIG. If the collector current I _C increases during the on period from t ₉ to _{t 10} , a corresponding flyback voltage is generated from t ₁₀ to t ₁₁ , and the diode 19 is turned on to provide a reset voltage. At this time, since the capacitor 21 has been charged to the voltage _VRM in advance, a situation where the flyback voltage is absorbed by the capacitor 21 and becomes impossible to reset does not occur. Therefore, the transformer 2 is prevented from being saturated and excessive collector current is limited. Note that the reset voltage is clamped to the voltage V _RM of the separate power supply 23, and V _CE is also clamped.

Although the embodiments of the present invention have been described above, the present invention is not limited thereto and can be further modified. For example, in the embodiment, the separate power supply 23 is configured separately from the DC power supply 1 in order to prevent fluctuations in the reset voltage, but a common power supply system may be used. Further, in order to keep the reset voltage constant, the charging power supply circuit 22 may include a voltage regulating circuit.
Further, a control circuit 1 that drives and controls the transistor 4
3 is a separately excited system, but the voltage of the transformer 2 may be fed back to the base of the transistor 4 to drive the transistor 4 using a self-exciting system.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a conventional DC converter, FIG. 2 is a waveform diagram showing the states of each part in FIG. 1, and FIG. 3 is a circuit diagram showing a DC converter according to an embodiment of the present invention. FIG. 4 is a waveform diagram showing the state of each part in FIG. 3. In the symbols used in the drawings, 1 is a DC power supply, 2 is a transformer, 3 is a primary winding, 4 is a transistor, 5 is a secondary winding, 7 is a rectifier circuit, 12 is a load, and 13 is a control circuit, 19 is a rectifier diode,
20 is a resistor, 21 is a capacitor, and 22 is a charging power supply circuit.

Claims (1)

[Claims for Utility Model Registration] A transformer comprising: a transformer having a primary winding and a secondary winding; a switching element connected in series to the primary winding; and the primary winding and the switching element. a DC power source that supplies power to a series circuit; a switching control circuit that controls on/off of the switching element; a resistor connected in parallel to the primary winding via a rectifier diode; and a spike voltage connected in parallel to the resistor. A conversion device comprising: a removal capacitor; and a capacitor charging circuit connected to the capacitor for charging the capacitor to a voltage approximately equal to the reset voltage required at full load.