JPS62133537A - Read only memory simulator - Google Patents

Read only memory simulator

Info

Publication number
JPS62133537A
JPS62133537A JP60274531A JP27453185A JPS62133537A JP S62133537 A JPS62133537 A JP S62133537A JP 60274531 A JP60274531 A JP 60274531A JP 27453185 A JP27453185 A JP 27453185A JP S62133537 A JPS62133537 A JP S62133537A
Authority
JP
Japan
Prior art keywords
data
data processing
rom
processing device
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60274531A
Other languages
Japanese (ja)
Inventor
Hidenori Taniguchi
谷口 秀憲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60274531A priority Critical patent/JPS62133537A/en
Publication of JPS62133537A publication Critical patent/JPS62133537A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To execute a connection irrespective of use of an IC socket by setting a read only memory to an output inhibited state, and also attaching and detaching the connection, when a data processor in which a ROM remains mounted has been connected to a ROM simulator. CONSTITUTION:A data processor 2 and a ROM simulator 1 are connected by a connector 141 through a connecting means 14, and in a state that it has been connected to the data processor 2, an enable terminal E of a ROM 21 is suppressed to an output inhibited state by an output of the connecting means 14. Accordingly, address information outputted from a data processing part 22 in this state is sent to a storage means 13 through the connecting means 14, and the corresponding data is sent to the data processing part 22 through the connecting means 14.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はデータ処理装置における読出し専用メモリシミ
エレータに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a read-only memory simulator in a data processing device.

〔従来の技術〕[Conventional technology]

従来の絖出し専用メモリシミュレータは、データ処理装
置の読出し専用メモリ(ROM)を実装する位置にIC
ソケットを実装し、このICソケットVCICプラグを
差し込んでROMの代わりにROMシミュレータを接続
して使用していた。
Conventional memory simulators are designed to install an IC at the location where the read-only memory (ROM) of a data processing device is mounted.
A socket was mounted, a VCIC plug was inserted into the IC socket, and a ROM simulator was connected in place of the ROM.

〔発明が解決しようとする間眺点〕[The point of view that the invention attempts to solve]

上述した従来のROMシミュレータでは、データ処理装
置との接続にICソケットが必須となり、ICソケット
が実装されず基板にROMが直に実装されている場合に
はROMシミュレータを接続できないという欠点がある
The conventional ROM simulator described above requires an IC socket for connection to a data processing device, and has the disadvantage that the ROM simulator cannot be connected if the IC socket is not mounted and the ROM is directly mounted on the board.

本発明の目的は、データ処理装置のROMがICソケッ
トを使っていてもいなくても接続可能なR,0Mシミュ
レータを提供することにある。
An object of the present invention is to provide an R,0M simulator that can be connected to a ROM of a data processing device whether or not it uses an IC socket.

〔問題点を解決するだめの手段〕[Failure to solve the problem]

本発明の続出し専用メモリシミュレータは、読出専用メ
モリを含むデータ処理装置から得られるアドレス情報に
対応したデータをデータ処理装置へ出力する記憶手段と
、この記憶手段にデータを宵込み、かつこの記憶手段に
書込まれたデータを読取る入出力手段と、この入出力手
段の指示に従って前記記憶手段にデータを書込み、ある
いは読取るために必要な情報を表示する表示手段と、前
記記憶手段と前記データ処理装置との間を前記アドレス
情報及びデータの経路として接続し、前記データ処理装
置と接続された時には前記読出し専用メモIJ i出力
禁止状態とし、かつ接続の着脱ができる接続手段とを備
えたものである。
The continuous read-only memory simulator of the present invention includes a storage means for outputting data corresponding to address information obtained from a data processing device including a read-only memory to the data processing device; an input/output means for reading data written in the means; a display means for displaying information necessary for writing or reading data in the storage means according to instructions of the input/output means; and the storage means and the data processing. The device is connected to the device as a path for the address information and data, and when connected to the data processing device, output of the read-only memo IJi is prohibited, and the connection is detachable. be.

〔実施例〕〔Example〕

次に本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を含むブロック図である。FIG. 1 is a block diagram containing one embodiment of the present invention.

本実施例のROMシミュレータ1け、入出力手段112
表示手段12.記憶手段13.接続手段14、により構
成され、データ処理装置2は1% (1M21.データ
処理部22を含んで構成される。
One ROM simulator of this embodiment, input/output means 112
Display means 12. Storage means 13. The data processing device 2 includes a 1% (1M21.data processing section 22).

几0M21に書込むデータのデバグを行う時、このデー
タを入出力手段11から記憶手段13へ書込む。この時
に必要な情報は表示手段12によって表示される。また
、記憶手段13に書込まれたデータの一部を修正する場
合は、入出力手段11からの指示によって、記憶手段1
3からデータを読出し、読出したデータを表示手段12
に表示し、データを修正して、記憶手段13へ書込むこ
とによって行われる。
When debugging data to be written to the 0M21, this data is written from the input/output means 11 to the storage means 13. Information necessary at this time is displayed by the display means 12. In addition, when modifying a part of the data written in the storage means 13, the storage means 1
3 and displays the read data on the display means 12.
This is done by displaying the data on the screen, modifying the data, and writing it into the storage means 13.

データ処理装置2とROMシミーレータ1は、接続手段
14を介して、第2図のようにコネクタ141によって
接続され、データ処理装置2と接続された状態では接続
手段14の出力によってROM21のイネーブル端子E
が出力禁止状態におさえられる。すなわち、接続手段1
4から抵抗器2.)(,1を介してイネーブル端子に電
位が印加され出力禁止状態となる。したがって、このR
OMのデータ出力は出力禁止となる。この状態でデータ
処理部22から出力されるアドレス情報は接続手段14
を介して記憶手段13に送られ、記憶手段13からアド
レス情報に対応したデータが接続手段14を介してデー
タ処理部22に送られる。
The data processing device 2 and the ROM simulator 1 are connected via the connecting means 14 by a connector 141 as shown in FIG.
is inhibited from outputting. That is, the connection means 1
4 to resistor 2. )(, 1, a potential is applied to the enable terminal and the output is prohibited. Therefore, this R
OM data output is prohibited. In this state, the address information output from the data processing section 22 is
The data corresponding to the address information is sent from the storage means 13 to the data processing section 22 via the connection means 14.

データ処理装置2とROMシミュレータ1が接続されて
いない状態でfrj、ROfv121は出力可能状態と
なるため、データ処理部22へはR,0M21からのデ
ータが送られる。
Since the frj and ROfv 121 are in an output enabled state when the data processing device 2 and the ROM simulator 1 are not connected, data from the R and 0M 21 is sent to the data processing unit 22.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、データ処理装置のROM
を実装したままの状態でも、ROMシミュレータを接続
することができ、かっR,OMシミュレータの記憶手段
に書込まれたデータをデータ処理装置のROMのデータ
の代わりとしてデータ処理装置で利用できる効果がある
As explained above, the present invention provides a ROM for a data processing device.
A ROM simulator can be connected even when the ROM is installed, and the data written in the storage means of the OM simulator can be used in the data processing device in place of the data in the ROM of the data processing device. be.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を含むブロック図、第2図は
第1図の接続手段の詳細図である。 1・・・・・・R,0Mシミーレータ、2・・・・・・
データ処理装置、11・・・・・・入出力手段、12・
・・・・・表示手段、13・・・・・・記憶手段、14
・・・・・・接続手段、21・・・・・・ROM、22
・・・・・・データ処理部、141・・・・・・コネク
タ、几1.R2・・・・・・抵抗器。
FIG. 1 is a block diagram including an embodiment of the present invention, and FIG. 2 is a detailed diagram of the connecting means of FIG. 1. 1...R, 0M simulator, 2...
Data processing device, 11... Input/output means, 12.
... Display means, 13 ... Storage means, 14
...Connection means, 21...ROM, 22
...Data processing unit, 141...Connector, 几1. R2...Resistor.

Claims (1)

【特許請求の範囲】[Claims]  読出し専用メモリを含むデータ処理装置から得られる
アドレス情報に対応したデータをこのデータ処理装置へ
出力する記憶手段と、この記憶手段にデータを書込み、
かつこの記憶手段に書込まれたデータを読取る入出力手
段と、この入出力手段の指示に従って前記記憶手段にデ
ータを書込み、あるいは読取るために必要な情報を表示
する表示手段と、前記記憶手段と前記データ処理装置と
の間を前記アドレス情報及びデータの経路として接続し
、前記データ処理装置と接続された時には前記読出し専
用メモリを出力禁止状態とし、かつ接続の着脱ができる
接続手段とを備えたことを特徴とする読出し専用メモリ
シミュレータ。
a storage means for outputting data corresponding to address information obtained from a data processing device including a read-only memory to the data processing device; writing data in the storage means;
and input/output means for reading data written in the storage means, display means for displaying information necessary for writing or reading data in the storage means according to instructions from the input/output means, and the storage means. Connecting means is connected to the data processing device as a path for the address information and data, and when connected to the data processing device, the read-only memory is inhibited from outputting, and the connection is detachable. A read-only memory simulator characterized by:
JP60274531A 1985-12-05 1985-12-05 Read only memory simulator Pending JPS62133537A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60274531A JPS62133537A (en) 1985-12-05 1985-12-05 Read only memory simulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60274531A JPS62133537A (en) 1985-12-05 1985-12-05 Read only memory simulator

Publications (1)

Publication Number Publication Date
JPS62133537A true JPS62133537A (en) 1987-06-16

Family

ID=17543001

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60274531A Pending JPS62133537A (en) 1985-12-05 1985-12-05 Read only memory simulator

Country Status (1)

Country Link
JP (1) JPS62133537A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007260584A (en) * 2006-03-29 2007-10-11 Takubo Engineering Co Ltd Apparatus for feeding powder coating material

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007260584A (en) * 2006-03-29 2007-10-11 Takubo Engineering Co Ltd Apparatus for feeding powder coating material

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