JPS6320545A - Register read-out device for emulator - Google Patents

Abstract

PURPOSE:To read out the contents of a write only register by using an emulator, by constituting the titled device so that a write data is written in response to an output of the first decoder, and the stored contents are read out in response to an output of the second decoder. CONSTITUTION:The second decoder 104 in a register reading-out circuit 243 sets an output 114 to a high level, when a read-out access is executed to some specific address Ab being different from an address A of a register R, in a background state. Accordingly, when a monitor running on a microprocessor 245 executes a read-out access to this address Ab, a data in a register 106, namely, a data which has been written in a write only register R recently is read out. This data is displayed on a CRT display, etc. provided on a host. In this way, in case a user program executes an access to a usual memory, the register 106 is invisible, and the access is executed to a usual memory, therefore, an address used by the user program is not limited.

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to an apparatus for reading the contents of registers within a microprocessor in an emulator.

(Technical background of the invention and its problems) Emulators have traditionally been used to develop systems incorporating microprocessors.This emulator is connected in place of the microprocessor in the target system under development. By operating the emulator, the emulator traces the execution state of the program, sets break points, monitors signals on the bus, etc. The general purpose, structure, and operation of an emulator are well known to those skilled in the art. For example, Hewlett-Packard Jou
Please refer to the October 1980 and March 1983 issues of rnal for detailed explanations.

As one of the 'J1flF's of the emulator, it is possible to read the contents of memory and registers. By using this function, you can obtain a lot of information such as whether the contents of registers and memory are as intended at any stage of program execution, and whether the hardware is operating as intended. Can be done.

Emulators typically include buffers, gates, etc. used to transfer data, addresses, and control signals between the microprocessor itself and a target system or host of a microprocessor development system. Instead of the microprocessor in the target system, a microprocessor of the same type installed in the emulator is used to execute the user program. To read the contents of the memories and registers mentioned above, first, execution of the user program on the microprocessor in the emulator is interrupted at an appropriate point. Here, a monitor is run on this microprocessor to read out the contents of memory and registers and send them to the host.

In some types of one-chip microprocessors, some of the 110Mm registers provided within the chip are write-only. Attempting to perform the read operation described above on this write-only register will not result in meaningful data.

Therefore, when debugging a system using such a microprocessor using an emulator, it is difficult to know what is actually written in the write-only register.

[Purpose of the invention]

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems of the prior art and to make it possible to read the contents of a write-only register using an emulator in exactly the same way as other registers and memories.

(Summary of the Invention) According to an emulator register readout device according to an embodiment of the present invention, a one-chip microprocessor used here has an l108m register to which a memory address is given within the chip, and a processor When writing to such an internal register, the address and write data appear in an external bin.The address thus output is decoded within the emulator and written to the write-only register. If a write is detected, the data is written to a register. Also, while the monitor is running, it kills a decoder that detects an access to a certain address that is a write-only register, and When detected, reading from the register described above is performed.

With this configuration, while the user program is running, it operates exactly like the emulated microprocessor, and while the monitor is running, registers that hold the same contents as write-only registers are read. It becomes possible.

(Embodiments of the invention) FIG. 2 is an overall block diagram of one embodiment of the present invention.

In the figure, the emulator 24 is connected by inserting a connector 241 into the microprocessor socket of the target system 22. Emulator 24 is further connected to a host 26 of the microprocessor development system. Target system 22, emulator 24, and host 26 have control lines 245 and address lines.
A line 246 and a data line 247 are provided. Also provided within the emulator 24 are a buffer 242 with the target system 22, a buffer 244 with the host, a microprocessor 245, an fI1111 circuit 245, and a register read circuit according to the present invention. Further, a control circuit 246 is provided for performing various f11 controls such as whether or not the buffers 242 and 244 transmit signals, and the direction in which the signals are transmitted.

Also, within the host 26, there is an emulation memory that can be used as a code and data area for various AM control circuits and user programs running on the microprocessor 245, as well as a monitor running on the microprocessor 245 in the background layer. Background memory is provided for code and data.

In this embodiment, two states are provided: a foreground state and a background state. The foreground state is a state in which a user program is running on the microprocessor 245 within the emulator 24. In addition, the background state is a state in which the monitor is running on this microprocessor 245 and, for example, displays the contents of memory and registers. One FG/BG in 7iIJ line 245
It is given from the host 26 as a signal line.

For details of the operation of a system such as that shown in FIG. 2, see, for example, the eta publication.

FIG. 1 is a block diagram showing a register readout circuit 243, which is the central part of the embodiment shown in FIG. When microprocessor 245 in FIG. 2 is writing to its internal write-only register R, register R is written on address line 246 and data line 247, respectively.
address A and write data are output.

Further, a control signal necessary for writing is output onto the control line 245. In other words, a write operation to an internal register is performed on the bin in the same manner as if the microprocessor 245 were performing a write access to an area outside the chip.

This address A is given on the path and also on the control line 2
When the R/W signal line in 45 indicates a write operation, the first decoder 102 in FIG.
2 is considered high level.

As a result, the register 106 contains the data at that time.
The data on line 147, the same data that is being written to register R inside microprocessor 245, is stored.

Here, microprocessor 245 registers R
Even if a read access is made to address A in order to read the contents of register R, reading from register R is not performed. Additionally, since microprocessor 245 does not receive input from external data line 247 during read access to registers within the chip, even if a read access to register R is detected outside the chip, data will be sent from register 106. It is useless to apply .

Now, suppose that the system state is switched from the foreground state to the background state after writing is performed in the write-only register R in this manner. At this time, the signal line becomes low level at FG/100.

The second decoder 104 in the register readout circuit 243 is
In the background state, when a read access is made to a certain address Ab different from the address A of the register R, the output 114 goes high. Therefore, when a monitor running on microprocessor 245 makes a read access to this address Ab, the data in register 106, ie, the data recently written to write-only register R, is read. This data is displayed on a CRT display or the like provided in the host. When the user specifies register R1, the address A may be used or the name of the register may be used. Furthermore, when displaying the ends of a register group all at once, it is of course possible to include this write-only register.

By using the above-described configuration, when a user program accesses address Ab, register 106
is invisible and accesses are made to normal memory, so there is no restriction on the addresses used by the user program.

Note that if the microprocessor 245 has an internal register with an address, the address Ab
It is sufficient to assign an address other than such an address.

Furthermore, it should be noted that the configurations shown in FIGS. 1 and 2 are simplified to make the explanation easier to understand. For example, in FIG. 1, other control signals are naturally required for writing/hl output, but these are well known and are therefore omitted. In addition, in FIG. 2, it appears that all L' path signals between the host 26 and the microprocessor 245 are also IM'd to the target system 22, but in reality, for example, FG/BG signal lines, etc. - Not connected to system 22.

Furthermore, if the write-only register R is initialized by a reset or the like (or the 170 control circuit corresponding to this register is initialized), the register 106 in the register read circuit 243 A means for performing similar initialization must also be provided.

In addition, there may be cases where the microprocessor actually used in the target system 22 and the microprocessor 245 in the emulator differ slightly, or even if the same microprocessor is used, this microprocessor may differ in internal configuration. operation mode, but if the microprocessor 245 in the emulator 24 is always operated in a specific operation mode,
An additional circuit must be provided in the emulator 24 or the host 26 to absorb the difference in configuration between the target side and the emulator side. For example, for internal registers that are not present on the microprocessor 245 side (or do not appear in the mode in which it is operating), the microprocessor 245 may have registers, decoders, etc. to emulate them.
It must be installed around 5.

Further, the register reading circuit 243 may be provided in the host 26.

Further, in the above embodiment, a memory address is given to the write-only register in the chip, but depending on the architecture of the microprocessor, this register may be given an I10 address. It will be clear that the present invention is equally applicable in this case as well.

〔Effect of the invention〕

As explained above, according to the present invention, even though an emulator is used that operates exactly the same as the emulated microprocessor from the perspective of a user program, data in read-only registers can be read from the monitor. Since it can be read in the same way as other memories and registers, it is possible to improve the efficiency of debugging the target system.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the main parts of an embodiment of the present invention, and FIG.
The figure is an overall block diagram of one embodiment of the present invention. 22: Target system, 24: Emulator, 26: Host, 102: First
Decoder, 104: Second decoder, 106: Register, 243: Register reading circuit.

Claims (1)

[Scope of Claims] An emulator including a microprocessor having a write-only register and outputting a first address and write data to a pin when writing to the write-only register, comprising: a first address detecting the first address; a second decoder that detects a second address different from the first address while the monitor is running; and a second decoder that writes the write data in response to the output of the first decoder;
1. A register reading device for an emulator, comprising: a register whose stored contents are read out in response to an output from a decoder.