JPS62129844U - - Google Patents
Info
- Publication number
- JPS62129844U JPS62129844U JP1595086U JP1595086U JPS62129844U JP S62129844 U JPS62129844 U JP S62129844U JP 1595086 U JP1595086 U JP 1595086U JP 1595086 U JP1595086 U JP 1595086U JP S62129844 U JPS62129844 U JP S62129844U
- Authority
- JP
- Japan
- Prior art keywords
- tuning
- circuit
- inductance element
- image trap
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 5
- 230000008878 coupling Effects 0.000 claims description 3
- 238000010168 coupling process Methods 0.000 claims description 3
- 238000005859 coupling reaction Methods 0.000 claims description 3
- 230000005669 field effect Effects 0.000 claims description 3
- 230000002238 attenuated effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Noise Elimination (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Description
第1図は考案の実施例の要部回路図、第2図は
従来の受信機の要部回路図、第3図は本考案の実
施例の同調回路周波数特性図、第4図は従来のイ
メージトラツプ付同調回路の周波数特性図を示す
。
1……同調回路、2……高周波同調回路、3…
…混合回路、4……局部発振回路、5……中間周
波回路、L1……アンテナインダクタンス、L2
……同調インダクタンス、L3……イメージトラ
ツプインダクタンス、L4……インダクタンス、
C1……可変容量ダイオードとコンデンサからな
る同調容量、C2……結合容量、T1……電界効
果トランジスタ。
Fig. 1 is a circuit diagram of the main part of the embodiment of the invention, Fig. 2 is a circuit diagram of the main part of a conventional receiver, Fig. 3 is a frequency characteristic diagram of the tuning circuit of the embodiment of the invention, and Fig. 4 is a diagram of the conventional receiver. A frequency characteristic diagram of a tuned circuit with an image trap is shown. 1...tuned circuit, 2...high frequency tuned circuit, 3...
...Mixing circuit, 4...Local oscillation circuit, 5...Intermediate frequency circuit, L1 ...Antenna inductance, L2
... Tuning inductance, L 3 ... Image trap inductance, L 4 ... Inductance,
C 1 ... Tuning capacitance consisting of a variable capacitance diode and a capacitor, C 2 ... Coupling capacitance, T 1 ... Field effect transistor.
Claims (1)
子によりイメージトラツプ回路を構成し、結合コ
ンデンサを介して電界効果トランジスタに接続さ
れる電子同調型の同調回路を有する受信機におい
て、上記結合コンデンサと直列に第2のインダク
タンス素子を接続し、上記結合コンデンサ及び上
記第2のインダクタンス素子及び上記電界効果ト
ランジスタの入力容量により、イメージトラツプ
より高域の周波数を減衰させることを特徴とする
受信機。 In a receiver having an electronic tuning type tuning circuit in which an inductance element connected in series with a tuning capacitor constitutes an image trap circuit and is connected to a field effect transistor via a coupling capacitor, an image trap circuit is configured with an inductance element connected in series with a tuning capacitor. 2. A receiver, characterized in that two inductance elements are connected, and frequencies higher than an image trap are attenuated by the input capacitance of the coupling capacitor, the second inductance element, and the field effect transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1595086U JPS62129844U (en) | 1986-02-05 | 1986-02-05 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1595086U JPS62129844U (en) | 1986-02-05 | 1986-02-05 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62129844U true JPS62129844U (en) | 1987-08-17 |
Family
ID=30807357
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1595086U Pending JPS62129844U (en) | 1986-02-05 | 1986-02-05 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62129844U (en) |
-
1986
- 1986-02-05 JP JP1595086U patent/JPS62129844U/ja active Pending
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