JPS60193723U - FM receiver - Google Patents
FM receiverInfo
- Publication number
- JPS60193723U JPS60193723U JP8041284U JP8041284U JPS60193723U JP S60193723 U JPS60193723 U JP S60193723U JP 8041284 U JP8041284 U JP 8041284U JP 8041284 U JP8041284 U JP 8041284U JP S60193723 U JPS60193723 U JP S60193723U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- high frequency
- inductance
- receiver
- tuning
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Noise Elimination (AREA)
- Superheterodyne Receivers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の実施例の要部回路図、第２図は妨害比
の実測曲線図、第３図は従来のＦＭ受信機の要部回路図
である。
１はアンテナ同調回路、２は高周波増幅回路、３．５は
股間結合回路、４は高周波同調回路、６は混合回路、７
は局部発振回路、８は中間周波回路、Ｃ３はアンテナ同
調容量、Ｃ４は高周波同調容量、Ｌ３はアンテナ同調イ
ンダクタンス、Ｌ４はトラップ回路を構成するインダク
タンス、Ｌ５は高周波同調インダクタンス、Ｌ６は高周
波同調インダクタンスの一部となると共にトラップ回路
を構成するインダクタンスである。FIG. 1 is a circuit diagram of a main part of an embodiment of the present invention, FIG. 2 is a diagram of an actual measurement curve of interference ratio, and FIG. 3 is a circuit diagram of a main part of a conventional FM receiver. 1 is an antenna tuning circuit, 2 is a high frequency amplifier circuit, 3.5 is a crotch coupling circuit, 4 is a high frequency tuning circuit, 6 is a mixing circuit, 7
is a local oscillation circuit, 8 is an intermediate frequency circuit, C3 is an antenna tuning capacitor, C4 is a high frequency tuning capacitor, L3 is an antenna tuning inductance, L4 is an inductance that constitutes a trap circuit, L5 is a high frequency tuning inductance, and L6 is a high frequency tuning inductance. This is an inductance that forms part of the trap circuit.
Claims (1)
するＦＭ受信機に於いて、前記アンテナ同調回路のアン
テナ同調容量と直列に、局部発振回路の第２高調波と中
間周波とによるスプリアス妨害波に対するトラップ回路
を構成するインダクタンスを接続し、且つ前記高周波同
調回路の高周波同調容量と直列に、高周波同調インダク
タンスの一部となると共に、イメージ周波数のトラップ
回路を構成するインダクタンスを接続したことを特徴と
するＦＭ受信機。In an FM receiver having an electronically tuned antenna tuning circuit and a high frequency tuning circuit, a filter for spurious interference waves caused by the second harmonic and intermediate frequency of the local oscillation circuit is connected in series with the antenna tuning capacity of the antenna tuning circuit. An inductance forming a trap circuit is connected, and an inductance forming a part of the high frequency tuning inductance and forming an image frequency trap circuit is connected in series with the high frequency tuning capacitor of the high frequency tuning circuit. FM receiver.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8041284U JPS60193723U (en) | 1984-06-01 | 1984-06-01 | FM receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8041284U JPS60193723U (en) | 1984-06-01 | 1984-06-01 | FM receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60193723U true JPS60193723U (en) | 1985-12-23 |
Family
ID=30626239
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8041284U Pending JPS60193723U (en) | 1984-06-01 | 1984-06-01 | FM receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60193723U (en) |
-
1984
- 1984-06-01 JP JP8041284U patent/JPS60193723U/en active Pending
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