JPS62125747A - Signal reception circuit - Google Patents

Signal reception circuit

Info

Publication number
JPS62125747A
JPS62125747A JP60263867A JP26386785A JPS62125747A JP S62125747 A JPS62125747 A JP S62125747A JP 60263867 A JP60263867 A JP 60263867A JP 26386785 A JP26386785 A JP 26386785A JP S62125747 A JPS62125747 A JP S62125747A
Authority
JP
Japan
Prior art keywords
collector
signal
transistor
resistor
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60263867A
Other languages
Japanese (ja)
Other versions
JPH0379906B2 (en
Inventor
Michio Enda
圓田 道夫
Toshiyuki Tawara
俊幸 田原
Hiroyasu Uehara
上原 啓靖
Yasunobu Inabe
井鍋 泰宣
Toshio Hayashi
林 敏夫
Tadakatsu Kimura
木村 忠勝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP60263867A priority Critical patent/JPS62125747A/en
Publication of JPS62125747A publication Critical patent/JPS62125747A/en
Publication of JPH0379906B2 publication Critical patent/JPH0379906B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To receive a signal of a subscriber line with good balance by using a beta compensation type current mirror circuit to convert in-phase noise into a current signal in a subscriber circuit, adding a collector of a beta compensation transistor (TR) to a current output of a signal reception circuit thereby eliminating the deviation of the ratio of the reception signals of subscriber lines A, B and using a semiconductor element. CONSTITUTION:A voltage signal at a subscriber line terminal A is inputted as a current signal in the beta compensation current mirror circuit Ac and a current signal is outputted from the collector of TRs Q2, Q3. A voltage signal at a subscriber line terminal B is inputted to a Darlington current mirror circuit Bc, a current output is given from the collector of the TR Q12 and a voltage is outputted from the emitter of the TR Q13. The collector of the beta compensation TR Q24 of the circuit Ac is connected to the collector of the Darlington TR Q23. Thus, the current signal is increased by the collector current of the TR Q24 to eliminate the deviation of the reception signals of the subscriber lines A, B thereby eliminating the noise due to the in-phase signal.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、TD交換機の加入者回路における信号受信及
び信号伝送に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to signal reception and signal transmission in a subscriber circuit of a TD exchange.

(従来の技術) 従来、加入者端末への電流供給及び加入者端末からの信
号受信等を行う加入者回路は、レターコイル、トランス
等を主体とした電磁部品で構成されており、小型化が困
難な反面、加入者線A、Hに生じた信号をバランスよく
受信するという点では優れていた。
(Prior art) Conventionally, subscriber circuits that supply current to subscriber terminals and receive signals from subscriber terminals are composed of electromagnetic components mainly consisting of letter coils, transformers, etc. Although it was difficult, it was excellent in receiving the signals generated on subscriber lines A and H in a well-balanced manner.

(発明が解決しようとする問題点) 一方、近年半導体技術の進歩てより前記電磁部品主体の
加入者回路の半導体電子化が進められつつちるが、半導
体素子は完全な相補素子ができないため、充分バランス
のよい信号回路を実現するには困難であった。
(Problems to be Solved by the Invention) On the other hand, due to advances in semiconductor technology in recent years, subscriber circuits mainly consisting of electromagnetic components are being made into semiconductor electronics. It was difficult to realize a well-balanced signal circuit.

本発明の目的は、前記従来の欠点を除去し、半導体素子
を用いて・ぐランスよく加入者線の信号を受信する信号
受信回路を実現することにある。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks of the conventional circuit and to realize a signal receiving circuit that can receive subscriber line signals with ease using semiconductor elements.

(問題点を解決するだめの手段) この発明は、電池を基準にしたりップルフィルタ回路と
、リップルフィルタによって生じる直流電圧分を補正す
る直流電圧補正回路をもつ加入者回路において、加入者
線A、Bには本来の信号である差動信号と同相雑音が生
じるが、この信号を受信し、同相雑音を除去し差動信号
のみを伝送する必要がある。しかしA、B各々の受信回
路の受信特性が直流電圧補正回路によって異なるため、
除去すべき同相雑音も伝送されてしまうので、本発明は
これを防ぐだめ、β補償型カレントミラー回路で電流信
号に変換し、さらにその出力電流を電圧信号に変換する
際β補償用トランジスタのコレクタをカレントミラー出
力と接続し、β補1賞用トランジスタのコレクタ電流分
だけ電流信号を太きくシ、前記交流信号を伝送する比率
のずれをなくすことによって同相信号成分を除去するよ
うにしたものである。
(Means for Solving the Problems) The present invention provides a subscriber circuit that uses a battery as a reference or has a pull filter circuit and a DC voltage correction circuit that corrects the DC voltage component generated by the ripple filter. , the original differential signal and common mode noise occur, but it is necessary to receive this signal, remove the common mode noise, and transmit only the differential signal. However, since the receiving characteristics of the A and B receiving circuits differ depending on the DC voltage correction circuit,
The common mode noise that should be removed is also transmitted, so in order to prevent this, the present invention converts it into a current signal using a β-compensated current mirror circuit, and further converts the output current into a voltage signal by connecting the collector of the β-compensating transistor. is connected to the current mirror output, the current signal is thickened by the collector current of the β complement 1 prize transistor, and the in-phase signal component is removed by eliminating the shift in the ratio of transmitting the AC signal. It is.

(作用) 上述した手段によれば、加入者線に生じた信号を受信す
る回路において、A、B線各々の受信回路で受信された
信号の比率のずれを除去し、差動信号出力端子に同相信
号がノイズとして付与されるのを防止することができる
(Operation) According to the above-mentioned means, in the circuit that receives the signal generated on the subscriber line, the deviation in the ratio of the signals received by the receiving circuits of the A and B lines is removed, and It is possible to prevent the in-phase signal from being added as noise.

(実施例) 以下図面を参照して実施例を説明する。(Example) Examples will be described below with reference to the drawings.

第1図は本発明の実施例を示す図である。FIG. 1 is a diagram showing an embodiment of the present invention.

図においてACはベースが共通なトランジスタQ21 
’ Q22 ’ Q23と、各々のエミッタ抵抗R21
゜R22’R25と、トランジスタQ2+にベース、ベ
ースとエミッタが接続されたβ補償用トランジスタQ2
4からなるβ補償型カレントミラー回路であり、トラン
ジスタQ21のコレクタは、抵抗R11を介して端子A
と接続され、端子への電圧信号が電流信号として人力さ
れ、トランジスタQ22゜Q23のコレクタから電流信
号として出力される。
In the figure, AC is a transistor Q21 with a common base.
'Q22' Q23 and each emitter resistor R21
゜R22'R25 and a β compensation transistor Q2 whose base and base and emitter are connected to the transistor Q2+.
The collector of the transistor Q21 is connected to the terminal A via the resistor R11.
The voltage signal to the terminal is inputted as a current signal, and is output as a current signal from the collectors of transistors Q22 and Q23.

R,Aはコレクタを電池に接続し、ベースを共通とした
トランジスタQ25と2倍のエミッタ面積をもつダブル
エミッタトランジスタQ26、及び該トランジスタのベ
ース、電池間の抵抗R31とベース・アース間の容量C
1からなるリップルフィルタ回路でちり、Q26のエミ
ッタは、前記β補償型カレントミラー回路A。のl・ラ
ンジスタQ21及びQ23のエミッタ抵抗の他端と接続
され、Q25のエミッタは、トランジスタQ22のエミ
ッタ抵抗の他端と接続され、電源からのノイズが信号成
分として混入されるのを防ぐ。
R and A are a double emitter transistor Q26 whose collector is connected to the battery and whose emitter area is double that of the transistor Q25 which has a common base, the resistance R31 between the base of the transistor and the battery, and the capacitance C between the base and ground.
1, and the emitter of Q26 is the β-compensated current mirror circuit A. The emitter of transistor Q25 is connected to the other end of the emitter resistor of transistor Q21 and Q23, and the emitter of transistor Q25 is connected to the other end of the emitter resistor of transistor Q22 to prevent noise from the power supply from being mixed in as a signal component.

Bcはベースを共通としたダーリントントランジスタQ
11.Q1□及び各々のダーリントントランジスタのエ
ミッタに接続されたエミッタ抵抗R24゜レントミラー
回路でq1+のコレクタ・ベースで抵抗R12を介して
端子Bと接続され、端子Bの電圧信号を入力し、Q12
のコレクタから電流出力、Q10のエミッタから電圧出
力される。
Bc is a Darlington transistor Q with a common base
11. The emitter resistor R24 connected to the emitter of Q1□ and each Darlington transistor is connected to the terminal B via the resistor R12 at the collector base of q1+ in the current mirror circuit, and the voltage signal of the terminal B is input, and the Q12
A current is output from the collector of Q10, and a voltage is output from the emitter of Q10.

P、Bハ、ベースを共通としたトランジスタQ14゜Q
10と、該トランジスタのベースと地気を接続する抵抗
R3□からなる直流電圧補償回路で、トランジスタQ1
4 、Q15のエミッタは、前記ダーリントンカレント
ミラー回路B。のQ10.Q10のエミッタ抵抗R24
、R25と接続され、前記リップルフィルタR,Aと電
圧的に補償をとる回路である。
P, Bc, transistor Q14゜Q with common base
10, and a resistor R3□ connecting the base of the transistor to the ground.
4. The emitter of Q15 is the Darlington current mirror circuit B. Q10. Emitter resistance R24 of Q10
, R25, and compensates for voltage with the ripple filters R and A.

また、トランジスタQ22のコレクタば、グーリントン
トランジスタQ12に接続され、同相信号を出力端子と
なり、トランジスタQ23のコレクタは、Q13と抵抗
R26を介して接続され、差動信号を電圧出力として出
力する端子となる。
The collector of the transistor Q22 is connected to the Goulington transistor Q12 and serves as an output terminal for the in-phase signal, and the collector of the transistor Q23 is connected to Q13 via a resistor R26 and is a terminal that outputs the differential signal as a voltage output. becomes.

以上説明した回路において、端子A、Bには、信号電圧
である差動電圧とともに、外部からのノイズにより同相
信号も生じるが、第2図(a)のようにA、B線に差動
信号u o A l vD B、同相信号vCA 1υ
。8が生じた場合、A、B線の信号受信の比率が同じで
あれば、第2図(b)に示すようにA線信号。
In the circuit described above, in addition to the differential voltage that is the signal voltage, a common-mode signal is also generated at the terminals A and B due to external noise. Signal u o A l vD B, common mode signal vCA 1υ
. 8 occurs, and if the signal reception ratios of A and B lines are the same, the A line signal is received as shown in FIG. 2(b).

B線信号を受信し、電圧出力端子では、同相信号成分が
打ち消され、差動信号成分だけになるが、信号受信の比
率がずれていると第2図(c)のように信号を受信し、
同相成分が打ち消されず残ってしまいノイズになってし
まう。
When a B line signal is received, the in-phase signal component is canceled at the voltage output terminal, leaving only the differential signal component. However, if the signal reception ratio is incorrect, the signal is received as shown in Figure 2 (c). death,
The in-phase component is not canceled out and remains, resulting in noise.

のトランスコングクタンスをgm1増幅率をβとすると
、端子Bに交流信号電圧vBが生じたとき、抵抗R1□
に流れる電流iBは、 となり、端子Aに交流信号電圧1)Aが生じたときに、
抵抗R1□に流れる電流iAは、 となる。式中でgm 、βはトランジスタによって決ま
り、変えられないだめ、(1)式と(2)式の差を小さ
くするには、R1を大きく、R2,R3を小さくすれば
よいが、通常、R1=30に、Q、R2=1okΩ、R
5=15にΩ程度であるので、以後、この値として考え
る、また、トランジスタの増幅率β=501直流バイア
ス電流は、はぼ平均的な値として、コレクタ’B= υ
B/ 4(19K    ’j−A= vA740.5
にとなり、i8とiAのずれは、υい=υ8とすると、
さらに、iBによって電圧出力端子に生じる電圧Vx[
lば、 であり、!補償用トランジスタQ24のコレクタを、Q
23のコレクタに接続しない場合、電流iAによって電
圧出力端子に生じる電圧■。は、 ダーリントントランジスタQ13の初段のトランジとな
り、数値を代入すると、VXB= 1BX10.7K。
Let gm1 be the amplification factor β, then when AC signal voltage vB is generated at terminal B, resistor R1□
The current iB flowing through is, and when an AC signal voltage 1)A is generated at terminal A,
The current iA flowing through the resistor R1□ is as follows. In the formula, gm and β are determined by the transistor and cannot be changed.In order to reduce the difference between equations (1) and (2), R1 should be made large and R2 and R3 should be made small, but usually R1 =30, Q, R2=1okΩ, R
Since 5=15 is about Ω, we will consider this value from now on.Also, the transistor amplification factor β=501, and the DC bias current is assumed to be an average value, collector 'B= υ
B/4 (19K'j-A= vA740.5
, and the difference between i8 and iA is υi=υ8,
Furthermore, the voltage Vx[
If it is, it is! The collector of the compensation transistor Q24 is
When not connected to the collector of 23, the voltage ■ generated at the voltage output terminal by the current iA. is the first stage transistor of Darlington transistor Q13, and by substituting the numerical values, VXB = 1BX10.7K.

VXA = iAX 10.I K zBとiAが等し
いとすると、10.7 K−10,1K V工8とvXAは、  10.7K   ×100舞6
%のず上ユx 1o oギIのずれとなる。これは、直
流電1.01 圧補償回路R,Bの抵抗R3□に生じる信号分だけB線
側信号が大きくなっているだめであり、この値を補正す
るため、本発明の特徴であるβ補償用トランジスタQ2
4のコレクタをダーリントントランジスタQ23のコレ
クタに接続すると、VxAば、VXA = ’A (1
+  ) (R2+  )    −(5)β    
gm であり、数値を代入するとVXA舞iいX10.7にと
なり、iA=輸ならばB線側との信号のずれがなくなす
、輸とiAのずれを考慮しても、t、 OI X 10
0#99チで、1チのずれしか生じない。
VXA = iAX 10. Assuming that I K zB and iA are equal, 10.7 K-10,1K V 8 and vXA are 10.7K × 100 Mai 6
The deviation will be % of the above. This is because the signal on the B line side is increased by the signal generated in the resistor R3□ of the DC voltage compensation circuit R, B. To correct this value, β compensation, which is a feature of the present invention, is required. transistor Q2
When the collector of 4 is connected to the collector of Darlington transistor Q23, if VxA, VXA = 'A (1
+ ) (R2+) −(5)β
gm, and by substituting the numerical values, VXA difference becomes 10
At 0#99, only a 1 inch deviation occurs.

このように、信号受信回路のβ補償用トランジスタのコ
レクタを、信号受信回路の電流出力に付加することによ
り、加入者線A、Bの受信信号の比率のずれを除去し、
同相信号によるノイズを除去することができる。
In this way, by adding the collector of the β compensation transistor of the signal receiving circuit to the current output of the signal receiving circuit, the difference in the ratio of the received signals of subscriber lines A and B is removed.
Noise caused by common-mode signals can be removed.

(発明の効果) 以上詳細に説明したように本発明によれば、べ−タ補償
用トランジスタのコレクタを電流出力の端子に接続し、
電流信号を増加させることによって、加入者線A、Bに
生じた信号を受信する際の信号の比率のずれを除去する
ことができる。
(Effects of the Invention) As described in detail above, according to the present invention, the collector of the beta compensation transistor is connected to the current output terminal,
By increasing the current signal, it is possible to eliminate the difference in signal ratio when receiving signals that occur on subscriber lines A and B.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例の信号受信回路図、第2図(a
)、第2図(b)及び第2図(c)は信号波形の説明ブ
ルエミッタトランノスタ、C1・・・容量、■o・・・
定電流源。 特許出願人 沖電気工業株式会社 日本電信電話株式会社 ツヤく嘴に5明0大2申hイクqのイJシ汚≦ヒイ;ム
回路図第1図
FIG. 1 is a signal receiving circuit diagram of an embodiment of the present invention, and FIG. 2 (a
), Fig. 2(b) and Fig. 2(c) are explanations of signal waveforms. Bull emitter trannostar, C1...capacitance, ■o...
Constant current source. Patent Applicant: Oki Electric Industry Co., Ltd. Nippon Telegraph and Telephone Co., Ltd.

Claims (1)

【特許請求の範囲】 ベースを各々、共通の抵抗を介して地気に接続した1組
のトランジスタのエミッタと抵抗を介してベースを共通
に接続した一組のダーリントントランジスタのエミッタ
と接続し、一方のダーリントントランジスタのコレクタ
を該ダーリントントランジスタのベースに接続し抵抗を
介して一対の加入者線の一方に接続し、かつ前記該ダー
リントントランジスタのエミッタにベースを接続しコレ
クタを前記ベースを抵抗を介して地気に接続したトラン
ジスタの一方のコレクタと接続すると同時にエミッタを
信号出力端子とするダーリントントランジスタからなる
B線側信号受信回路と対となるA線側信号受信回路にお
いて、 コレクタを電源に、ベースは共通の抵抗を介して電源に
接続すると同時に容量を介して地気に接続した一組のト
ランジスタで、一方が他方の2倍の面積を有するトラン
ジスタとし、そのエミッタを第1出力、他方のトランジ
スタのエミッタを第2出力とするリップルフィルタ回路
の第1出力が、抵抗を介してベースを共通とした3個の
トランジスタ中、2個のトランジスタのエミッタに、第
2出力を他の1個のトランジスタのエミッタに接続し、
かつ前記リップルフィルタの第1出力に抵抗を介して接
続した2個のトランジスタ中、1個のトランジスタのコ
レクタとベースを接続し、エミッタを該トランジスタの
ベースを接続したベータ補償用トランジスタのコレクタ
と前記リップルフィルタの第1出力に接続した他のトラ
ンジスタのコレクタを接続されると同時に、抵抗を介し
て前記B線側信号受信回路の信号出力端子に接続すると
同時に電圧出力端子として構成されたことを特徴とする
信号受信回路。
[Claims] The bases are each connected to the emitters of a pair of transistors connected to ground through a common resistor and the emitters of a pair of Darlington transistors whose bases are connected in common through a resistor, respectively; The collector of the Darlington transistor is connected to the base of the Darlington transistor and connected to one of a pair of subscriber lines through a resistor, and the base is connected to the emitter of the Darlington transistor, and the collector is connected to the base of the Darlington transistor through a resistor. In the A line side signal receiving circuit paired with the B line side signal receiving circuit consisting of a Darlington transistor whose emitter is connected to the collector of one of the transistors connected to the ground and whose emitter is used as a signal output terminal, the collector is used as a power source and the base is A pair of transistors connected to a power source through a common resistor and at the same time connected to ground through a capacitor, one having twice the area of the other, with its emitter serving as the first output and the other transistor's The first output of a ripple filter circuit whose emitter is the second output is connected via a resistor to the emitters of two of the three transistors that share a common base, and the second output is connected to the emitter of one of the other transistors. connect to the emitter,
and the collector and base of one of the two transistors connected to the first output of the ripple filter via a resistor, and the collector of the beta compensation transistor whose emitter is connected to the base of the transistor; It is characterized in that it is connected to the collector of another transistor connected to the first output of the ripple filter, and at the same time is connected to the signal output terminal of the B line side signal receiving circuit via a resistor, and at the same time is configured as a voltage output terminal. signal receiving circuit.
JP60263867A 1985-11-26 1985-11-26 Signal reception circuit Granted JPS62125747A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60263867A JPS62125747A (en) 1985-11-26 1985-11-26 Signal reception circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60263867A JPS62125747A (en) 1985-11-26 1985-11-26 Signal reception circuit

Publications (2)

Publication Number Publication Date
JPS62125747A true JPS62125747A (en) 1987-06-08
JPH0379906B2 JPH0379906B2 (en) 1991-12-20

Family

ID=17395346

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60263867A Granted JPS62125747A (en) 1985-11-26 1985-11-26 Signal reception circuit

Country Status (1)

Country Link
JP (1) JPS62125747A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007509358A (en) * 2002-03-14 2007-04-12 ケンブリッジ ディスプレイ テクノロジー リミテッド Display driver circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007509358A (en) * 2002-03-14 2007-04-12 ケンブリッジ ディスプレイ テクノロジー リミテッド Display driver circuit

Also Published As

Publication number Publication date
JPH0379906B2 (en) 1991-12-20

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