JPS6212520B2 - - Google Patents

Description

[Detailed Description of the Invention] (A) Technical Field of the Invention The present invention relates to CVSD (Continuously Variable
The present invention relates to an audio detection circuit for detecting the presence of an audio input when digitizing an audio signal using a slope delta modulator.

(B) Prior Art and Problems In voice lines, the time during which voice signals are actually transmitted out of the time the line is connected is usually extremely small. Therefore, in the case of a mobile radio telephone, controlling a part that consumes a lot of power, such as the final stage of the transmitter, so that it is activated only when there is audio input can reduce the power consumption of the power supply and save battery power. This is extremely effective in extending the lifespan of the device, which is why an audio detection circuit is required.

Conventionally, such audio detection circuits have been used to perform analog detection or digital detection. Some analog audio detection circuits perform detection by converting an audio signal into direct current and determining that the value exceeds a certain reference value. However, in the case of such analog detection, not only is the influence of deviation of circuit elements and deterioration of characteristics due to secular change significant, but also noise and noise are detected because the presence or absence of voice is determined after amplification in the case of low input levels. Due to these reasons, it has generally been difficult for analog voice detection circuits to operate stably.

On the other hand, some digital voice detection circuits perform detection by focusing on the presence or absence and duration of frequency components such as vowels and consonants of voice. for example
In the case of PCM codecs, etc., a specific codeword can be detected from a quantized output audio codeword with a certain number of bits by taking advantage of the fact that in human voice, the component around 1KHz is larger than the component around 3KHz. Therefore, voice detection can be performed. However, in the case of such digital speech detection, the circuit scale becomes large because it is necessary to synchronize the output speech codewords. Furthermore, in the case of a ΔM (constant difference modulation) codec, quantization is performed by determining the level difference between the instantaneous value one sampling period before and the current instantaneous value in the audio signal. It is not possible to synchronize and therefore no method can be used to detect a particular codeword.
For this reason, no reliable voice detection circuit that can be applied to the ΔM modulator has conventionally been known.

(C) Purpose of the Invention The present invention aims to solve the problems of the prior art, and its purpose is to improve the quantization step size of the ΔM modulator according to the level of the audio signal. It is an object of the present invention to provide a simple and stable voice detection circuit that can be applied to the output voice code of a CVSD modulator whose value changes continuously.

(D) Embodiment of the Invention The figure shows the configuration of an embodiment of the voice detection circuit of the present invention. In the figure, 1 is an audio signal input terminal, 2 is a CVSD modulator, 3 is an audio signal output terminal, 4 is a quantized signal output terminal, 5 is a counter, and 6
is a voice detection signal output terminal, 7 is an AND gate, 8 is
is a timer, 9 is a set-reset type flip-flop (hereinafter abbreviated as FF), 31 is a local decoder, 32 is a subtraction circuit, and 33 is a logic circuit.

The audio signal applied to terminal 1 is input to CVSD modulator 2, and part of it is output from terminal 3 as required. The CVSD modulator 2 quantizes the audio signal input and outputs a quantized signal to the terminal 4. In the CVSD modulator 2, the local decoder 31 integrates the quantization step size control signal generated from the logic circuit 33, generates a decoded output that changes stepwise according to the integrated value, and inputs the decoded output to the subtraction circuit 32. do. The subtraction circuit 32 compares the decoded output of the local decoder 31 and the audio signal input of the terminal 1,
The difference is quantized into "1" and "0" and output as a quantized signal. The logic circuit 33 outputs a quantization step size control signal pulse when the quantization signal has the same polarity and continues for a certain number of bits.

A counter 5 counts the quantization step size control signal, and outputs a voice detection signal to a terminal 6 when the quantization step size control signal exceeds a certain value. AND gate 7 opens when F.F9 is reset and produces an output according to the quantization step size control signal. The timer 8 is started by the output of the ant gate 7, and when started,
Immediately start clearing counter 5 and set F.F9. F.F9 is set when timer 8 is started and reset when timer 8 overflows.

In the figure, when there is no audio signal input to terminal 1, no quantization step size control signal is output, and CVSD modulator 3 operates at the minimum quantization step size. When an audio signal is input,
A quantization step size control signal is output so that the quantization step size in the CVSD modulator 3 changes in accordance with the audio signal level. When the audio signal rises, the timer 8 is activated by the first quantization step size control signal, and the count value of the quantization step size control signal by the counter 5 exceeds the reference value within a certain period of time determined by the timer 8. At this time, a voice detection signal is output. On the other hand, in the case of signals such as noise, a large level generally does not persist, so even if the quantization step size control signal is output, the count value in the counter 5 almost never reaches the reference value. , so no voice detection signal is generated.

According to the audio detection circuit shown in the figure, the quantization step size control signal output when the quantization signal output of the CVSD modulator has the same polarity and a certain number of consecutive bits is logically integrated, By comparing the integral value with a reference value, the presence or absence of an audio signal can be detected. At this time, the detection level and detection time of the audio signal can be freely determined by arbitrarily setting the integration time determined by the timer and the reference value set in the counter.

In the above explanation, the integrator for integrating the quantization step size control signal has been explained as being constituted by a counter using a digital IC, etc. However, an analog integrator circuit using a CR time constant circuit is also applicable. Needless to say, it may be constructed by a circuit and an integral output voltage determination circuit.

(E) Effects of the Invention As explained above, the audio detection circuit of the invention operates stably and reliably in a CVSD modulator in which the quantization step size changes continuously according to the level of the audio signal. It is possible to realize a voice detection circuit with an extremely simple configuration, and it is therefore possible to control the final stage of the transmitter to start transmitting voice, which makes it possible to use the information transmission path more efficiently. In the case of portable radio telephones, etc., the life of batteries, which are the power source, can be greatly extended, which is extremely effective. Note that when starting audio transmission, it is possible to prevent interruptions at the beginning of speech by inserting a delay circuit corresponding to the detection time of the audio detection circuit into the audio signal output or quantization signal output path in the figure. It is possible.

[Brief explanation of the drawing]

The figure is a block diagram showing the configuration of an embodiment of the voice detection circuit of the present invention. 1...Audio signal input terminal, 2...CVSD modulator, 3...Audio signal output terminal, 4...Quantization signal output terminal, 5...Counter, 6...Audio detection signal output terminal, 7...And Gate, 8...Timer,
9...Set-reset type flip-flop (F.
F), 31... local decoder, 32... subtraction circuit,
33...Logic circuit.

Claims (1)

[Claims] 1. Generates a quantization step size control signal when a quantized signal obtained by quantizing the difference with the sample value of the previous sampling period in the audio signal has the same polarity and a certain number of consecutive bits; A modulation circuit using a CVSD modulator in which the quantization step size is continuously changed according to the quantization step size is provided with means for integrating the quantization step size control signal at fixed time intervals, and when the output of the integrating means exceeds a reference value. 1. A voice detection circuit that detects a voice signal by detecting a voice signal.