JPS62122383A - Driving method for solid-state image pickup element - Google Patents

Abstract

PURPOSE:To attain low smear and high picture quality by shifting a CSD shift register only during a horizontal flyback time. CONSTITUTION:When the CSD register 6 is shifted during a horizontal flyback period, discharges a smear charge outside an element through a discharge drain 22, and is further shifted, a transfer gate 9-1 is opened, the smear charge is read in a horizontal charge transfer element 3-1 and a signal charge QA is fed to a vertical charge transfer circuit from the photodiode 1 of the first line. Then, when the shift register 6 is shifted, the signal charge QA is transferred to the horizontal charge transfer element 3-1 and the smear charge is transferred to a horizontal charge transfer element 3-2 and from the photodiode 1 of the second line, a signal charge QB is fed to a vertical charge transfer element 2. Then, the shift register 6 is shifted, the signal charge QB is transferred to the horizontal charge transfer element 3-1, the smear charge to a horizontal charge transfer element 3-3 and the signal charge QA to the horizontal charge transfer element 3-2 and they are read simultaneously.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a solid-state image sensor, and particularly to a driving method suitable for achieving high image quality.

[Background of the invention]

Solid-state imaging devices can be broadly classified into MO8 type and CCD type. The M(JS method has a high saturation signal charge amount, but high noise.On the other hand, the CCD method has low noise, but has a low saturation 1g charge amount.The advantages of these two methods are that As a method that combines signal charge amount and low noise characteristics,
C3D (Charge Swivel Device: Charge
[Sweep])evice) method was proposed. (
M, Kimata et al.; IS8CC DIGEST OF TECHNI
CAL PAPER8) plo1~I) 1021985
). FIG. 1(a) is a basic circuit configuration diagram of the C'SD method, and FIG. 1(b) (1) to (6) are potential diagrams showing the operation of the COD method.

In FIG. 1(a), 1 is an optically variable element (for example, a photodiode), 2 is a vertical charge transfer element, 3 is a horizontal charge transfer element, 4 is a horizontal charge transfer element output section, and 5 has a photogate in part. Gate, 6 is C8D shift register, 7
8 is a photogate shift register, 9 is a transfer gate, and 10 is a vertical scanning line.

Hereinafter, the operation of this device will be explained using FIG. 1).

First, the potential of all the gates of the vertical charge transfer element becomes high, and a large potential well is formed within the vertical charge transfer element. In this state, one transfer gate selected by the photogate shift register is turned on (ON), and
The signals from the two photodiodes are read out to the vertical charge transfer element (FIG. 1(b) (1)).

After this, the gate potential of the vertical charge transfer element is lowered from the left side of Figure 1(b) to 111141 by the clock given by the C8D shift register, and the signal charge is spatially shifted as the potential moves. Move to the right while expanding. During this time, the horizontal charge transfer element performs read operation t
-Continues. (2), (8), and (4) in FIG. 1) The signal charges are collected in the storage gate by the above sweeping operations (FIG. 1, (b) and (5)). During the horizontal retrace period, when the potential of the transfer gate becomes less than the quotient, the potential of the storage gate becomes lower, so that the signal charge is transferred from the storage gate to the horizontal charge transfer element. (Figure 1(b)(6)).

Now, in all solid-state image sensors, when a bright copy is photographed, a vertical smear phenomenon occurs that leaves white tails at the top and bottom of the reproduced image, which causes image quality deterioration under high illuminance. As a method for reducing this vertical smear under all subject conditions, there is a smear differential method described in Ozawa et al., Proceedings of the 1984 National Television Society of Japan Conference 3-15, pp. 67-68.

In this method, first, only the vertical smear is read out, then the signal charge on which the vertical smear is superimposed is read out, and the difference between the two is taken to output only the signal charge. If illegality is to be achieved using the C10 method, the sweeping operation may be performed twice within one horizontal scanning period. However, with this method, photogate selection must be performed during the horizontal scanning period. As a result, the selection pulse enters the video signal and becomes noise, resulting in a significant drop in image quality.

On the other hand, as a method for realizing a single-chip color camera with high resolution and high image quality without field afterimages,
N., Koike et al., 1979 I8SCCDiges
There is a vertical two-pixel time readout method that performs interlaced scanning described in pp. t) pp193~.

In this method, for example, during one scanning period of a certain field,
The signal charges in two rows (n row and n-)1 row are read out, and the signal charges in two rows (n-1 row and n row) are read out in one horizontal scanning period of the next field.

Similarly, when the illegal method is implemented using the C8'D method, the selection pulse of the photogate jumps into the video signal, resulting in a significant deterioration of the image quality. That is, in the C10 system, when reading out a plurality of signal charges, there is a problem in that a pulse always jumps into the video signal period, degrading the image quality.

[Purpose of the invention]

An object of the present invention is to realize a driving method for sending a plurality of signals without injecting pulses into a video signal in an image sensor having a C10 type circuit configuration, and to provide a solid-state image sensor with low smear and high image quality. There is a particular thing.

[Summary of the invention]

In order to achieve the above objectives, the following driving method is considered in the present invention.

■ The COD shift register is operated only during the horizontal retrace period.

■ Forming multiple separate potential wells to route multiple signals within the vertical charge element.

(2) In order to send different signal charges to each of the separated potential wells through the photodiode, the photogates are selected at different timings for each row.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings.

First of all, a first embodiment of the present invention is shown in FIGS. 2 to 5.

Figure 2 is a circuit configuration diagram of a solid-state image sensor, Figure 3 is a timing diagram of drive pulses for the element in Figure 2, and Figure 3 shows the presence of each signal charge in the vertical charge transfer element at the timing in Figure 2. It is a figure showing a position.

In order to simplify the explanation, only a 3.times.3 photodiode matrix is shown in FIG.

In FIG. 2, reference numerals 21 and 22 are sweep gates and drains for discharging smear charges to the outside of the device; 23 is synchronized with the output pulse from the photogate shift register 8;
The interlacing circuits 1, 3-1 to 3-3, which perform row selection necessary for inter-pixel time readout, are first to third horizontal charge transfer elements, and each outputs a first signal, a second signal, and a smear signal. 4-1 to 4-3 are output parts of the first to third horizontal charge transfer elements, 9-1 to 9-3 are first to third transfer gates, respectively. Between the vertical charge transfer element 2 and the first horizontal charge transfer element 3-1, between the first and second horizontal charge transfer elements 3-1, 3-2, and between the second and third horizontal charge transfer elements 3-2 .Open and close between 3 and 3. 5-1 and 5-2 are a transfer region and an accumulation region that form one transfer stage of the vertical charge transfer element, and the accumulation region has a lower volatility with respect to signal charges than the transfer region. 5-II
One stage of 5-2 is provided for each photodiode. 5
-3 is a photogate. 5-1 to 5-3 correspond to game) 5 in FIG. Compared to FIG. 1, this configuration has the advantage that the area where charges exist can be made smaller, so that the transfer efficiency can be improved. 10-2 is a vertical gate line that sends the output from the interlace circuit 8 to the photogate 5-3 in the row, and a vertical scanning line that sends the output from the 10-1aC8D shift register 6 to each transfer stage of the vertical charge transfer cable 2. It is. 10-1 and 10-2 correspond to the vertical scanning line 10 in FIG. 1, and may have the same configuration as that in FIG.

1 in the figure is a photodiode similar to that in FIG.

Further, the C8D shift register is configured as a two-phase shift register, for example.

In FIG. 3, HBL is a blanking pulse indicating the horizontal scanning period, v, l v* are two-phase pulses that drive the C8D shift register, V s * FiCS D input pulse to the shift register, ■, 1□eL2m are: The timing differs in each horizontal scanning period due to the potential applied to the vertical gate line by the action of the photogate shift register and the interlacing circuit. Here, the suffix n indicates the number of the horizontal scanning period when the horizontal scanning period following the vertical retrace period is the first horizontal scanning period. Also, Vyl is the transfer gate 9-1
potential, Vm.

indicates the potential applied to the sweep gate.

In FIG. 4, one delimiter indicates one transfer stage consisting of a storage region and a transfer region of a vertical charge transfer element, and the transfer stage closest to the horizontal charge transfer circuit is numbered M1. The black area indicates a transfer stage that separates the potential well carrying the stain from the low potential of the vertical scanning line. Also,
qso is a smear charge that is swept out to the outside of the probe via a sweep gate, qs is a smear charge that is read out independently from the horizontal charge transfer element, QIFi is a first signal charge, and Qz is a second signal charge.

During the operation of the C8D shift register, an input pulse v1. When the C8D shift register operates, the potentials of the vertical scanning lines become lower in order, and the gate potential of the vertical charge transfer element becomes lower starting from the part farthest from the horizontal C(,'D).

In the present invention, separated potential wells are formed and moved within the vertical charge transfer element by inputting input pulses Vtm at certain time intervals. By selectively sending the signal charge to this potential well through the photogate by the action of the photogate shift register, the signal reading is performed.

The operation of this device will be explained step by step below.

At the end of the previous vertical scanning period, signal charge readout of all photodiodes is completed, and only smear charges exist in the vertical charge transfer wire.

Also % m, +i, mz+1, m3+1,
When the input pulse Vts+ is input for each shift of the m4+1 C8D shift register, the vertical charge transfer element contains the following:
For example, a potential well as shown in FIG. 4(a) is formed. That is, ml, m2. m3. Four potential wells formed over m4 transfer stages are M (M = m
1+m 2 +ms+m4) is formed within the vertical charge transfer element.

When entering the vertical scanning period, the first horizontal scanning starts, and the first
The signal charges of the first and second rows are output.

Assume that a potential well and each charge exist at the positions shown in FIG. 4(a) at the start time of the C8D shift register in the first horizontal retrace period (t=tl in FIG. 3).

From this state, the C8D shift register operates and charges are transferred within the vertical charge transfer element. First, if the voltage of the sweep gate is not high, then with the sweep gate open,
The C8D shift register shifts by ml+1, and the smear charges Q and go are swept out to the outside of the element via the drain. (Time 1 = 1. to h in Figure 3) At the end of this smear sweeping (Time 1 = 1. in Figure 3), button 7 is pressed.
The barrel well exists at the position shown in FIG. 4(b).

Furthermore, as the C8D shift register shifts by mz+i, the first transfer gate opens and the smear charge is read into the first horizontal charge transfer element. After this smear charge begins to spread out (time 1=13 in Figure 3), the charge is increased as shown in Figure 4 (time 1 = 13).
It exists in the position shown in C). At this time, a potential well for transferring the signal charge in the first row is formed adjacent to the photodiode in the first row. Therefore, a voltage is applied to the vertical gate line in the first row selected by the photogate scanning circuit, and signal charges are sent from the photodiodes in the first row to the vertical charge transfer circuit.

Thereafter, the CSD shift register shifts by m3+1, the voltage of the first transfer gate is opened again, and the signal charge Qm is read into the first horizontal charge transfer element. Before this operation occurs, smear charge is transferred from the first horizontal charge transfer element to the twelfth horizontal charge transfer element. Also, one shift cycle of the C8D shift register before this operation ends, the potential well that transfers the signal charge of the second row changes to the second row.
It is formed next to the photodiode in the row. Therefore, the second
A high voltage is applied to the vertical gate line in the row, and signal charges are sent from the photodiodes in the second row to the vertical charge transfer elements. (Fig. 3, t=t4) On the other hand, after reading out this first signal charge (Fig. 3, t=ts), the potential well is as shown in Fig. 4.
It exists at the position shown in (d).

After that, the COD shift register shifts m4+1 and the potential of the first transfer gate opens again, and the signal charge Qm
is read into the first horizontal charge transfer element. Before this action occurs, smear′! The ilt charge is transferred from the second water droplet transfer element to the third water droplet transfer element □signal charge Q.
The horizontal charge transfer element is transferred from the first horizontal charge transfer element to the third horizontal charge transfer element. After this second signal charge (M
3Figure 1=1. ), there are potential wells of the order [K] shown in FIG. 4(a).

After this, the horizontal charge transfer element operates, and one smear charge and the double number Q, Q1 are read out simultaneously. Similarly, one smear charge and two signal charges are read out in one horizontal scanning period.

Now, in order to repeat the above operation without complicating the pulse phase, -C3l during the horizontal retrace period)
The number of transfer stages M' of the shift register must satisfy the formula (1) M'=mI+ms+m3+mn+4 ""...(
1) In this case, the position of the potential well at the start of the C8D shift register in each horizontal retrace period is always shown in Figure 4 (
You can do it like Xun.

Furthermore, when using this driving method, it is necessary to transfer signal charges from the photodiode to the vertical charge transfer element when a potential well for transferring signal charges is formed. For this reason, the phase of the voltage applied to the vertical gate line is advanced by twice the shift period of the C8D shift register for each horizontal scanning line. In this way, photodiode row selection is performed.

Although the phase of Vpz becomes faster, since the C8D shift register performs a shifting operation only during the horizontal blanking period, there is no need to input this row selection pulse during the scanning period.

Another embodiment of the present invention is shown in FIG. 5, which is a circuit diagram of a solid-state imaging device. In this embodiment, the vertical charge transfer system is directly driven by external clocks v', , v'. In the vertical charge transfer element, potential wells separated by the high and low levels of this clock are formed. The operation of the non-elements outside the point plate is similar to that shown in FIG.

FIG. 6 shows a circuit diagram of another embodiment of the present invention. In this embodiment, a plurality of storage gates 61162 and 63 are provided between the vertical charge transfer device and the horizontal charge transfer system, forming a buffer region for charge transfer from the vertical charge transfer device to the horizontal charge transfer device. are doing. The number of accumulation gates may be any number as long as the number is equal to or greater than the number of charges read out simultaneously in one horizontal scanning period. The operation of this device is also similar to that shown in FIG.

As described above, according to the driving method of the present invention (even when carrying a plurality of signals in an element having a C8D type circuit configuration, pulse jumping is not left to the driver in principle), and high-quality reproduced images can be produced. You can get a sword.

In this embodiment, a case where four charges are sent is shown, but the effect of the present invention can be obtained if two or more charges are sent (for example, two signal charges, or one signal charge and a smear charge). can be obtained. Further, in the embodiment, the C8D scanning circuit operates continuously during the horizontal # line marking interval, but even if it stops midway, the effect of the present invention does not change.

〔Effect of the invention〕

According to the invention, in an imaging probe having a C8D type circuit configuration, a plurality of signal charges can be sent without pulses jumping into the video signal, so that the solid-state imaging probe 11r with low smear and high image quality can be achieved. :Can cause a disaster.

[Brief explanation of drawings]

Figure 1(a) is a circuit diagram of a conventional solid-state imaging probe;
Figure (b) is the potential diagram of the C8D channel, Figure 2.
5 and 6 are circuit configuration diagrams of a solid-state imaging probe showing an embodiment based on the invention, FIG. 3 is a timing diagram of drive pulses, and FIG. 4 is a potential well in a vertical charge transfer element. FIG. 1... Photodiode, 2... Vertical charge transfer element,
3゜3-1 to 3-3...Horizontal charge transfer element, 4.4-
1 to 14-3... Output section, 5.5-3... Photogate, 6... C8D shift register, 8... Photogate shift register, 9.9-1 to 9-3... Transfer gate, 5-2...Storage region, 5-1...Transfer region, 2
1... Smear sweeping gate, 22... Smear sweeping drain, 23... Interlace circuit. Fossa 1 Figure C Sufu 2 Figure 3 Figure j, ≠z f3 't, #. Tomi 4 Figure Tomi 5 Figure

Claims (1)

[Claims] Photoelectric conversion elements arranged in one or two dimensions, a vertical charge transfer element that vertically transfers signal charges from the photoelectric conversion elements, and a vertical charge transfer element that transfers signal charges from the vertical charge transfer elements horizontally. In a solid-state imaging device, the solid-state imaging device includes a horizontal charge transfer element that transfers signal charges in the vertical charge transfer element, a shift register that sends out a pulse train that transfers signal charges in the vertical charge transfer element to the horizontal charge transfer element, and a photogate shift register that performs row selection. . A method for driving a solid-state image sensor, characterized in that the shift register is shifted only during a horizontal retrace period. 2. A patent claim characterized in that, in order to form a plurality of separated potential wells in the vertical charge transfer element, a plurality of pulses are inputted to one end of the shift register within one horizontal retrace line period. A method for driving a solid-state imaging device according to item 1. 3. In order to input optical signal charges from different photoelectric conversion elements into a plurality of potential wells formed in the vertical charge transfer element, the pulse input phase of the row selection signal from the photogate shift register is adjusted to match each horizontal 2. The method of driving a solid-state image sensor according to claim 1, wherein the driving method is different for each retrace period.