JPS62122370A - Thermal head - Google Patents

Thermal head

Info

Publication number
JPS62122370A
JPS62122370A JP60262820A JP26282085A JPS62122370A JP S62122370 A JPS62122370 A JP S62122370A JP 60262820 A JP60262820 A JP 60262820A JP 26282085 A JP26282085 A JP 26282085A JP S62122370 A JPS62122370 A JP S62122370A
Authority
JP
Japan
Prior art keywords
thermal head
thermal
printing
input terminal
shift register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60262820A
Other languages
Japanese (ja)
Inventor
Keiji Masui
増井 啓二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60262820A priority Critical patent/JPS62122370A/en
Publication of JPS62122370A publication Critical patent/JPS62122370A/en
Pending legal-status Critical Current

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  • Accessory Devices And Overall Control Thereof (AREA)
  • Electronic Switches (AREA)
  • Facsimile Heads (AREA)

Abstract

PURPOSE:To set a thermal head to all the same initial conditions with respect to a test picture signal of a specific mode by resetting the contents of a shift register of electronic control systems in all semiconductor devices when a power source is energized. CONSTITUTION:The thermal head is checked under the condition when a printing direct current power source EB is set to a low voltage as low as possible and is set in such a manner that a large printing current does not flow to thermal printing resistance elements R1-R8 for a long period, respectively and the increase and the decrease in the current of the respective resistance elements can be easily detected by an ammeter 25. According to the processing, a burning accident of the thermal printing resistance elements when a bonding line of an enable signal input terminal contacts with an earth E can be previously prevented and the check for the completion in assembling the thermal head is carried out completely by an electric means. When the power source is energized together with the completion of setting of this state, the contents of the shift register 4 are al initialized from an unsteady state immediately before to '0' and a specific picture signal is inputted to a picture signal input terminal 22.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はサーマル・ヘッドに関し、特にサーマル印字抵
抗駆動用半導体電子回路の捕造に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to thermal heads, and more particularly to the construction of semiconductor electronic circuits for driving thermally printed resistors.

(従来の技術) サーマル・ヘッドは送信側のイメージ・センナ装置から
送られて来る2値画像信号を原稿1行毎に同時印字する
よう構成されるのが通常である。
(Prior Art) A thermal head is normally configured to simultaneously print a binary image signal sent from an image sensor device on the transmitting side line by line of a document.

例えば、日本工業規格A列4番の原稿用紙に対して1m
当り8画素の精細度で画像信号が送られるとすると、サ
ーマル・ヘッドには用紙幅216m+*に対し1728
個のサーマル印字抵抗素子が邸備され、それぞれに挿入
された電子回路により一斉に駆動制御される。従って、
これら電子回路をそれぞれ分担して集積する27個の半
導体装置とサーマル印字抵抗素子との間は1728木に
ものぼる多数のワイヤボンディング線によって相互接続
される。また、27個の半導体装置は電源端子(地気端
子を含む)、クロック入力端子、イネーブル信号入力端
子および画像信号入力端子その他を含めて最少9本のワ
イヤボンディング線をそれぞれ備えるので、一つのサー
マル・ヘッド全体では実に2.000本を超える多数の
ワイヤボンディング線と弊しい数の接続点とが含まれる
For example, 1 m for Japanese Industrial Standards A row No. 4 manuscript paper.
Assuming that image signals are sent at a resolution of 8 pixels per image, the thermal head will have 1728 pixels for a paper width of 216m+*.
It is equipped with several thermal printing resistive elements, each of which is driven and controlled simultaneously by an electronic circuit inserted into each element. Therefore,
The 27 semiconductor devices that integrate these electronic circuits and the thermal printing resistive elements are interconnected by a large number of wire bonding lines, as many as 1,728 wires. In addition, each of the 27 semiconductor devices has a minimum of nine wire bonding lines, including a power supply terminal (including a ground terminal), a clock input terminal, an enable signal input terminal, an image signal input terminal, and others, so one thermal - The entire head actually includes a large number of wire bonding lines, exceeding 2,000, and an unreasonable number of connection points.

一般にこのように多数のワイヤボンディング線が使用さ
れ接続個所が激増すると組立工程における不良は大部分
このボンディング段階でおこる。
Generally, when a large number of wire bonding lines are used and the number of connection points increases dramatically, most defects in the assembly process occur at this bonding stage.

従って、サーマル・へ、ドは組立完了時においてこれら
の接続が正しく行なわれているか否かを中心にしてチェ
ックされる。このチェックには、通常、テスト画像信号
により印字動作を行なわせる実装試験法が用いられてい
る。
Therefore, upon completion of assembly, checks are mainly made on whether or not these connections are made correctly. For this check, a mounting test method is usually used in which a printing operation is performed using a test image signal.

(発明が解決しようとする問題点) この実装試験法によるとボンディング不良の有無および
位置を目視により簡易に見出し得る。しかし、サーマル
印字抵抗素子を駆動する電子回路の制御系に故障があり
駆動がコントロールできない状態にあると、サーマル印
字抵抗素子を瞬時に焼損することもあるので、必ずしも
最良の手段とは言えない。すなわち、電子回路がサーマ
ル印字抵抗素子を例えば”0″レベルのイネーブル信号
でゲート駆動するよう構成されているとき、この信号入
力端子が龜って地気におとされている場合があったと想
定すると、電源投入と同時にこの電子回路に接続される
サーマル印字抵抗素子は駆動されっばなしの状態におか
れるので瞬時に溶断することとなる。従って、サーマル
・ヘッドの組立完了時のチェックには電子回路の制御系
に故障がある場合も考慮に入れサーマル印字抵抗を焼損
することなく半導体装置側を含めた全てのボンディング
不良を発見できることが望ましい。
(Problems to be Solved by the Invention) According to this mounting test method, the presence or absence and location of bonding defects can be easily found by visual inspection. However, if there is a failure in the control system of the electronic circuit that drives the thermal printing resistance element and the drive cannot be controlled, the thermal printing resistance element may be instantly burned out, so this is not necessarily the best means. In other words, when the electronic circuit is configured to gate drive the thermal printing resistor element with, for example, a "0" level enable signal, it is assumed that this signal input terminal is obscured and exposed to the ground. Then, at the same time as the power is turned on, the thermal printing resistor element connected to this electronic circuit is kept in a state of being driven, so that it is instantly blown out. Therefore, when checking the thermal head upon completion of assembly, it is desirable to take into account any failures in the electronic circuit control system and to be able to discover all bonding defects, including those on the semiconductor device side, without burning out the thermal printing resistor. .

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記の情況に鑑み、サーマル印字抵抗
素子を焼損することなく組立完了チェ。
SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a method for completing assembly without burning out a thermal printing resistance element.

りを行ない得る電子制御系を備えたサーマル・ヘッドを
提供することである。
It is an object of the present invention to provide a thermal head equipped with an electronic control system capable of performing the following steps.

〔発明の構成〕[Structure of the invention]

本発明のサーマル・ヘッドは、2値画像信号を順次シフ
トレジスタ内に収納し且つラッチしてイネーブル信号を
介し一斉にサーマル印字抵抗素子をゲート駆動する半導
体電子回路を備えるサーマル・ヘッドにおいて、前記半
導体電子回路のシフトレジスタにレジスタ内容を電源投
入と共にクリアするリセット回路手段が設けられること
を含む。
The thermal head of the present invention includes a semiconductor electronic circuit that sequentially stores and latches binary image signals in a shift register and gate-drives the thermal printing resistive elements all at once via an enable signal. The shift register of the electronic circuit is provided with reset circuit means for clearing the contents of the register upon power-on.

(問題点を解決するだめの手段) すなわち、本発明によれば、サーマル・ヘッドの電子制
御系の一つを構成するシフトレジスタには、レジスタ内
容を電源投入と共にクリアするリセット回路手段が付加
される。
(Means for Solving the Problem) That is, according to the present invention, a reset circuit means is added to the shift register constituting one of the electronic control systems of the thermal head for clearing the contents of the register when the power is turned on. Ru.

(作用) 従来と同様に複数個の半導体装置に集積されたシフトレ
ジスタは電源投入と同時にそれぞれリセ、トされるので
、例えば27個の半導体装置の電子回路は特定モードの
テスト画像信号に対して全て同一初期条件でそれぞれの
サーマル印字抵抗素子を、駆動制御し、クロック入力端
子、イネーブル信号入力端子、画像信号入力端子その他
のボンディング線不良に対応してそれぞれ異なる電気的
態様を抵抗素子側に示すので、半導体装置の良否を個々
に診断することが可能である。また、この診断は印字テ
ストに代わり電気的手段によりサーマルヘッド印字抵抗
素子に大きな電流を通ずることな〈実施し得るので、電
子回路の制御系に故障を生じている場合でもサーマル印
字抵抗素子を焼損せしめることはない。以下図面を参照
して本発明の詳細な説明する。
(Function) As in the past, the shift registers integrated in multiple semiconductor devices are reset and reset at the same time as the power is turned on. Therefore, for example, the electronic circuits of 27 semiconductor devices respond to test image signals of a specific mode. Each thermal printing resistor element is driven and controlled under the same initial conditions, and different electrical modes are shown on the resistor element side in response to defects in the clock input terminal, enable signal input terminal, image signal input terminal, and other bonding lines. Therefore, it is possible to diagnose the quality of each semiconductor device individually. In addition, this diagnosis can be performed by electrical means instead of a printing test without passing a large current through the thermal head printing resistance element, so even if there is a failure in the electronic circuit control system, the thermal printing resistance element can be burnt out. I won't force you. The present invention will be described in detail below with reference to the drawings.

(実施例) 図は本発明の一実施例を示す回路構成図である。(Example) The figure is a circuit configuration diagram showing an embodiment of the present invention.

本実施例では説明を簡単にするため8画素分に対する回
路構成のみが示され、サーマル印字抵抗素子几、〜R6
を含む印字抵抗部lとこの駆動制御用電子回路を備える
半導体装置2とからなる従来構成の部分と、新らたに設
けたりセット回路装置3の付加構成部分とを含む。ここ
で、半導体装置2は2値画像信号PをクロックCKで順
次転送し収納するシフトレジスタ4と、このシフトレジ
スタ4の内容をそれぞれラッチするラッチ回路5〜12
と、このラッチ出力をイネーブル信号E、〜E4でそれ
ぞれゲート制御する否定論3!@積回路13〜20と、
このゲート出力で動作開側1される印字抵抗素子R,−
R,の駆動用トランジスタQ、〜Q、とを含み、また、
リセット回路装置3は電源電圧VDI)をプルアップす
る抵抗Rおよび容景Cの直列回路と電源投入時リセット
信号φをシフトレジスタ4に送出するリセット回路21
とを含む。また、端子22.23および24はそれぞれ
2値画像信号P。
In this embodiment, in order to simplify the explanation, only the circuit configuration for 8 pixels is shown, and the thermal printing resistor elements 几, ~R6
The present invention includes a conventional part consisting of a printing resistor part l including a semiconductor device 2 having a drive control electronic circuit, and a newly provided part or an additional part of a set circuit device 3. Here, the semiconductor device 2 includes a shift register 4 that sequentially transfers and stores a binary image signal P using a clock CK, and latch circuits 5 to 12 that respectively latch the contents of this shift register 4.
Negation theory 3: This latch output is gate-controlled with enable signals E and ~E4, respectively! @product circuits 13 to 20,
The printing resistance element R, - which is opened to the open side by this gate output
R, and driving transistors Q, ~Q, and
The reset circuit device 3 includes a series circuit of a resistor R and a resistor C that pulls up the power supply voltage (VDI), and a reset circuit 21 that sends a reset signal φ to the shift register 4 when the power is turned on.
including. Further, terminals 22, 23 and 24 each receive a binary image signal P.

クロックCKおよび電源電圧VDDの各入力端子である
O 組立てられた本発明のサーマル・ヘッドは、印字用直流
電源E、を可能な限り低電圧に設定しこの状態でチェッ
クされる。すなわち、サーマル印字抵抗素子R1〜R,
に長時間にわたシ大きな印字電流がそれぞれ流れないよ
うに、また、抵抗素子それぞれの電流の増減が電流計2
5で容易に検出し得る程度に設定される。この処置によ
りイネーブル信号入力端子のポンディング線が地気Eに
接触している場合のサーマル印字抵抗素子焼損事故を未
然に防止し得る。従って、本発明サーマル・ヘッドの組
立完了チェックは全て電気的手段で行なわれる。
The assembled thermal head of the present invention is checked in this state by setting the DC power source E for printing to the lowest possible voltage. That is, thermal printing resistance elements R1 to R,
In order to prevent a large printing current from flowing for a long time, the ammeter 2
5, which is set to a level that can be easily detected. By this measure, it is possible to prevent the thermal printing resistor element from burning out when the bonding wire of the enable signal input terminal is in contact with the earth E. Therefore, the assembly completion check of the thermal head of the present invention is entirely performed by electrical means.

以上の状態設定の完了と共に電源が投入されるとシフト
レジスタ4の内容は直前の不定から全てO″にイニシャ
ライズされる。ここで、画像信号入力端子22には特定
の画像信号”1,0,0゜0・・・0”が入力される。
When the power is turned on with the completion of the above state settings, the contents of the shift register 4 are initialized from the previous indeterminate value to all O". Here, the image signal input terminal 22 receives a specific image signal "1, 0, 0°0...0" is input.

クロ、り入力端子23および画像信号入力端子22にボ
ンディング不良がなければ画像信号の”1”は1臓次転
送され、サーマル印字抵抗素子とのボンディングにも不
良がなければイネーブル信号E、〜E4の入力と共にサ
ーマル印字抵抗素子凡、〜几、に印字用直流電源EBか
ら順次電流が流れる。従って、クロ、りCKが成る数値
を数えたとき電流計25が“O”を示すことがあれば、
そのクロ、り故に相当する制御系の電子回路を含む半導
体装置に異常があることが分る。
If there is no defective bonding between the black input terminal 23 and the image signal input terminal 22, the image signal "1" will be transferred to the next organ, and if there is no defective bonding with the thermal printing resistor element, the enable signals E, ~E4 will be transferred. With the input of , current sequentially flows from the printing DC power source EB to the thermal printing resistive elements EB, -. Therefore, if the ammeter 25 shows "O" when counting the numbers consisting of black and red CK,
This indicates that there is an abnormality in the semiconductor device including the electronic circuit of the corresponding control system.

すなわち、この半導体装置は画像信号入力端子22、ク
ロック入力端子23またはサーマル印字抵抗素子とのボ
ンディング線の何れかまたは全部に不良個所を生じてい
るものと推定できる。全く同様にしてシフトレジスタ4
に信号゛O″を順次シフトさせたとき電流計25の指示
に変化が認められない場合があれば、そのクロック数か
ら数えてつぎの半導体装置において画像信号入力端子2
2が電源VDDと接触事故を生じていることを知ること
ができる。
That is, it can be presumed that this semiconductor device has a defective portion in any or all of the image signal input terminal 22, the clock input terminal 23, or the bonding wire with the thermal printing resistor element. Shift register 4 in exactly the same way
If there is a case where no change is recognized in the indication of the ammeter 25 when the signal "O" is shifted sequentially, the image signal input terminal 2 of the next semiconductor device is
2 has caused a contact accident with the power supply VDD.

以上は半導体装置の不良原因をポンディング線の接続不
良または接触を中心に述べたが、電子回路を構成する半
導体素子自身に原因がある場合でも同様に電流計25に
現われる種々の電気的態様の違いによって、不良半導体
装置を容易に検出し得る。
The causes of failures in semiconductor devices have been described above with a focus on poor connection or contact of bonding wires, but even if the cause is in the semiconductor element itself that constitutes the electronic circuit, the various electrical aspects that appear on the ammeter 25 can be similarly explained. Due to the difference, a defective semiconductor device can be easily detected.

〔発明の効果〕〔Effect of the invention〕

以上詳細に述べたように、本発明のサーマル・ヘッドは
電源投入と共に全ての半導体装置における電子制御系の
シフトレジスタの内容がリセットされ、特定モードのテ
スト画像信号に対して全て同一の初期条件に設定される
ので、組立完了時におけるチェ、りを簡易な電気的手段
で行ない従来の如きサーマル印字抵抗素子を焼損するこ
となく薙笑に不良半導体装置を検出し得る。すなわち、
信頼性および生産性の両面にすぐれた効果を奏し得る。
As described in detail above, in the thermal head of the present invention, the contents of the shift registers of the electronic control system in all semiconductor devices are reset when the power is turned on, and all test image signals in a specific mode are set to the same initial conditions. Therefore, a check at the time of completion of assembly can be carried out by a simple electrical means, and a defective semiconductor device can be easily detected without burning out the thermal printing resistor element as in the conventional case. That is,
Excellent effects can be achieved in terms of both reliability and productivity.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の一実施例を示す回路構成図である。 1・・・・・・印字抵抗部、2・・・・・・半導体装置
、3・・・・・・リセット回路装置、4・・・・・・シ
フトレジスタ、5〜12・・・・・・ラッチ回路、13
〜20・・・・・・否定論理積回路、21・・・・・・
リセット回路、22・・・・・・画像信号入力端子、2
3−・・・・・クロ゛ツク信号入力端子、24・・・・
・・電源端子、25・・・・・・電流計、VDD・・・
・・・電源電位、E・・・・・・地気、P・・・・・・
211[画像信号、E、〜E4・・・・・・イネーブル
信号、CK・・・・・・クロ、り信号、Qt〜Q、・・
・・・・駆動トランジスタ、R0〜几、・・・・・・サ
ーマル印字抵抗素子、EB・・・・・・印字用直流電源
、φ・・・・・・リセット信号。 皿 ゛ 代理人 弁理士  内 原   吐 、 。 一一
The figure is a circuit configuration diagram showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Printed resistance section, 2...Semiconductor device, 3...Reset circuit device, 4...Shift register, 5-12...・Latch circuit, 13
~20... NAND circuit, 21...
Reset circuit, 22... Image signal input terminal, 2
3-...Clock signal input terminal, 24...
...Power terminal, 25...Ammeter, VDD...
...Power supply potential, E...Earth, P...
211 [Image signal, E, ~E4...Enable signal, CK...Black signal, Qt~Q,...
・・・・Drive transistor, R0~⇠, ・・・Thermal printing resistor element, EB・・・・DC power supply for printing, φ・・・・Reset signal. Sara ゛Representative Patent Attorney Uchihara Toru. 11

Claims (1)

【特許請求の範囲】[Claims] 2値画像信号を順次シフトレジスタ内に収納し且つラッ
チしてイネーブル信号を介し一斉にサーマル印字抵抗素
子をゲート駆動する半導体電子回路を備えるサーマル・
ヘッドにおいて、前記半導体電子回路のシフトレジスタ
にレジスタ内容を電源投入と共にクリアするリセット回
路手段が設けられることを特徴とするサーマル・ヘッド
A thermal printer comprising a semiconductor electronic circuit that sequentially stores and latches binary image signals in a shift register and gate-drives thermal printing resistance elements all at once via an enable signal.
A thermal head characterized in that the shift register of the semiconductor electronic circuit is provided with reset circuit means for clearing register contents upon power-on.
JP60262820A 1985-11-21 1985-11-21 Thermal head Pending JPS62122370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60262820A JPS62122370A (en) 1985-11-21 1985-11-21 Thermal head

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60262820A JPS62122370A (en) 1985-11-21 1985-11-21 Thermal head

Publications (1)

Publication Number Publication Date
JPS62122370A true JPS62122370A (en) 1987-06-03

Family

ID=17381067

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60262820A Pending JPS62122370A (en) 1985-11-21 1985-11-21 Thermal head

Country Status (1)

Country Link
JP (1) JPS62122370A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01153946U (en) * 1988-04-01 1989-10-24

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01153946U (en) * 1988-04-01 1989-10-24
JP2501108Y2 (en) * 1988-04-01 1996-06-12 ブラザー工業株式会社 Thermal recording device

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