JPS60182277A - Drive circuit of charge injection device - Google Patents
Drive circuit of charge injection deviceInfo
- Publication number
- JPS60182277A JPS60182277A JP59037802A JP3780284A JPS60182277A JP S60182277 A JPS60182277 A JP S60182277A JP 59037802 A JP59037802 A JP 59037802A JP 3780284 A JP3780284 A JP 3780284A JP S60182277 A JPS60182277 A JP S60182277A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- inverter
- vinl
- low level
- picture element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】
(al 発明の技術分野
本発明は、光検知装置として用いられる電荷注入装置(
以下、CID;Cha4ge Injection D
eviceと称す)の駆動回路に関する。DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a charge injection device (al) used as a photodetector.
Hereinafter, CID; Cha4ge Injection D
(referred to as EVICE).
(b) 従来技術と問題点
複数の画素がマトリクス状に配置された光センサーとし
てのCIDの駆動はシフトレジスタで発生させた駆動パ
ルスを、出カバソファとしてのCMOSインバータを介
して駆動ラインに加えていた。(b) Conventional technology and problems To drive a CID as an optical sensor in which multiple pixels are arranged in a matrix, drive pulses generated by a shift register are applied to the drive line via a CMOS inverter as an output sofa. Ta.
しかしながら、従来の装置では、障害が生じてもどのラ
インに障害が発生したのか検出できない欠点があった。However, conventional devices have the disadvantage that even if a fault occurs, it cannot be detected in which line the fault has occurred.
(C) 発明の目的
本発明の目的は、従来のこのような欠点を解消し、障害
の生じたラインの検出を行えるようにしたことにある。(C) Object of the Invention An object of the present invention is to eliminate the above-mentioned drawbacks of the conventional method and to enable detection of a faulty line.
(di 発明の構成
上記目的を達成するための本発明は、CIDの駆動回路
で、シフトレジスタと、該シフトレジスタの複数出力を
それぞれ受け、電荷注入装置を駆動する複数の相補MO
Sインバータと、該複数のインバータと電源との間に共
通に設けられた電流波形検知手段を有することを特徴と
する。(di) Structure of the Invention To achieve the above object, the present invention is a CID drive circuit, which includes a shift register and a plurality of complementary MOs that respectively receive a plurality of outputs of the shift register and drive a charge injection device.
It is characterized by having an S inverter and a current waveform detection means provided in common between the plurality of inverters and a power source.
(el 発明の実施例 以上図面を用いて本発明の一実施例を説明する。(el Embodiments of the invention An embodiment of the present invention will be described above using the drawings.
本発明は、CIDの画素がMO3構造をとっており、正
常な画素は容量性であるのに対し、障害。In the present invention, the CID pixels have an MO3 structure, and while normal pixels are capacitive, failures occur.
例えば電極と基板間の絶縁膜にリークが生じていると、
等価的に抵抗が接続されたものとなるので、正常な画素
には交流的にしか電源が流れないが、障害の生じた画素
には直流も流れることを利用したものである。For example, if there is a leak in the insulating film between the electrode and the substrate,
Since a resistor is equivalently connected to the pixel, power only flows in the form of alternating current to a normal pixel, but direct current also flows to a faulty pixel.
第1図は本発明の一実施例を示す図で、1がCID、2
がCID駆動回路であり、シフトレジスタ3とインバー
タ11 〜Inを有する。各インバータは共通接続され
、抵抗rを介して電源■。、に接続される。FIG. 1 is a diagram showing an embodiment of the present invention, where 1 is a CID, 2 is a
is a CID drive circuit, which includes a shift register 3 and inverters 11-In. Each inverter is commonly connected to the power supply ■ through a resistor r. , is connected to.
又各インバータの出力は、CIDIの各画素CL 1〜
CLNにそれぞれ接続される。In addition, the output of each inverter corresponds to each pixel CL1 to CIDI.
Each is connected to the CLN.
インバータと画素をより詳細に示したが第2図であり、
各インバータは0MO3で構成されシフトレジスタ3か
ら入力Van 1〜V7すn を受ける。The inverter and pixels are shown in more detail in Figure 2.
Each inverter is configured with 0MO3 and receives inputs Van1 to V7sn from the shift register 3.
従って例えばインバータI、のVinを低レベルじL”
)を入れpチャネルトランジスタTpをオン、nチャネ
ルトランジスタTnをオフとすると電源Vl)Il+か
ら抵抗r、)ランジスタTp1画素CLIの経路でパル
ス状の電流が流れる。Therefore, for example, if the Vin of the inverter I is set to a low level,
), and when the p-channel transistor Tp is turned on and the n-channel transistor Tn is turned off, a pulse-like current flows through the path from the power supply Vl) Il+ to the resistor r and the transistor Tp1 and the pixel CLI.
一方インバータ■3 の入力Vrn3 を同様に“I7
”にすると、Vpoから画素CL3を通って電流が流れ
るが、この時には等価的に容量Cと抵抗RLが並列に接
続されているので、RLを通って直流的な電流が流れる
。On the other hand, the input Vrn3 of inverter ■3 is similarly set to “I7”.
”, a current flows from Vpo through the pixel CL3, but at this time, since the capacitor C and the resistor RL are equivalently connected in parallel, a DC-like current flows through RL.
従って第3図に示すように順次Vin1 〜viす。Therefore, as shown in FIG. 3, Vin1 to vi are sequentially displayed.
を“L゛にすると、抵抗rの両端の電圧Vrは、@素が
正常であればパルス状の波形のみが検出されるが、画素
CL 3のように障害があるとVrの3の位置に示すよ
うに直流分Vdが現われるので、障害がどこに発生した
のかを知ることができる。When the voltage Vr across the resistor r is set to "L", only a pulse-like waveform will be detected if the @ element is normal, but if there is a failure like pixel CL 3, the voltage Vr across the resistor r will be detected at position 3 of Vr. Since the DC component Vd appears as shown, it is possible to know where the fault has occurred.
また抵抗RLの値を電圧Vdの値からめることもできる
。Further, the value of the resistor RL can also be determined from the value of the voltage Vd.
(fl 発明の詳細
な説明したように、本発明によればCID画素の障害発
生箇所を検出することができ、又さらには障害ラインの
抵抗値を知ることもできる。(fl) As described in detail, according to the present invention, it is possible to detect a location where a fault occurs in a CID pixel, and further, it is also possible to know the resistance value of a fault line.
第1図は本発明の一実施例を示す図、第2図は第1図の
実施例をさらに詳細に示した図、第3図は各部の波形を
示す図である。
1:CID、2:CID駆動回路、3;シフトレジスタ
、l7−In:インバータ1 r:抵抗。
■ρρ:電源
り一−−−−−−−−−−−−」
第1 図
第 2 ΣFIG. 1 is a diagram showing one embodiment of the present invention, FIG. 2 is a diagram showing the embodiment of FIG. 1 in more detail, and FIG. 3 is a diagram showing waveforms at various parts. 1: CID, 2: CID drive circuit, 3: Shift register, l7-In: Inverter 1 r: Resistor. ■ρρ: Power source −−−−−−−−−−−−−” Figure 1, Figure 2 Σ
Claims (1)
ぞれ受け、電荷注入装置を駆動する複数の相補MOSイ
ンバータと、該複数のインバータと電源との間に共通に
設けられた電流波形検知手段を有することを特徴とする
電荷注入装置の駆動回路6A shift register, a plurality of complementary MOS inverters each receiving a plurality of outputs of the shift register and driving a charge injection device, and a current waveform detection means provided in common between the plurality of inverters and a power supply. Characteristic drive circuit 6 of charge injection device
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59037802A JPS60182277A (en) | 1984-02-29 | 1984-02-29 | Drive circuit of charge injection device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59037802A JPS60182277A (en) | 1984-02-29 | 1984-02-29 | Drive circuit of charge injection device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60182277A true JPS60182277A (en) | 1985-09-17 |
Family
ID=12507637
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59037802A Pending JPS60182277A (en) | 1984-02-29 | 1984-02-29 | Drive circuit of charge injection device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60182277A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004020331B3 (en) * | 2004-04-26 | 2005-10-20 | Pilz Gmbh & Co Kg | Apparatus and method for capturing an image |
-
1984
- 1984-02-29 JP JP59037802A patent/JPS60182277A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004020331B3 (en) * | 2004-04-26 | 2005-10-20 | Pilz Gmbh & Co Kg | Apparatus and method for capturing an image |
US7636117B2 (en) | 2004-04-26 | 2009-12-22 | Pilz Gmbh & Co. Kg | Image recording device and method |
US7952632B2 (en) | 2004-04-26 | 2011-05-31 | Pilz Gmbh & Co. Kg | Image recording device and method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2948682B2 (en) | Display device drive circuit | |
US7486288B2 (en) | Display device driving apparatus and display device using the same | |
JPS60182277A (en) | Drive circuit of charge injection device | |
KR20210087615A (en) | Display device and driving method thereof | |
JPH05119110A (en) | Direct current measuring device | |
JP4093407B2 (en) | Overcurrent detection circuit | |
JPH11160370A (en) | Abnormal voltage detection circuit | |
EP0865684A1 (en) | Charge measurement circuit | |
JP3235132B2 (en) | Semiconductor integrated circuit | |
JPS5829273A (en) | Noise detecting circuit for diode | |
EP0216276B1 (en) | Semiconductor logic tester with fast-recovery power supply | |
KR910009053Y1 (en) | Monitor self-test circuit | |
JP3572212B2 (en) | Thyristor switch drive circuit | |
JPS6018774A (en) | Phase sequence detector | |
JP3153788B2 (en) | Display device drive circuit | |
JPH0218494B2 (en) | ||
TWI409743B (en) | Correcting circuit, display panel and display apparatus | |
JPH0823478A (en) | Output circuit for solid-state image pickup device | |
JPS6236143Y2 (en) | ||
SU1113756A1 (en) | Device for checking logic state of digital circuits | |
JPH03229314A (en) | Power semiconductor device | |
JPH025335B2 (en) | ||
JPS638920A (en) | Optical coordinate input device | |
JPH0341842A (en) | Transmission system | |
JPH08136893A (en) | Liquid crystal display device |