JPS62121968A - Pcm signal recording method - Google Patents

Abstract

PURPOSE:To reduce the influence of drop-out by sampling and writing an analog signal in a memory and recording in different areas of a recording medium plural comb-shaped information data blocks which have been read at intervals several times. CONSTITUTION:Analog signals such as a sound signal, etc., are inputted to a sample-holding circuit 2, and sample-held by the signal of a clock signal generator 3. Digital data converted by an AD converter 4 is written in the memory 5. It is not read out in the writing order. Instead, one data block composed of continuous plural data is divided into the 1st comb-shaped data block and the 2nd comb-shaped data block, and read out at a place where said two data blocks disconnect. Besides, the same data block is repeatedly read out. A parallel/serial converter 6 outputs plural comb-shaped data blocks, which are added with a synchronizing signal, and recorded by a VTR 19. Thus the influence of the drop-out can be lightened.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for recording PCM (Pulse Code Modulation) signals, and more particularly, the present invention relates to a method for recording PCM (Pulse Code Modulation) signals, and more particularly, even if data dropout occurs during PCM recording, analog signals can be recorded well. This invention relates to a recording method that can be reproduced.

When recording and reproducing PCM signals using a recording medium such as S-type tape, signal dropout (missing) becomes a problem due to dust, scratches, deformation, etc. of the S-type tape. For this reason,
In the PCM recording and playback method of audio signals used in VTR's, there is a method of recording the same PCM signal twice to compensate for drop irregularities, and a method of recording both the PCM signal and the corresponding analog signal on tS tape. A method to record dropouts and compensate for dropouts, a method to detect dropouts and directly interpolate using data before and after the dropout occurs,
A method of compensating for dropout by holding data before dropout is adopted. According to the method described above, it is possible to compensate for dropout to some extent, but it is not only impossible to compensate completely, but also it is impossible to achieve good compensation if an easy compensation method such as hold is adopted. Furthermore, if a compensation method such as interpolation is adopted, there is a drawback that the interpolation calculation becomes troublesome.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a PCX signal recording method that can relatively easily and significantly reduce the effect of dropout Wt.

To achieve the above object, the present invention includes sampling an analog signal at a constant period and sequentially converting it into digital data, writing the data into a memory, and directly transferring the data obtained at each sampling from the memory. obtaining a plurality of comb-like information data blocks containing information in a comb-like shape by reading out the data intermittently in accordance with the sampling order a plurality of times without reading out the plurality of comb-like information data blocks; The present invention relates to a data recording method comprising recording on different areas of a recording medium.

According to the above invention, a comb-shaped information data block can be easily obtained using a memory. The plurality of comb-shaped information data blocks contain information in a comb-shaped manner, and since this data arrangement follows sampling Ill, this comb-shaped information data block can not only be easily formed, but also be When an out occurs, it becomes possible to easily compensate for it.

Embodiments of the present invention will be described below with reference to the drawings.

First, a description will be given of FIG. 1, which shows the entire recording section of a PCM recording and reproducing apparatus using a VTR'i according to the present invention.

When an analog signal such as an audio signal is input to the sample and hold circuit (2) from the input terminal Uυ, f'L is determined by the clock signal provided from the clock signal generator (3).
Next, the analog signal is sampled and held at a predetermined sampling rate. An analog-to-digital converter, ie, an A-D converter (4) is connected to the sample-and-hold circuit (2), so that the sample-and-hold analog signal is converted into a digital signal.

Digital signals are output in parallel from the A-D converter (4), but PCM signals are output in series by the scratch pad memory (5) at the output stage of the A-D converter and the parallel-to-serial converter i61. It is considered a signal. The loading of the PCM signal to the memory 51 is performed sequentially by address designation by the loading address circuit (8).

The data written in the memo (January 5) is read out by the address designation by the read address circuit (91), but in the case of this embodiment, the data written in the memo (January 5) is not read in the order written in the memory (January 5). , one data block consisting of a plurality of continuous data is divided into a first comb-shaped data block (a block containing information in a comb-shaped shape) and a second comb-shaped data block, and The comb-shaped data block and the second comb-shaped data block are read out at different times, and the same data block is read out repeatedly. Regarding this kind of special signal arrangement method, please refer to Part 31.
(101C is a circuit that forms data parity bit 1 and applies it to the parallel-to-serial converter 161. Therefore, a parity pit is added from the parallel-to-serial converter (6).
A PCM signal is output.

Since the output of the parallel-single column converter (6) and the output of the synchronizing signal circuit 1LI are coupled through the resistors 1) and U, the PCM signal is given from the synchronous signal circuit (1) 1. The vertical synchronization signal (141) and the frame synchronization signal α shown in FIG. This is a signal that broadly distinguishes columns, and is also used for tape editing points.The above frame synchronization signal α is a subdivision synchronization signal that subdivides between vertical synchronization signals, and is used to read out single or multiple data. It is a signal that serves as a reference for the above-mentioned multi-component signal.

Such a composite PCM signal is processed by an FM modulation circuit (161,
FM recording is performed on magnetic tape □□□ by a VTR [Matsu] consisting of a circuit board, a Taki head α mark, etc.

Next, the recording method will be explained in detail with reference to FIG. Memo January 5
) is written in the sampling order, but the digital signal corresponding to the analog signal is not read out to ll[ of this writing. For example, data blocks A, B, C1D, E each consisting of 128 words.

Even if F, G, etc. are written in this order, they are not read out in this order. Figure 3 (The islands indicate the order in which data blocks are read, and are approximately 2 times faster than the data writing speed.
By reading data at twice the speed, the same data is read twice within the same time as it took to write. A, B%C without a dash in Figure 3 (B)
1... indicates the first read data block, and A, B, C1... attached to the dash
indicates the second read data block. Therefore, after reading the first data block At-, the same data is read again to form the first data block A' for double recording, and after the repeated reading of the first data block A is completed, the second data block B is Perform the winnowing process. The data blocks A, B%C1, . . . each consist of 28 words, and when writing, as shown in FIG.
Up to 27 data blocks are regularly arranged.

When reading, the files are not read in the order shown in FIG. 3 (A), but in the order of one application shown in FIG.
Even-numbered data A from point 1) to point 12 in C). ,A2,A,,A6,...A1□2,A
1□6 is read out sequentially, and this n is the first comb-shaped data block.
Odd numbered data A1, A1, A6, etc. between time points
. . . A1□Ss A12F is read out next, and this is set as the second comb-shaped data block. If the [th] comb-shaped data block and the second comb-shaped data block are read out, the entire data block from Ao to A127 is read out. As shown in FIG. 3 (1), the data 80 in this embodiment has a word structure of 13 bits including the parity check bit '6', and the data from the parallel-column converter (6) is as shown in FIG. 3 (1). The signals of each bit are sent out in sequence in the Dl arrangement.

Fig. 3 (As is clear from Q, a composite PCIVi code is formed in which two pieces of data are arranged between the same XA signal 151 of the frame, and it is also recorded in this state on the Yamaki tape sword. be done.

In addition, in this embodiment, between the vertical synchronizing signal (141) generated at the time point <1 as shown in FIG.
There is no double recording A-F'i, and the arrangement is such that double recording does not occur over another vertical synchronizing signal section. As a result, even if the tape is edited and data is replaced in the vertical synchronization signal circle, the double recorded data A'~
F' never disappears.

In the playback device shown in FIG.
Or, if you play the composite PCM signal recorded on FM tape 4 using another Yoki head sail.

For example, 5.4PviHz corresponds to the PCM signal ]
A frequency signal of 4.6 MHz is obtained corresponding to "0" of the PCM signal, and a signal of 3.8 MHz is obtained corresponding to the synchronization signal. The FM waves detected by the head are amplified by the regenerative amplifier circuit, and then demodulated by the FM demodulation circuit to generate, for example, a ternary composite PCM.
It becomes a signal. The dropout detection circuit I24I is installed before the FM demodulation circuit C~, and detects a drop in the level of the reproduced signal, that is, the reproduced FM wave, as a dropout. Data separated in a signal separation circuit connected to the FM demodulation circuit is sent to a scratch board memory. In addition, the vertical synchronization signal and frame synchronization signal separated by the synchronization signal separation circuit connected to the FM demodulation circuit t23I are connected to the address circuit! 2F! ; It is sent to I and is used to control the data loading into memory 4. The PCM signal output from the signal separation circuit 25) is also applied to a parity check circuit ρJ, where a parity check is performed. Then, only when a parity error occurs, an output is generated from the check @ path □□□, which is sent to memory 4 via OR circuit 4, and it is determined that the address is in error. Stored in 2F5.

Since the output of the dropout detection circuit is also input to the OR circuit circle, even when a dropout is detected, the fact that the address is an error is stored in the memory. In this embodiment, the OR circuit (2) has two inputs, a parity error signal and a dropout detection signal, but the mismatch output of the double recording comparison circuit (31) is also input, and the second input of the double recording An error may be determined when the recorded data and the second recorded data do not match. In the double recording comparison circuit 4, for example, the first recording data A shown in FIG.
.

and the second recorded data A□ are compared, and if they match, the recorded data A1 is written into the memory (2e).On the other hand, the first recorded data A and the second recorded data
When the recorded data A1 and the recorded data A1 do not match, the data A1 or A' in which no parity error or dropout has occurred is written. Therefore, if the first recorded data 80 is found to have an error in the parity check or dropout detection, the second recorded data Al is written to the memory 061 in place of Al, and is then output. . Also, the output of the OR circuit C301 causes the
The recorded data A1 is also warped due to an error, and the second recorded data A
, if it turns out to be a % error, the error detection circuit (
An output is generated from an error compensation circuit, and compensation for data errors is performed, for example, by linear interpolation based on the data before and after the error or by holding the signal before the error.

1) The next data sent from 1i1 is written to the address specified by the write address circuit (2).
A signal with the pattern shown in is detected, and the signal separation circuit outputs the data in the arrangement shown in Fig. 3 (q), but it is not written to the memory QQ as it is, but is returned to the data arrangement shown in Fig. 3 CAI. Write, ie, data A.

Data A2 is input after writing 80 to the specified address, but instead of writing it to the address next to 80, 1
Write data to the skipped address, and write data A1, which will be sent a while later, to the address next to A. A2-・・・・・・
The order is as follows.

Data is read from the memory based on address designation by a read address circuit. Since the data is converted into the original array and stored in the memory 4 as described above, the data is read out sequentially by the read address circuit example. That is, Ao, A, , A2 . shown in FIG. 3(A). ...... are arranged in the order of arrangement. In addition, a PCM signal in which data is arranged corresponding to the analog signal is obtained.

In this embodiment, when storing data into the memory (38), the data array shown in FIG. 3 (Q) is returned to the data array shown in FIG. 3 (3). In some cases, the array in FIG. 3(C) may be returned to the array in FIG. 3(A). In this case, after reading data 80, read AI without reading A2.

After that, A2 is read out. As a result, the data array shown in FIG. 3 can be obtained.

In the error compensation circuit (g), when the number of data errors is only partially fit, compensation is performed by interpolation,
When two or more data errors occur in succession, compensation is made by holding the data before the error. By the way, in this method, data errors almost never occur when two or more pieces are immersed in succession. This is because data is recorded separately into even numbers and odd numbers.1. For example, even if data A, A2, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, A, and A.

The probability that A5A will cause an error due to dropout is extremely low. Therefore, if part of one comb-shaped data block drops out, but the other comb-shaped data block remains, the data remains in a comb-shaped data block. In this way, if the data remains in a comb-like shape, compensation data that is extremely close to correct data can be obtained by interpolation calculation. Furthermore, since the number of data errors is constant, interpolation calculations are extremely easy. Furthermore, in this embodiment, interpolation compensation is performed in the case of one data error, but even when compensation is performed by holding the data before the error, errors do not occur continuously, so it is possible to obtain a signal close to one optical signal. I can do it.

The PCM signal or error-compensated PCVi signal obtained from the memory (4) is converted into an analog signal by a D-A converter (331).This causes the output terminal f361 to be connected to the input terminal [1] in FIG. Since a large number of data, which is an analog signal given to the data block, is divided into data blocks, which are further divided into comb-shaped blocks and recorded at different locations, dropouts may occur in the comb-shaped data block. However, the possibility of dropout occurring in the second comb-shaped data block is extremely low, and it becomes possible to easily reproduce an analog signal close to the original analog signal based on the second comb-shaped data block. .

Further, in the above-described embodiment, since double recording is performed and data is arranged in a comb-like shape, the probability that one of the comb-like data blocks will result in a data error is extremely low. Therefore, PCM recording and reproduction can be performed with fewer problems caused by signal dropouts.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, but can be further modified. For example, instead of changing the data arrangement in units of words to form a comb-teeth shape, the arrangement may be changed in a plurality of words l#. That is, the hit data block shown in FIG. 3(A) is, for example, A. A first comb-shaped data block such as At A4 As Am A9;

It is also possible to record the data separately with a second comb-shaped data block such as A6 AT AIOAl□. Also, Figure 3 (AJ
A data block as shown in IC. , As, As
-8-1 first comb-shaped data block, AI, A
4. A1. −, − second comb-shaped data blocks;
A4, A5. As0010. It may also be a third comb-shaped data block. Furthermore, it may be divided into even more comb-shaped data blocks. Also, in the implementation column, memory (5
), the data array shown in FIG. The reading is performed along the arrangement of the IC in FIG.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a recording section of a PCM recording and reproducing apparatus according to an embodiment of the present invention, FIG. 2 is a block diagram showing a reproducing section, and FIG. 3 is a waveform diagram illustrating a data arrangement. (A) shows the original data arrangement, ■) shows the double record arrangement, (0 shows the comb-like record arrangement, and ('
D is a diagram showing a bit arrangement. In the symbols used in the drawings, (1) is the input terminal, (2) is the sample and hold circuit M, and t41idA-D.
Converter, (5) is data memo + J, (61 is parallel -
Serial converter, (81 is write address circuit, (91'
is the read address circuit, the bet is the i-head, and the VT is
R1 (2■ is a 3-ki tape.

Claims (1)

[Claims] (1) Sampling analog signals at regular intervals and sequentially converting them into digital data; writing the data into memory; and controlling the sampling order without reading the data obtained for each sampling from the memory as is. obtaining a plurality of comb-like information data blocks containing information in a comb-like shape by reading out data in a comb-like manner multiple times; and recording the plurality of comb-like information data blocks in different areas of a recording medium. A method for recording PCM signals consisting of: