JPS62117703U - - Google Patents
Info
- Publication number
- JPS62117703U JPS62117703U JP533086U JP533086U JPS62117703U JP S62117703 U JPS62117703 U JP S62117703U JP 533086 U JP533086 U JP 533086U JP 533086 U JP533086 U JP 533086U JP S62117703 U JPS62117703 U JP S62117703U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- capacitor
- frequency compensation
- collector
- ground
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 8
- 230000035939 shock Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Description
第１図は、本考案の一実施例を示す回路図、及
び第２図は従来の高域補償回路を示す回路図であ
る。
３…第１トランジスタ、４…第１コンデンサ、
５…第２コンデンサ、６…磁気ヘツド、１０…第
２トランジスタ、１１…抵抗。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional high frequency compensation circuit. 3...first transistor, 4...first capacitor,
5...Second capacitor, 6...Magnetic head, 10...Second transistor, 11...Resistor.
Claims (1)
域補償用の第１コンデンサと、前記第１コンデン
サに並列接続される第２コンデンサと、前記第２
コンデンサとアースとの間にコレクタ・エミツタ
路が挿入される第１トランジスタとを有し、前記
第１トランジスタをオンオフさせることにより高
域補償量を変化させる様にした高域補償回路にお
いて、ベースに所定の電圧が印加され、エミツタ
が接地された常時オン状態の第２トランジスタを
設け、該第２トランジスタのコレクタを抵抗を介
して前記第１トランジスタのコレクタに接続する
ことにより、前記第１トランジスタのオンオフに
起因するシヨツク音の発生を防止することを特徴
とする高域補償回路。 a first capacitor for high frequency compensation disposed between the output end of the magnetic head and the ground; a second capacitor connected in parallel to the first capacitor; and a second capacitor connected in parallel to the first capacitor.
a first transistor having a collector-emitter path inserted between the capacitor and the ground, and a high-frequency compensation circuit that changes the amount of high-frequency compensation by turning on and off the first transistor; By providing a second transistor which is always on, to which a predetermined voltage is applied and whose emitter is grounded, and by connecting the collector of the second transistor to the collector of the first transistor through a resistor, the first transistor A high frequency compensation circuit characterized by preventing the occurrence of shock noise caused by on/off switching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP533086U JPH0629764Y2 (en) | 1986-01-17 | 1986-01-17 | High frequency compensation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP533086U JPH0629764Y2 (en) | 1986-01-17 | 1986-01-17 | High frequency compensation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62117703U true JPS62117703U (en) | 1987-07-27 |
| JPH0629764Y2 JPH0629764Y2 (en) | 1994-08-10 |
Family
ID=30786813
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP533086U Expired - Lifetime JPH0629764Y2 (en) | 1986-01-17 | 1986-01-17 | High frequency compensation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0629764Y2 (en) |
-
1986
- 1986-01-17 JP JP533086U patent/JPH0629764Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0629764Y2 (en) | 1994-08-10 |
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