JPS62115731U - - Google Patents
Info
- Publication number
- JPS62115731U JPS62115731U JP171686U JP171686U JPS62115731U JP S62115731 U JPS62115731 U JP S62115731U JP 171686 U JP171686 U JP 171686U JP 171686 U JP171686 U JP 171686U JP S62115731 U JPS62115731 U JP S62115731U
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- voltage
- actuator
- switching means
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005856 abnormality Effects 0.000 claims description 4
- 238000001514 detection method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Protection Of Generators And Motors (AREA)
Description
第1図は、本考案の一実施例を示す電気回路図
である。第2a図及び第2b図は、それぞれ従来
例を示す電気回路図である。
1:制御回路、10:ドライバ回路、30:異
常検知回路、31:電圧判定手段(第2の電圧判
定手段)、32:電圧判定手段(第1の電圧判定
手段)、33:電圧判定手段(第4の電圧判定手
段)、34:電圧判定手段(第3の電圧判定手段
)、M:電気モータ(アクチユエータ)、Q1:
トランジスタ(第1のスイツチング手段)、Q2
:トランジスタ(第2のスイツチング手段)、Q
3:トランジスタ(第3のスイツチング手段)、
Q4:トランジスタ(第4のスイツチング手段)
、PW,E:電源ライン、D1:ダイオード(第
2の整流手段)、D2:ダイオード(第1の整流
手段)。
FIG. 1 is an electrical circuit diagram showing one embodiment of the present invention. FIGS. 2a and 2b are electrical circuit diagrams showing conventional examples, respectively. 1: Control circuit, 10: Driver circuit, 30: Abnormality detection circuit, 31: Voltage determination means (second voltage determination means), 32: Voltage determination means (first voltage determination means), 33: Voltage determination means ( (4th voltage determination means), 34: Voltage determination means (third voltage determination means), M: Electric motor (actuator), Q1:
Transistor (first switching means), Q2
:Transistor (second switching means), Q
3: Transistor (third switching means),
Q4: Transistor (fourth switching means)
, PW, E: power supply line, D1: diode (second rectifier), D2: diode (first rectifier).
Claims (1)
第1の端子との間に介挿された第1のスイツチン
グ手段、アクチユエータの第2の端子と電源回路
の第1の端子との間に介挿された第2のスイツチ
ング手段、アクチユエータの第1の端子と電源回
路の第2の端子との間に介挿された第3のスイツ
チング手段及びアクチユエータの第2の端子と電
源回路の第2の端子との間に介挿された第4のス
イツチング手段を有する電気付勢装置の異常検出
回路において; 前記第1のスイツチング手段の端子間の電圧を
判定する第1の電圧判定手段、第2のスイツチン
グ手段の端子間の電圧を判定する第2の電圧判定
手段、第3のスイツチング手段の端子間の電圧を
判定する第3の電圧判定手段及び第4のスイツチ
ング手段の端子間の電圧を判定する第4の電圧判
定手段を備えたことを特徴とする、電気付勢装置
の異常検出回路。 (2) 第1の電圧判定手段の出力端子を第3の電
圧判定手段の入力端子に接続して第3の電圧判定
手段の入力端子とアクチユエータの第1の端子と
の間に第1の整流手段を介挿し、第2の電圧判定
手段の出力端子を第4の電圧判定手段の入力端子
に接続して第4の電圧判定手段の入力端子とアク
チユエータの第2の端子との間に第2の整流手段
を介挿した、前記実用新案登録請求の範囲第(1)
項記載の電気付勢装置の異常検出回路。[Claims for Utility Model Registration] (1) A first switching means inserted between a first terminal of an actuator and a first terminal of a power supply circuit, a first switching means inserted between a first terminal of an actuator and a first terminal of a power supply circuit; a second switching means inserted between the first terminal of the actuator and a second terminal of the power supply circuit; a third switching means inserted between the first terminal of the actuator and the second terminal of the power supply circuit; In an abnormality detection circuit for an electrical energizing device having a fourth switching means interposed between a terminal and a second terminal of a power supply circuit; a second voltage determining means for determining the voltage between the terminals of the second switching means, a third voltage determining means for determining the voltage between the terminals of the third switching means, and a fourth switching means. An abnormality detection circuit for an electrical energizing device, comprising a fourth voltage determining means for determining a voltage between terminals of the circuit. (2) The output terminal of the first voltage determination means is connected to the input terminal of the third voltage determination means, and the first rectification is performed between the input terminal of the third voltage determination means and the first terminal of the actuator. A means is inserted between the input terminal of the fourth voltage determining means and the second terminal of the actuator by connecting the output terminal of the second voltage determining means to the input terminal of the fourth voltage determining means. Claim No. (1) of the above-mentioned utility model registration, in which a rectifying means is inserted.
An abnormality detection circuit for the electric energizing device described in .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP171686U JPS62115731U (en) | 1986-01-10 | 1986-01-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP171686U JPS62115731U (en) | 1986-01-10 | 1986-01-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62115731U true JPS62115731U (en) | 1987-07-23 |
Family
ID=30779886
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP171686U Pending JPS62115731U (en) | 1986-01-10 | 1986-01-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62115731U (en) |
-
1986
- 1986-01-10 JP JP171686U patent/JPS62115731U/ja active Pending