JPS6248189U - - Google Patents
Info
- Publication number
- JPS6248189U JPS6248189U JP14045485U JP14045485U JPS6248189U JP S6248189 U JPS6248189 U JP S6248189U JP 14045485 U JP14045485 U JP 14045485U JP 14045485 U JP14045485 U JP 14045485U JP S6248189 U JPS6248189 U JP S6248189U
- Authority
- JP
- Japan
- Prior art keywords
- rectifying
- inverter
- resistor
- transistor
- smoothing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009499 grossing Methods 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
Landscapes
- Rectifiers (AREA)
- Control Of Electrical Variables (AREA)
- Dc-Dc Converters (AREA)
Description
第1図は本考案実施例装置の構成を示す回路接
続図。第2図は従来例装置の構成を示す回路接続
図。
1……入力電源、2……インバータ、3……過
電流検出回路、4……インバータ出力端子、5…
…マグアンプ、6,7,8,14……ダイオード
、9……コイル、10……コンデンサ、11,1
3,18……トランジスタ、12,15,16,
17,19,20……抵抗器。
FIG. 1 is a circuit connection diagram showing the configuration of an apparatus according to an embodiment of the present invention. FIG. 2 is a circuit connection diagram showing the configuration of a conventional device. 1...Input power supply, 2...Inverter, 3...Overcurrent detection circuit, 4...Inverter output terminal, 5...
...Mag amp, 6,7,8,14...Diode, 9...Coil, 10...Capacitor, 11,1
3, 18...transistor, 12, 15, 16,
17, 19, 20...Resistor.
Claims (1)
手段(7,8,9および10)と、 このインバータとこの整流平滑手段との間の経
路に挿入された可飽和リアクトル5と、 この可飽和リアクトルおよび上記整流平滑回路
の接続点と直流出力端子との間にそのエミツタお
よびコレクタが挿入された第一トランジスタ11
と を備えたマグアンプ制御電源装置において、 上記製流平滑回路と上記直流出力端子との経路
に挿入された抵抗17と、 上記第一トランジスタのベースにそのコレクタ
が接続され、そのベースとエミツタとが上記抵抗
の両端に接続された第二のトランジスタ18と を備えたことを特徴とするマグアンプ制御電源装
置。[Claims for Utility Model Registration] An inverter 2 connected to a DC input terminal, a rectifying and smoothing means (7, 8, 9, and 10) for rectifying and smoothing the output of this inverter, and a combination of this inverter and this rectifying and smoothing means. a saturable reactor 5 inserted in the path between the two, and a first transistor 11 whose emitter and collector are inserted between the connection point of the saturable reactor and the rectifying and smoothing circuit and the DC output terminal.
A mag-amp control power supply device comprising: a resistor 17 inserted in a path between the current flow smoothing circuit and the DC output terminal; a collector connected to the base of the first transistor; and an emitter connected to the resistor 17; A mag-amp control power supply device comprising a second transistor 18 connected to both ends of the resistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14045485U JPS6248189U (en) | 1985-09-12 | 1985-09-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14045485U JPS6248189U (en) | 1985-09-12 | 1985-09-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6248189U true JPS6248189U (en) | 1987-03-25 |
Family
ID=31047316
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14045485U Pending JPS6248189U (en) | 1985-09-12 | 1985-09-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6248189U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02219471A (en) * | 1989-02-17 | 1990-09-03 | Pfu Ltd | Magnetic amplifier |
-
1985
- 1985-09-12 JP JP14045485U patent/JPS6248189U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02219471A (en) * | 1989-02-17 | 1990-09-03 | Pfu Ltd | Magnetic amplifier |
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