JPS6257596U - - Google Patents
Info
- Publication number
- JPS6257596U JPS6257596U JP14767685U JP14767685U JPS6257596U JP S6257596 U JPS6257596 U JP S6257596U JP 14767685 U JP14767685 U JP 14767685U JP 14767685 U JP14767685 U JP 14767685U JP S6257596 U JPS6257596 U JP S6257596U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- switches
- terminal
- switch
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Motor And Converter Starters (AREA)
Description
第１図はこの考案の一実施例を示す回路図、第
２図は従来の直流モータ制御回路を示す図である
。
２２，２４……リレー回路、２３……整流回路
、２６，２７……駆動回路、３３，３４……時定
数回路。
FIG. 1 is a circuit diagram showing an embodiment of this invention, and FIG. 2 is a diagram showing a conventional DC motor control circuit. 22, 24... Relay circuit, 23... Rectifier circuit, 26, 27... Drive circuit, 33, 34... Time constant circuit.
Claims (1)
路と、この第１のリレー回路を第１の時定数回路
を介して供給される制御信号に応答して駆動する
第１の駆動回路と、一方の入力端子が前記第１の
スイツチを介して交流出力部の一方の出力端子に
接続され、他方の入力端子が直接前記交流出力部
の他方の出力端子に接続された整流回路と、前記
整流回路の一方の出力端子が第３、第４のスイツ
チの各一方の入力端子に接続され、前記整流回路
の他方の出力端子が前記第３、第４のスイツチの
各他方の入力端子に接続された第２のリレー回路
と、この第２のリレー回路を第２の時定数回路を
介して供給される制御信号に応答して駆動する第
２の駆動回路と、前記第３、第４のスイツチの出
力端子が一方と他方の端子に接続され、かつこの
一方と他方の端子間には前記第２のスイツチが接
続された直流モータとを具備し、前記第１、第２
の時定数回路は第１乃至第４のスイツチを前記制
御信号で駆動するのに、前記モータの電源投入時
には第１、第２のスイツチが前記第３、第４のス
イツチより遅れ、電源しや断時には前記第３、第
４のスイツチが前記第１、第２のスイツチより遅
れて動作するように設定されたことを特徴とする
直流モータ制御回路。 a first relay circuit having first and second switches; and a first drive circuit that drives the first relay circuit in response to a control signal supplied via a first time constant circuit. , a rectifier circuit having one input terminal connected to one output terminal of the AC output section via the first switch, and the other input terminal directly connected to the other output terminal of the AC output section; One output terminal of the rectifier circuit is connected to one input terminal of each of the third and fourth switches, and the other output terminal of the rectifier circuit is connected to the other input terminal of each of the third and fourth switches. a second relay circuit, a second drive circuit that drives the second relay circuit in response to a control signal supplied via a second time constant circuit; An output terminal of the switch is connected to one terminal and the other terminal, and a DC motor is provided between the one terminal and the other terminal to which the second switch is connected, and the first and second
Although the time constant circuit drives the first to fourth switches with the control signal, when the motor is powered on, the first and second switches lag behind the third and fourth switches, making it difficult to turn on the power. A DC motor control circuit characterized in that the third and fourth switches are set to operate later than the first and second switches when the switch is off.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14767685U JPS6257596U (en) | 1985-09-27 | 1985-09-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14767685U JPS6257596U (en) | 1985-09-27 | 1985-09-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6257596U true JPS6257596U (en) | 1987-04-09 |
Family
ID=31061253
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14767685U Pending JPS6257596U (en) | 1985-09-27 | 1985-09-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6257596U (en) |
-
1985
- 1985-09-27 JP JP14767685U patent/JPS6257596U/ja active Pending