JPS62112203A - Writing circuit for magnetic storage device - Google Patents

Writing circuit for magnetic storage device

Info

Publication number
JPS62112203A
JPS62112203A JP25105485A JP25105485A JPS62112203A JP S62112203 A JPS62112203 A JP S62112203A JP 25105485 A JP25105485 A JP 25105485A JP 25105485 A JP25105485 A JP 25105485A JP S62112203 A JPS62112203 A JP S62112203A
Authority
JP
Japan
Prior art keywords
write
writing
circuit
head
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25105485A
Other languages
Japanese (ja)
Inventor
Ryuichi Sakano
坂野 竜一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP25105485A priority Critical patent/JPS62112203A/en
Publication of JPS62112203A publication Critical patent/JPS62112203A/en
Pending legal-status Critical Current

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  • Digital Magnetic Recording (AREA)

Abstract

PURPOSE:To decrease the number of the writing electric current driving circuit and to execute the decrease in cost by using one writing electric current driving circuit commonly for two reading and writing heads connected to the output terminal and executing the reading and writing. CONSTITUTION:By the signal inputted from the head selecting input signal terminal 6, a pre-writing circuit 3 of the reading and writing head system corresponding to a reading and writing head 1 to write at a head selecting circuit 4 is selected. Next, by the selected pre-writing circuit 3, the writing input signal inputted from a writing input signal terminal 5 is amplified. At both edges of a reading and writing head 1 driven by the differential output signal, the output terminal is inputted to a writing electric current driving circuit 2 connected respectively, thereby being able to drive the special reading and writing head 1 by the output of the writing electric current driving circuit 2.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、情報信号を記憶/再生ずろことが可能な磁
気記憶装置用古き込み回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a worn-out circuit for a magnetic storage device capable of storing/reproducing information signals.

〔従来の技術〕[Conventional technology]

第3図は従来の磁気記憶装置用書き込み回路の一例を示
す構成図で、この図において、1は読み出し/Nき込み
ヘッド、2は前記読み出し/書き込みヘッド1を駆動す
る書き込み電流駆動回路、3は書き込み入力信号を増幅
する前置書き込み回路、4は書き込みを行う前記読み出
し/書き込みヘッド1のうちのいずれか1つを選択する
ヘッド選択回路、5は書き込み入力信号つ1M子、6は
ヘッド選択入力信号端子である。
FIG. 3 is a configuration diagram showing an example of a conventional write circuit for a magnetic storage device. In this figure, 1 is a read/N write head, 2 is a write current drive circuit for driving the read/write head 1, and 3 is a block diagram showing an example of a conventional write circuit for a magnetic storage device. 1 is a pre-write circuit for amplifying a write input signal; 4 is a head selection circuit for selecting one of the read/write heads 1 for writing; 5 is a write input signal 1M element; 6 is a head selection circuit This is an input signal terminal.

次に動作について説明する。まず、ヘッド選択入力信号
端子6から入力される信号によりヘッド選択回路4で、
書き込みを行う読み出し/書き込みヘッド1に対応した
読み出し/Nき込みヘッド系の前置書き込み回路3が選
択される。次に、選択されたこの前置書き込み回路3に
よりδき込み入力信号端子5から入力されろBき込み入
力信号を増幅する。そして、その差動出力信号を害き込
み電流駆動回路2に入力することにより、特定の読み出
し/占き込みヘッド1を駆動することができる。
Next, the operation will be explained. First, the head selection circuit 4 uses a signal input from the head selection input signal terminal 6 to
The pre-write circuit 3 of the read/N write head system corresponding to the read/write head 1 that performs writing is selected. Next, the selected pre-write circuit 3 amplifies the B write input signal input from the δ write input signal terminal 5. Then, by inputting the differential output signal to the input current drive circuit 2, a specific read/interval head 1 can be driven.

〔発明が解決しようとする間顕点〕[The point that the invention is trying to solve]

上記のような従来の磁気記憶装置用書き込み回路では、
それぞれの読み出し/書き込みヘッド1に1対の書き込
み電流駆動回′eJ2が必要であり、コストが増すとい
う問題点があった。
In the conventional write circuit for magnetic storage devices as described above,
Each read/write head 1 requires a pair of write current drive circuits 'eJ2, which poses a problem of increased cost.

この発明は、かかる問題点を解決するためになされたも
ので、書き込み電流駆動回路数を削減して、コスI・ダ
ウンの可能な磁気記憶装置用書き込み回路を得ろことを
目的とする。
The present invention has been made to solve these problems, and an object of the present invention is to reduce the number of write current drive circuits and obtain a write circuit for a magnetic storage device that can reduce cost I.

〔間:桓点を解決するための手段〕[Between: Means to solve the problem]

この発明に係る磁気記憶装置用書き込み回路は、・\リ
ド選択入力信号を受けて読み出し/Bき込み・\リド系
を選択するためのヘッド選択回路と、このヘッド選択回
路からの出力を受けたときには入力される書き込み入力
信号を増幅して出力する所要数の前置書き込み回路と、
直列に接続された所要数の読み出し/書き込み・\リド
と、その出力端子がそれぞれ各読み出し/書き込みヘッ
ド間に接続され、その入力端子には出力端子と接続され
た両端の読み出し/@き込み・\リドに対応する前置書
き込み回路からの出力が接続された所要数の書き込み電
流駆動回路とを備えたものである。
The write circuit for a magnetic storage device according to the present invention includes: a head selection circuit for receiving a read/B write system in response to a read selection input signal and selecting a read system; and a head selection circuit for receiving an output from the head selection circuit. Sometimes a required number of pre-write circuits that amplify and output an input write input signal;
The required number of read/write heads connected in series and their output terminals are respectively connected between each read/write head, and the input terminals have read/write heads at both ends connected to the output terminals. It is equipped with a required number of write current drive circuits to which outputs from pre-write circuits corresponding to \read are connected.

〔作用〕[Effect]

この発明においては、1つの書き込み電流駆動回路がそ
の出力端子と接続された2つの読み出し/書き込みヘッ
ドに共通に使用され、読み出し/書き込みを行う。
In this invention, one write current drive circuit is commonly used by two read/write heads connected to its output terminal to perform reading/writing.

〔実施例〕〔Example〕

第1図はこの発明の一実施例を示す磁気記憶装置用書き
込み回路の構成図で、第3図と同一符号は同一部分を示
す。
FIG. 1 is a block diagram of a write circuit for a magnetic storage device showing one embodiment of the present invention, and the same reference numerals as in FIG. 3 indicate the same parts.

次に動作について説明する。まず、ヘッド選択入力信号
端子6から入力される信号によりヘッド選択回路4で書
き込みを行う読み出し/書き込みヘラ1!1に対応した
読み出し/書き込みへ・ラド系の前置書き込み回路3が
選択される。次に、選択されたこの前置書き込み回路3
により書き込み入力信号端子5から入力された書き込み
入力信号を増幅ずろ。そして、その差動出力信号が駆動
しようとする読み出し/書き込みヘッド]の両端に、そ
の出力端子がそれぞれ接続された書き込み電流駆動回#
′12に入力する乙とにより、その書き込み電流駆動回
路2の出力に、よって、特定の読み出し/書き込みヘッ
ド1を′yE動することができる。
Next, the operation will be explained. First, a signal input from the head selection input signal terminal 6 selects the read/write/rad system pre-write circuit 3 corresponding to the read/write spatula 1!1 that performs writing in the head selection circuit 4. Next, this selected prewriting circuit 3
The write input signal input from the write input signal terminal 5 is amplified. Then, the write current drive circuit whose output terminals are respectively connected to both ends of the read/write head to be driven by the differential output signal.
The output of the write current drive circuit 2 can be used to drive a particular read/write head 1 according to the output of the write current drive circuit 2.

なお、上記実施例では、読み出し/書き込みへリド1を
2端子のものとして説明したが、第2図に示すように中
点0iai子回路7を有する読み出し/書き込みヘッド
8を用いても同様に動作させることができる。
In the above embodiment, the read/write head 1 is described as having two terminals, but it operates similarly even if a read/write head 8 having a midpoint 0iai child circuit 7 is used as shown in FIG. can be done.

〔発明の効果〕〔Effect of the invention〕

乙の発明は以上説明したとおり、・−リド選択入力信号
を受けて読み出し/書き込みヘッド系を選択するための
ヘッド選択回路と、このヘッド選択回路からの出力を受
けたときには入力される書き込み入力信号を増幅して出
力する所要数の前置書き込み回路と、直列に接続された
所要数の読7ノ出し/書き込み・\・リドと、その出力
端子がそれぞれ各読み出し/書き込みヘッド間に接続さ
れ、その入力端子に(よ出力端子が接続された両O%’
の読み出し/書き込み・\リドに対応する前置書き込み
回路からの出力が接続された所要数の書き込み電流駆動
回路とを備えたので、1つの書き込み電流駆動回路がそ
の出力端子と接続された2つの読み出(7/書き込み・
\リドに共通に使用され、書き込み電流駆動回路数を削
減でき、コストグウノを図れるという効果がある。
As explained above, the invention of O is: - A head selection circuit for selecting a read/write head system in response to a read selection input signal, and a write input signal that is input when an output from this head selection circuit is received. A required number of pre-write circuits for amplifying and outputting the same, a required number of serially connected read/write circuits, and their output terminals are connected between each read/write head, respectively. Both output terminals are connected to their input terminals (O%')
Since the required number of write current drive circuits are connected to the output from the pre-write circuit corresponding to the read/write/\read, one write current drive circuit has two write current drive circuits connected to its output terminal. Read (7/Write/
It is commonly used for \read, and has the effect of reducing the number of write current drive circuits and reducing costs.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示す磁気記憶装置用書き
込み回路の構成図、第2図はこの発明の同じく他の実施
例を示す構成図、第3図は従来の磁気記憶装置用書き込
み回路を示す構成図である、3図において、1は読み出
し/書き込みヘッド、2は書き込み電流駆動回路、3は
@買占き込み回路、4はヘッド選択回路、5は書き込み
入力信号つti子、6はへ・リド選択入力信号端子、7
は中点端子回路である。 なお、各図中の同一符号は同一または相当部分を示す。 第1図 5書1込与入カイ(号 6へ、ラド選択入力信号端子 第2図
FIG. 1 is a block diagram of a write circuit for a magnetic memory device showing one embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. 3 is a conventional write circuit for a magnetic memory device. In FIG. 3, which is a configuration diagram showing the circuit, 1 is a read/write head, 2 is a write current drive circuit, 3 is a @buying circuit, 4 is a head selection circuit, 5 is a write input signal switch, 6 is HE/RID selection input signal terminal, 7
is the midpoint terminal circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts. Figure 1 Book 5 1 included input chi (to No. 6, Rad selection input signal terminal Figure 2

Claims (1)

【特許請求の範囲】[Claims] ヘッド選択入力信号を受けて読み出し/書き込みヘッド
系を選択するためのヘッド選択回路と、このヘッド選択
回路からの出力を受けたときには入力される書き込み入
力信号を増幅して出力する所要数の前置書き込み回路と
、直列に接続された所要数の読み出し/書き込みヘッド
と、その出力端子がそれぞれ前記各読み出し/書き込み
ヘッド間に接続され、その入力端子には前記出力端子が
接続された両端の前記読み出し/書き込みヘッドに対応
する前記前置書き込み回路からの出力が接続された所要
数の書き込み電流駆動回路とを備えたことを特徴とする
磁気記憶装置用書き込み回路。
A head selection circuit for selecting a read/write head system upon receiving a head selection input signal, and a required number of prefixes for amplifying and outputting an input write input signal when receiving an output from this head selection circuit. a write circuit, a required number of read/write heads connected in series, an output terminal of which is connected between each of the read/write heads, and an input terminal of each of the read/write heads at both ends to which the output terminal is connected; A write circuit for a magnetic storage device, comprising: a required number of write current drive circuits to which outputs from the pre-write circuit corresponding to the write head are connected.
JP25105485A 1985-11-09 1985-11-09 Writing circuit for magnetic storage device Pending JPS62112203A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25105485A JPS62112203A (en) 1985-11-09 1985-11-09 Writing circuit for magnetic storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25105485A JPS62112203A (en) 1985-11-09 1985-11-09 Writing circuit for magnetic storage device

Publications (1)

Publication Number Publication Date
JPS62112203A true JPS62112203A (en) 1987-05-23

Family

ID=17216930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25105485A Pending JPS62112203A (en) 1985-11-09 1985-11-09 Writing circuit for magnetic storage device

Country Status (1)

Country Link
JP (1) JPS62112203A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5584012A (en) * 1978-12-18 1980-06-24 Ibm Driving amplifier for magnetic transducer
JPS59101016A (en) * 1982-12-01 1984-06-11 Sony Corp Magnetic recording circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5584012A (en) * 1978-12-18 1980-06-24 Ibm Driving amplifier for magnetic transducer
JPS59101016A (en) * 1982-12-01 1984-06-11 Sony Corp Magnetic recording circuit

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