JPS62109112A - Sequence circuit for power supply - Google Patents

Abstract

PURPOSE:To deliver the output in the prescribed sequence, i.e., the 2nd and then the 1st voltage sources regardless of the application sequence of a power supply, by securing such a mechanism where the 1st switching circuit is actuated only when the 2nd switching circuit is active at the time of application of the power supply. CONSTITUTION:Transistors (TR) 18-20 are all kept off despite the application of the 1st voltage source +Vin of the positive polarity. Thus the 1st voltage source +Vout has no output. Then the output voltage -Vout of an output terminal 6 has a rise in the negative direction with application of the 2nd voltage source -Vin. Thus the TR 20 is turned on and then both TRs 19 and 18 are also turned on. Then an input voltage 1 is connected to an output terminal 4 and the voltage +Vout has a rise in the positive polarity direction with delay time tau1 after the switching delays of the TRs 20-18 and the delays of each resistance and the stray capacity are integrated. As a result, the output is delivered at all times in the order of the 2nd and then the 1st voltage sources regardless of the application sequence of both voltage sources.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a power supply sequence circuit used to turn on or off two types of power supplies in a predetermined order, such as a drive power supply for field effect transistors. It is.

(Prior Art) Generally, when driving a field effect transistor, first and second voltage sources are connected to the drain electrode and the gate electrode, respectively, and when the power is turned on, the second voltage source is first turned on and the gate electrode is turned on. A bias voltage is applied to the electrode, and then the second voltage source is turned on to apply a bias voltage to the drain electrode. Further, when power is cut off, first the second voltage source is turned off to remove the bias voltage applied to the drain electrode, and then the first voltage source is turned off to remove the bias voltage applied to the gate electrode. If the order of application and removal is incorrect, the field effect transistor may be damaged.

In order to prevent such damage, measures are taken to construct a sequential circuit using relays, etc. so that voltage is applied or removed in a predetermined order when the power is turned on or off. There were problems in that the circuit became large and noise was generated when the relay was turned on and off.

In addition, the third section describes a conventional power supply sequence circuit that uses transistors to prevent damage to field effect transistors.
This will be explained using figures. In the same figure.

Input terminals 1 and 2 are the positive input terminals and ground terminals of the first voltage source -Vin, each showing positive polarity, and input terminals 3 and 2 are the ground terminals of the second voltage source -Vi, each showing negative polarity.
The negative input terminal and ground terminal of n, and the input terminal 2 above.
is a common ground terminal of the first and second voltage sources. Output terminals 4 and 5 are the positive output terminal and ground terminal of the first voltage source +Vout, respectively; output terminals 6 and 5 are the negative output terminal and ground terminal of the second voltage source -Vout, respectively; and a common ground terminal of the second voltage source.

The first transistor 7 and the second transistor 8 form a sequence circuit, and the collector and emitter of the first transistor 7 are connected to the input terminal 1 of the first voltage source, respectively.
and the output terminal 4, the base of which is connected to the input terminal 1 through the resistor 9, the collector and emitter of the second transistor 8 connected to the base and ground terminal of the first transistor 7, respectively, and the base connected to the input terminal 1 through the resistor 9; 3 connected in series between input terminal 1 and input terminal 3 of the second voltage source
The resistors 10, 11 and 12 are connected between the resistors 11 and 12 through a resistor 13. In this way, from the first and second voltage sources the first
A bias voltage is applied to the bases of second transistors 7 and 8.

The input terminal 2, which is a ground terminal, and the output terminal 5 are directly connected, and the input terminal 3, which is a second voltage source, and the output terminal 6 are connected through a diode 14, respectively.

Furthermore, the input terminal 2 and input terminal 3 described above are connected via a diode 15.

The operation of the power supply sequence circuit configured in this way will be explained.

First, +V is applied from the first voltage source connected to input terminals 1 and 2.
When in is turned on, input terminal 3 is connected to resistor 1 because the second voltage source connected to it is not turned on and is at ground level.
A bias voltage is applied to the base of the second transistor 8 through transistors 0, 11, and 13, and the second transistor 8 is turned on. When the second transistor 8 is turned on, the potential of the base of the first transistor 7 becomes low, and the first transistor 7 is turned off.

Then -V is applied from the second voltage source connected to input terminals 3 and 2.
When in is turned on, the diode 14 becomes conductive and -Vout is immediately outputted to the output terminal 6 of the second voltage source, and at the same time, the second transistor 8, which is in an on state, Since the potential at the connection point decreases, the base potential decreases, so it is reversed and turns off. When the second transistor 8 turns off, the first transistor 7, which had been off, connects the +V of the input terminal 1 to its base.
Since in is applied through the resistor 9, it is inverted by 1 and turns on. When the first transistor 7 is turned on, the output terminal 4 of the first voltage source is connected to the input terminal 1, and +Vout is output. A sequence is formed through the above process.

(Problem to be Solved by the Invention) However, in the above configuration, when +Via is applied from the first voltage source, the resistors 10, 11 and 13
When a positive potential is applied to the base of the second transistor 8 through the resistor 9 to turn it on, a positive potential is simultaneously applied to the penis of the first transistor 7 through the resistor 9 to turn it on. When the Ranjistaf is turned on earlier than the second transistor 8 and +Vin is applied from the first voltage source, +V is immediately output from its output terminal 4.
A malfunction occurred in which out output was output, and output terminals 4 and 5
There was a problem that the field effect transistor connected to 6 and 6 was damaged.

The present invention solves the above problems, and provides a power supply sequence circuit that has a simple circuit configuration and can maintain the output order of the first and second voltage sources without malfunction.

(Means for Solving the Problems) In order to solve the above problems, the present invention provides a first load with low impedance driven by a first voltage source of positive polarity, and a second voltage source of negative polarity. In a power supply sequence circuit connected to a second load with high impedance driven by a power source, a first switching circuit connected between the first load and the first voltage source, and a control terminal of the first switching circuit. a second switching circuit connected between the current circuit and the second voltage source; a rectifier circuit connected between the second voltage source and the second load; and control of the seventh node side of this current circuit and the second switching circuit. A capacitor is connected between the terminal and the second switching circuit, and the second switching circuit is controlled by the second voltage source.

(Function) With the above configuration, when the power is turned on, the first switching circuit operates only after the second switching circuit is activated, so the output voltage is the same as the second voltage regardless of the order in which the power is turned on. source - output according to a predetermined order of the first voltage source.

Also, when the power is cut off, the load impedance of the first voltage source is much smaller than the load impedance of the second voltage source, and the second switching circuit is controlled by the second voltage source, and the base of the second switching circuit is controlled by the capacitor. Since the fall in potential is delayed, the power is cut off in a predetermined order of the first voltage source and the second voltage source, regardless of the order in which the power is cut off.

(Embodiment) An embodiment of the present invention will be described with reference to FIG. 1, which is a circuit configuration diagram, and FIG. 2, which is an operational waveform diagram.

In FIG. 1, input terminals 1 and 2 are a positive input terminal of a first voltage source +Vin of positive polarity and a ground terminal, respectively;
Further, the input terminal 3 is a negative input terminal of a second voltage source -Vin having a negative polarity, and the input terminal 2 is a ground terminal common to the first and second voltage sources.

Output terminals 4 and 5 are the positive output terminal and ground terminal of the first voltage source +Vout, respectively, and output terminal 6 is the second
The negative output terminal of the voltage source -Vout, and the output terminal 5 above.
is a common ground terminal of the first and second voltage sources.

Load resistors 16 and 17 are connected between output terminal 4 and output terminal 5, and between output terminal 5 and output terminal 6, respectively.
are the equivalent train-to-source resistance and equivalent gate-to-source resistance of the field effect transistor, respectively, and correspond to the first load and second load described above. The resistance values of these resistances are several ohms for the load resistance 16, and several hundred ohms or more for the load resistance 17.

The first switching circuit connected between the output terminals 1 and 4 of the first voltage source is two transistors 18 and 19, and the second switching circuit controlling the first switching circuit is one transistor 20. Each is composed of The collector and emitter of the transistor 18 of the first switching circuit are connected to the input terminal 1 and the output terminal 4, respectively, and its base is connected to the collector of the transistor 19, whose emitter is connected to the input terminal 1.
connected to. Furthermore, the base of transistor 19 is connected to input terminal 1 through resistor 21 . The emitter and collector of the transistor 20 of the second switching circuit are connected to the input terminal 3 and the base of the transistor 19 of the first switching circuit, respectively, and the base is grounded through the resistor 22.

A diode 23 is connected as a rectifier circuit between the output terminals 3 and 6 of the second voltage source, and the output terminal 6 is grounded through a capacitor 24 .

Note that the capacitor 24 is connected in parallel with the load resistor 17 described above between the output terminal 6 and the ground terminal 5.

The operation of the power supply sequence circuit having such a configuration will be explained with reference to FIGS. 1 and 2.

FIG. 2(a) shows the first voltage source 1Vi input to input terminal 1.
The input state of n, FIG. 2(b) shows the input state of the second voltage source −Vin input to the input terminal 3, and FIG. 2(c) shows the output state of the first voltage source +Vout of the output terminal 4, the second Figure (d) is an operating waveform diagram showing the output state of the second voltage source -Vout at the output terminal P6, where the vertical axis shows the positive electrode' pressure at the top, the negative electrode' pressure at the bottom, and the horizontal axis shows the time. That's it.

In FIG. 1, even if the first voltage source +Vin of the positive polarity shown in FIG. 2(a) is applied to the input terminals 1 and 2, the transistors 18 and 19 of the first switching circuit and the transistor 2° remain off, so the first voltage source +Vout shown in FIG. 2(c) does not output.

Next, when the second voltage source -Vin is applied to input terminals 3 and 2, as shown in FIG. , the output voltage of output terminal 6 -Vout rises in the negative direction.
Two. Returning to FIG. 1, the transistor 2° of the second switching circuit, which was in the off state, is inverted to the on state, and then the base potential of the transistor 19 of the first switching circuit is brought to a low potential, so that the transistor 2° of the second switching circuit, which was in the off state, is turned on. When the transistor 18 which was in the off state is turned on and then turned on, the input terminal 1 and the output terminal 4 become connected, and as shown in FIG. 2(c), the output terminal 4 is turned on. The output 'voltage +Vout integrates the switching delays of each transistor 20, 19, and 18, and the delay caused by each resistor and stray capacitance, and rises in the positive direction with a delay time of 7□ behind the rise in Fig. 2 (a). , first and second
Regardless of the order in which the voltage sources are turned on, there will always be a delay, and the
The voltage source is outputted in the order of the first voltage source and the first voltage source.

Next, the case of cutting off the voltage source will be explained.

As shown in FIGS. 2(a) and 2(b), when the second@pressure source -Vin is shut off with the positive voltage and negative voltage being input to input terminals 1 and 3, respectively, as shown in FIG.
As shown in b), the negative electrode voltage that has continued to rise in the negative direction falls to the zero line. Returning to FIG. 1, the transistor 20 of the second switching circuit that was in the on state is reversed and becomes an off state, and accordingly, the base potential of the transistor 19 of the first switching circuit becomes a high potential, and the transistor 20 of the first switching circuit becomes an on state. Since the transistor 18 is inverted from the on state to the off state, the transistor 18 is also inverted from the on state to the off state.
The connection between input terminal 1 and output terminal 4 is cut off as shown in Fig. 2 (c).
), the positive voltage that has continued to rise in the positive direction of the output terminal 4 falls to the zero line. At this time,
Due to the switching time and stray capacitance of each transistor 20.19 and 18, the output of the output terminal 4 has a slight delay time τ2 from when the second voltage source is cut off, as shown in FIG. However, since the resistance value of the load resistor 16, which is the equivalent drain-saw input resistance of the field effect transistor connected between the output terminal 4 and the output terminal 5, is several Ω, the slope angle is Therefore, the delay time τ2 becomes an extremely small value.

On the other hand, the resistance value of the load resistor 17, which is the equivalent gate-to-sole input resistance of the field effect transistor connected between the output terminal 6 and the output terminal 5, is several hundred ohms or more. This is much larger than the equivalent train-to-saw input load resistance 16 described above, and since the capacitor 24 is inserted, the load resistance shown in FIG.
As shown in d), the slope angle of the fall of the positive voltage at the output terminal 6 is small, and the delay time τ3 is longer than the seven delay times at the output terminal 4 described above. Therefore, when the voltage source is cut off,
The first voltage source +Vout at the output terminal 4 falls first, and then the second voltage source -Vout at the output terminal 6 falls, thereby preventing damage to the field effect transistor.

Note that the diode 23 functions to prevent negative charges from being discharged through the transistor 20 when the second voltage source is cut off.

(Effects of the Invention) As explained above, according to the present invention, with an extremely simple circuit configuration, regardless of the order in which the voltage sources are turned on or off,
A power supply sequence circuit that supplies or cuts off voltage according to a predetermined order and that does not cause malfunction can be obtained.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram of a power supply sequence circuit according to the present invention, FIG. 2 is a diagram of operating waveforms of each of its components and output terminals, and FIG. 3 is a circuit diagram of a conventional power supply sequence circuit. 1.2.3...Input terminal, 4,5.6...
Output terminal, 7, 8.18, 19.20... Transistor, 9.10, 11, 12, 13, 21.22
...Resistance, 14.15.23 ...Diode, 1
6.17...Load resistance, 24...Capacitor. Figure 1 1, 2.3--Input force j 4.5.6--Pay force 5 16j7-- Force @ main stream 18.19.20~. -Trango, Zub 21.22--
Isshugo 23---G/lλ-de 24---Condenser Figure 2

Claims (1)

[Claims] In a power supply sequence circuit connected to a first load with low impedance driven by a first voltage source exhibiting positive polarity and a second load having high impedance driven by a second voltage source exhibiting negative polarity, a first switching circuit connected between a first load and a first voltage source; a second switching circuit connected between a control terminal of the first switching circuit and a second voltage source; a rectifier circuit connected between the load and the second voltage source, and a capacitor connected between the anode side of the rectifier circuit and the control terminal side of the second switching circuit, A power supply sequence circuit characterized in that the switching circuit is controlled by a second voltage source.