JPS62108603A - Fm detection circuit - Google Patents

Abstract

PURPOSE:To apply phase locked type FM detection while using a voltage controlled oscillator by branching an input signal into two, inputting the one to a phase comparator via a transmission circuit whose transmission characteristic is varied, inputting the other directly and using a signal filtering the output of the phase comparator so as to change the characteristic of said transmission circuit. CONSTITUTION:The input is inputted to a phase comparator 103a via the 1st signal transmission circuit 101 from a terminal A and inputted to the phase comparator 103a via the 2nd signal transmission circuit 102. The capacitance of varactor elements D1, D2 is varied by a signal voltage inputted to a resistor R3 in the 2nd signal transmission circuit 102 to vary the frequency transmission characteristic. The output of the phase comparator 103a is inputted to a low- pass filter 104a and the output is fed back negatively to the 2nd signal transmis sion circuit 102 to compress the phase difference of the two inputs.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a phase-locked FM detection circuit that detects an FM (frequency modulation) signal.

〔overview〕

The present invention provides a phase-locked FM detection circuit including a phase comparator and a low-pass filter connected to the phase comparator, in which a first signal transmission device connected to an input terminal and providing a first input of the phase comparator is provided. circuit, and a second signal transfer circuit connected to the input terminal and providing a second input of the phase comparator, and at least one of the first and second signal transfer circuits is connected to the low-pass filter. By configuring a feedback circuit so that the frequency transfer characteristics of the wave generator are changed by the output signal of the wave generator and the phases of the first input and the second input are synchronized, the conventionally required voltage controlled oscillator is no longer required. This eliminates the accompanying spurious noise and temperature drift, and stabilizes circuit operation.

[Conventional technology]

The basic configuration of a conventional FM detection circuit is as shown in FIG.
It is composed of a phase-locked circuit consisting of. Note 10
5 is an amplifier. This conventional FM detection circuit has an FM modulation input (frequency or phase) applied to input terminal A.
A phase synchronization method is used in which the voltage controlled oscillator 106 is controlled by the control voltage of the output of the low pass filter 104 so that the signal frequency (or phase) of the voltage controlled oscillator 106 follows the signal frequency (or phase) of the low pass filter 106. In this method, an FM detection output is obtained from the output terminal P for the FM human input signal by extracting the control voltage of 104.

[Problem that the invention seeks to solve]

The conventional dual phase synchronized FM detection circuit has the following drawbacks.

First, since it includes a voltage-controlled oscillator, spurious components including high-order harmonics generated in the voltage-controlled oscillator often jump into other circuit blocks and adversely affect them. Secondly, there is a temperature-related drift in the oscillation frequency of the voltage controlled oscillator, and in the worst case, malfunctions such as loss of lock may occur.

SUMMARY OF THE INVENTION An object of the present invention is to provide an FM detection circuit that does not require a voltage controlled oscillator and thus eliminates the above drawbacks.

[Means for solving problems]

The present invention provides a phase-locked FM detection circuit including a phase comparator and a low-pass filter connected to the output thereof. a second signal transmission circuit connected to an input terminal and providing a second input of the phase comparator, at least one of the first and second signal transmission circuits; is characterized in that the frequency transfer characteristic is changed by the output signal of the -1 second low-pass filter.

[Effect]

The principle of operation of the present invention will be explained below with reference to a circuit diagram showing the basic configuration of an embodiment of the present invention shown in FIG. 1, and FIGS. 2 and 3.
This will be explained with reference to the characteristic diagram shown in FIG.

In FIG. 1, the FM detection circuit of the present invention has an input terminal A
A phase comparator 103a that has a first input via the first signal transfer circuit 101 and a second input via the second signal transfer circuit 102; and a low-pass filter 104a.
and an amplifier 105a that amplifies the output of the low-pass filter 104a. In FIG. 1, the second signal transmission circuit 102 includes resistors R1 and R3, an inductor L1, a capacitor C1, variable capacitance elements DI and D2, and a coupling capacitor C1. Furthermore, the low-pass filter 104a includes a resistor R2 and a capacitor C2.

Moreover, B and C are the first and second input terminals of the phase comparator 103a, respectively. Sl is the second signal transmission circuit 10
This is a control terminal for controlling the frequency transfer characteristics of No. 2. Terminal P
is an output terminal of a detection output obtained by amplifying the output of the control terminal S1 with the amplifier 105a.

Next, the principle of operation of the present invention will be explained using FIG. 1st
The variable capacitance elements D1 and D2 in the figure have the same shape, and the voltage applied between the electrodes is .

As shown in FIG. 4, there is a characteristic that the capacitance value changes by inverse proportional approximation. Now, when the voltage is V a +, if the series capacitance value of variable capacitance elements D1 and D2 is CX, the impedance of the parallel resonant circuit composed of variable capacitance elements D1 and D2 and inductor LL is as follows (given by equation 11). It will be done.

In equation (1), Ll is the inductance of the inductor LI, and ω is the angular frequency. - Figure 2 illustrates the above formula (1), where the frequency r0 is the parallel resonance frequency,
The voltage phase of the second input terminal C with respect to the first input terminal B is a leading phase when the frequency is smaller than f''c, and a lagging phase when it is larger than fc.The frequency fc is given by the following equation (2). .

Now, let us assume that the voltage Vd of the terminal S1 remains in the above state, that is, that the second signal transfer circuit 102 is given by the transfer function determined by the impedance shown in equation (1), and that the input terminal 8 〇The intraperson frequency f is as follows (3
) shall be given by the formula.

f=fc+Δf (Hz)−(31 In this case, from FIG. 2, the voltage phase θ of the second input terminal C is expressed by the following equation (4).

θ−−Δθ (degrees)−(4) just 4
), the voltage phases of the input terminal A and the first input terminal B are the same and are treated as the voltage phase reference.

On the other hand, the phase comparator 103a has first and second input terminals B.
, C is detected and further low-pass filter 104 is applied.
The voltage V of the control terminal S1 is rewritten by the following equation (5).

V 6 = D a + + K a ・Δθ
(V)-(5) In equation (5), Kd is the phase comparator 10
3a means the conversion efficiency. The voltage of control terminal S1 is (5
) By converting as shown in the formula, the capacitance value C can be obtained from Fig. 4.
8 is decreased by ΔC as shown in the following equation (6).

CX=CX-Δθ (F)-(6) Therefore, the parallel resonance frequency fc shown by equation (2) is as follows (
7) changes to fc' given by the equation, as shown in FIG.

In this way, when the human input frequency to the input terminal becomes thicker by Δf (f, +Δf), the phase comparator 103a
and a low-pass filter] 04a and a second signal transmission circuit 1.
Negative feedback is configured such that the frequency transfer characteristics of 02 are controlled and the voltage phase difference between the first input terminal B and the second input terminal C is compressed. The same thing can be said when the input frequency of input terminal A becomes smaller by Δf.

A further logical analysis of the above results in the following. Now, the transfer function of the low-pass filter 104a is f (s)
Then, equation (5) can be rewritten as equation (8) below.

Va = Ka ・F(s) ・(Q1-00)
- In the equation (8 and especially 8), the offset voltage vd1 included in the equation (5) is considered to be zero, and Δθ is calculated as shown in the following (9).
Suppose that it is given by Eq.

80=θ1−θ. -(9
1(9), θ, and θ. mean the voltage phase of the first input terminal B and the second input terminal C, respectively.

Further, θG in equation (9) with respect to the control voltage Vd of terminal P is expressed by the following equation (00).

θ. -KX, Va -00) (I
In the formula O), means the phase-to-voltage conversion efficiency of the second signal transmission circuit 102 in FIG. From equations (9) and 001, the ratio of the voltage phase of the second input terminal C to the voltage phase of the first input terminal B, that is, the ratio of the voltage phase of the second input terminal C, that is, the F of the phase synchronization type of the present invention
The transfer function H(s) in the M detection circuit is expressed by the following Q9 formula.

10'D From formula 011, it is clear that when the value of KX, 6, and F(S) is increased, θ. and Q1 are almost equal, and θ. and Q
1 can be made smaller.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing the basic configuration of an embodiment of the present invention. Since the general structure and operation of this embodiment have already been explained in the above [Operation] section, specific circuit examples of the main parts of FIG. 1 and their operations will be explained here.

FIG. 5 is a circuit diagram showing an example of the phase comparator 103a of FIG. 1. In FIG. 5, terminals T1, T2 and T3, T4
correspond to the first input terminal or the second input terminal of the phase comparator 103a, respectively. Further, the terminal T5 is an output terminal of the phase comparator 1038, and the terminal T6 is a power supply terminal. Further, Q1 to Q12 are transistors, Q7 to QlO are of the PN type, and the others are of the NPN type. 101 indicates a constant current source. In FIG. 5, the first input input to terminals TI and T2 and the second input input to terminals T3 and T4 are composed of a differential amplifier of transistors Q1 and Q2, and transistors Q3 to Q6. A multiplication circuit is formed by the double-balanced differential amplifier, so that the phase difference between the first and second human input signals is outputted from the terminal T5.

FIG. 6 is a circuit diagram showing an example of the low-pass filter 104a shown in FIG. 1. In FIG. 6, terminal T5 is the input terminal of the low-pass filter 104a, and Sl is the control terminal serving as its output. Resistors R11, R12 and capacitor C1l
, CI2 constitute a lag lead filter.

FIG. 7 is a circuit diagram showing an example of the second signal transmission circuit 102 shown in FIG. 1 constructed from a semiconductor integrated circuit. In FIG. 7, ・NPN type transistor Q31~
A double balanced differential amplifier of Q34, a differential amplifier of NPN transistors Q41 and Q42, and resistors R31 to R37.
and capacitors C31, C32 and ceramic resonator F,3
1, and constant current sources 131 and +32. VC
C is a power supply terminal, and ■ is a reference voltage application terminal. Ceramic resonator F31 connected between terminal S4 and ground equivalently forms an LC parallel resonant circuit, and therefore resistor R3
The frequency characteristics of the voltage phase of the terminal S4 due to the ceramic resonator F31 and the ceramic resonator F31 are the same as those shown in FIG. 2 above. Here, it is assumed that the resistance values of the resistor R32 and the resistor R35 are equal, and that the capacitance values of the capacitor C31 and the capacitor C32 are also equal, and that these values are given by the following equation 02.

Therefore, when the input signal i1# is applied to the input terminal A and the frequency is fc, the transistors Q31 to Q34
With the voltage gains of the double-balanced differential amplifiers being equal to each other, the signal voltage transmitted to the double-balanced differential amplifier is equal to the ceramic resonant signal F
The signal voltage at terminal S4 of 31 has the same phase and half the amplitude, and is given by the vector sum of the voltage vector across resistor R35 and the voltage vector across capacitor C32, and the absolute value of each vector is given by formula 02. They match as shown in . Here, if the frequency at input terminal A changes to a reference input voltage signal that is higher than fc by Δf, the voltage phase at terminal $4 will be at a level of Δθ with respect to the voltage phase to the input terminal, as is clear from Figure 2. A phase difference occurs. This Shingetsu voltage is applied to transistors Q31~Q.
When the voltage gains of the 34 double-balanced differential amplifiers are transmitted in a state where they are equal to each other, the terminals T3 and T4, which are the outputs of the second signal transmission circuit 102, have a difference of Δθ with respect to the reference input voltage applied to the input terminal A. The signal with a phase difference of . By controlling terminals S2 and S3 with control voltages, the voltage gain of the double-balanced differential amplifier of transistors Q31 to Q34 is controlled, and the second signal transmission circuit 10
Controls the phase characteristics of 2. .

In the above embodiments/examples, the first signal transmission circuit simply has an input terminal connected to the first input terminal of the phase comparator circuit, and the second signal transmission circuit is a feedback circuit.
This may also be the opposite configuration. Alternatively, a feedback signal having an opposite phase to the output signal of the low-pass filter applied to the second signal transfer circuit may be provided to the first signal transfer circuit so that both circuits constitute respective feedback circuits.

〔Effect of the invention〕

As explained above, the present invention does not use a conventional voltage-controlled oscillator, but simply provides the first and second signal transfer circuits and controls the transfer function of one or both of them. I in L? M detection can be achieved. Therefore, since the present invention does not require a voltage controlled oscillator, it has the effect of eliminating various drawbacks caused by the conventional voltage controlled oscillator and providing an FM detector that operates stably.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the basic configuration of an embodiment of the present invention. 2 and 3 are voltage phase frequency characteristic diagrams of the second signal transmission circuit of FIG. 1. FIG. 4 is a characteristic diagram of the variable capacitance element shown in FIG. FIG. 5 is a circuit diagram showing an example of the phase comparator shown in FIG. 1. FIG. 6 is a circuit diagram showing an example of the low-pass filter of FIG. 1. FIG. 7 is a signal circuit diagram showing an example of the second signal transmission circuit of FIG. 1. FIG. 8 is a block diagram showing a conventional example. 101...First signal transfer circuit, 102...Second signal transfer circuit, 103.103a...Phase comparator, 1
04.104a...Low pass filter, 105.1.05a
...Amplifier, A...Input terminal, B...First input terminal, C...Second input terminal, CI, C2, C11,
CI2, C31, C32...Capacitor, DI, D2
...variable capacitance element, F31...ceramic resonator,
101.131, I32... Constant current source, ■, 1...
Inductor, P...output terminal, R1-R3, R11,
R12, R31-R37...Resistor, Sl...Control terminal, T1-T6, S2, S4...Terminal, ■...Reference voltage application terminal, VCC...Power supply terminal, Q1-Q12,
Q31 to Q34, Q41, Q42...transistors.

Claims (1)

[Claims] (1) In a phase-locked FM detection circuit that includes a phase comparator and a low-pass filter connected to its output, a first signal that is connected to the input terminal and provides the first input of the phase comparator. a transmission circuit; and a second signal transmission circuit connected to the input terminal and providing a second input of the phase comparator, and at least one of the first and second signal transmission circuits is connected to the low An FM detection circuit characterized in that the frequency transfer characteristic thereof is changed by the output signal of a band pass filter.