JPS62108527A - Dry etching apparatus - Google Patents

Dry etching apparatus

Info

Publication number
JPS62108527A
JPS62108527A JP24818385A JP24818385A JPS62108527A JP S62108527 A JPS62108527 A JP S62108527A JP 24818385 A JP24818385 A JP 24818385A JP 24818385 A JP24818385 A JP 24818385A JP S62108527 A JPS62108527 A JP S62108527A
Authority
JP
Japan
Prior art keywords
substrate
cover
impedance
ion current
density
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24818385A
Other languages
Japanese (ja)
Other versions
JPH07107899B2 (en
Inventor
Masahata Shibagaki
真果 柴垣
Katsuzo Ukai
鵜飼 勝三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Anelva Corp
Original Assignee
Anelva Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anelva Corp filed Critical Anelva Corp
Priority to JP60248183A priority Critical patent/JPH07107899B2/en
Publication of JPS62108527A publication Critical patent/JPS62108527A/en
Publication of JPH07107899B2 publication Critical patent/JPH07107899B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To uniformize a current density by increasing the impedance of a cover as compared with that of a substrate, and disposing the surfaces of the cover and the substrate substantially in the same plane. CONSTITUTION:A chamber 1 is evacuated by an evacuating system to a predetermined pressure, and CF4 gas is fed, for example, from a gas feeding system. A high frequency voltage is applied by a high frequency power source 11 between an anode 9 and a cathode 2 to generate a plasma 13 to dry etch a substrate 5. In this case, since an ion current by the plasma 13 is concentrated at the substrate 5 having small impedance, the ion current density flowing to the substrate 5 becomes high, and the etching rate becomes high. Since the surface 5a of the substrate 5 and the surface 23a of the cover 23 are disposed in the same plane, an electric field density becomes uniform in a boundary between the surfaces 5a and 23a, and does not become irregular on the surface of the substrate 5. Thus, ion current of uniform density flows on the surface 5a of the substrate 5 to uniformly etch the substrate 5.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、プラズマによってドライエツチングを行な
うドライエツチング装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a dry etching apparatus that performs dry etching using plasma.

(従来の技術) 従来、ドライエツチング装置は、第4図に示すように、
チャンバ1内に設置されたカソード2(必要なときは金
属ステージ3を介して)に基板5を載置している。そし
て基板5からはみ出たカソード2の面を発生したプラズ
マによってエツチングされないようにカバー7で覆って
いる。9は7ノードで、チャンバlとともに接地されて
いる。
(Prior Art) Conventionally, a dry etching apparatus, as shown in FIG.
A substrate 5 is placed on a cathode 2 installed in a chamber 1 (via a metal stage 3 when necessary). The surface of the cathode 2 protruding from the substrate 5 is covered with a cover 7 to prevent it from being etched by the generated plasma. 9 is the 7th node and is grounded together with chamber l.

ドライエツチングを行なう場合は、図示しない排気系に
よってチャンバl内を排気して所定圧力にし、図示しな
いガス導入系から例えばCF4ガスを導入する。そして
カソード番アノード間に高周波電源11によって高周波
電圧を印加してプラズマI3を発生させ、このプラズマ
13によって基板5をドライエツチングしている。
When performing dry etching, the inside of the chamber I is evacuated to a predetermined pressure by an exhaust system (not shown), and CF4 gas, for example, is introduced from a gas introduction system (not shown). A high frequency voltage is applied between the cathode and the anode by a high frequency power supply 11 to generate plasma I3, and the substrate 5 is dry etched by this plasma 13.

(本発明が解決しようとする問題点) しかしながら、カバー7はテフロンや石英(比誘電率は
ほぼ2.1と3.8)で構成され、通常はその厚さdが
3mm程度なので、カバー7のその高周波(例えば13
.5 MHz)におけるインピーダンスZcが、厚さ約
1mmのシリコン(比誘電率はほぼ11で通常は極めて
高抵抗)からなる基板5(通常は厚さ約2mmのアルミ
やステンレス等からなる金属ステージ3上に置かれる)
のインピーダンスZvとほぼ等しいか、それ以下になる
ので、相当多くのイオン電流がカバー7にも流れてしま
い、このため基板に流れるイオン電流密度が低下してし
まうという問題があった。またカバー7の面7aと基板
5の面5aとの境に段差があるので、その境近辺で電界
密度が不均一になる。このため基板5に流れるイオン電
流の密度が基板の端部で不均一になり、均一なエツチン
グを行うことができない等の問題があった。
(Problems to be Solved by the Present Invention) However, the cover 7 is made of Teflon or quartz (relative dielectric constants are approximately 2.1 and 3.8), and the thickness d is usually about 3 mm. of that high frequency (for example 13
.. The impedance Zc at 5 MHz) is on a substrate 5 made of silicon (with a relative dielectric constant of about 11 and usually extremely high resistance) with a thickness of about 1 mm (usually on a metal stage 3 made of aluminum, stainless steel, etc. with a thickness of about 2 mm). )
Since the impedance is approximately equal to or less than the impedance Zv, a considerable amount of ion current also flows to the cover 7, which causes a problem in that the density of the ion current flowing to the substrate decreases. Further, since there is a step at the boundary between the surface 7a of the cover 7 and the surface 5a of the substrate 5, the electric field density becomes non-uniform near the boundary. For this reason, the density of the ion current flowing through the substrate 5 becomes non-uniform at the edges of the substrate, resulting in problems such as the inability to perform uniform etching.

この発明は上記電流密度の低下等の問題を解消すること
のできるドライエツチング装置を提供することを目的と
する。
An object of the present invention is to provide a dry etching apparatus that can solve the problems such as the decrease in current density.

(問題を解決するための手段) この発明は、上記の目的を達成するために、カバーのイ
ンピーダンスを基板のインピーダンスよりも大きくする
とともに、カバーのアノード側の表面と、基板のアノー
ド側の表面とがほぼ同一平面になるように構成したもの
である。
(Means for Solving the Problem) In order to achieve the above object, the present invention makes the impedance of the cover larger than the impedance of the substrate, and the surface of the cover on the anode side and the surface of the substrate on the anode side. are arranged so that they are almost on the same plane.

(本発明の作用) カバーのインピーダンスを基板のインピーダンスよりも
大きくしたので、カバーよりも基板に多くのイオン電流
が流れる。またカバーの表面と。
(Action of the present invention) Since the impedance of the cover is made larger than the impedance of the substrate, more ionic current flows through the substrate than through the cover. Also with the surface of the cover.

基板の表面とが同一平面上にあるようにしたので、それ
らの面の境で電界密度が均一になる。
Since the surface of the substrate is made to be on the same plane, the electric field density becomes uniform at the boundary between these surfaces.

(本発明の効果) カバーよりも基板に多くのイオン電流が流れるので、基
板に流れるイオン電流の密度が高くなり、これによりエ
ッチレートが高くなる。また前記表面の境で電界密度が
均一になるので、その境近辺における基板上の電界密度
が均一になる。したがって、基板に流れるイオン電流密
度が均一になり、基板が均一にエツチングされる。
(Effects of the Present Invention) Since more ion current flows through the substrate than through the cover, the density of the ion current flowing through the substrate increases, thereby increasing the etch rate. Further, since the electric field density becomes uniform at the boundary of the surface, the electric field density on the substrate near the boundary becomes uniform. Therefore, the density of the ion current flowing through the substrate becomes uniform, and the substrate is etched uniformly.

(発明の実施例) 第1図において、5はカソードに金属ステージ21を介
して載置された金属ステージ21と同径の約ll1m1
厚の基板、23は基板5からはみ出たカソードの面を保
護するテフロン製のカバーで、このカバーのインピーダ
ンスZwが前記基板5のインピーダンスZcの2倍より
大きくなるように、その厚さdがほぼ5mm以上に厚く
されている。第2図にカバー23の厚さdとZw/Zc
との関係を示した。
(Embodiment of the invention) In FIG. 1, 5 is approximately 11 m1 having the same diameter as the metal stage 21 placed on the cathode via the metal stage 21.
The thick substrate 23 is a Teflon cover that protects the surface of the cathode protruding from the substrate 5, and its thickness d is approximately so that the impedance Zw of this cover is greater than twice the impedance Zc of the substrate 5. It is made thicker than 5mm. Fig. 2 shows the thickness d and Zw/Zc of the cover 23.
showed the relationship between

一方、カバー23の7ノード9側の表面23aと、基板
5の7ノード9側の表面5aとが同一平面になるように
金属ステージ21の厚さが選定されている。そして従来
と同様に金属ステージ21はアルミやステンレス等から
構成され、そのインピーダンスはほぼゼロとみなすこと
ができる。25はコンデンサ、27はチャンバlをカッ
イード2から電気的に絶縁する絶縁体である。なお第4
図に示したものと同一なものには同一符号を付したので
、その説明は省略する。
On the other hand, the thickness of the metal stage 21 is selected so that the surface 23a of the cover 23 on the 7th node 9 side and the surface 5a of the substrate 5 on the 7th node 9 side are on the same plane. As in the past, the metal stage 21 is made of aluminum, stainless steel, etc., and its impedance can be considered to be almost zero. 25 is a capacitor, and 27 is an insulator that electrically insulates the chamber 1 from the cupid 2. Furthermore, the fourth
Components that are the same as those shown in the figures are given the same reference numerals, and therefore their descriptions will be omitted.

いま、図示しない排気系によってチャンバ1内を排気し
て所定圧力にし、図示しないガス導入系から例えばCF
4ガスを導入する。そして7ノ一ド9φカツイード2間
に高周波電源11によって高周波電圧を印加してプラズ
マ13を発生させる。このプラズマ13によって基板5
がドライエツチングされる。
Now, the inside of the chamber 1 is evacuated to a predetermined pressure by an exhaust system (not shown), and then, for example, CF is injected from a gas introduction system (not shown).
4 Introduce gas. Then, a high frequency voltage is applied between the seven nodes and the 9φ cutweed 2 by a high frequency power source 11 to generate plasma 13. This plasma 13 causes the substrate 5 to
is dry etched.

この際、プラズマ13によるイオン電流が、インピーダ
ンスの小さい基板5に集中するので、基板5に流れるイ
オン電流密度が高くなり、エツチングレートが高くなる
。第3図にはエッチレートとZw/Zcとの関係を示し
た。エツチングレートが、Z舅/Zc〜2のあたりから
立上り、急激に高い値を示すようになることがよくわか
る。
At this time, since the ion current generated by the plasma 13 is concentrated on the substrate 5 having a low impedance, the density of the ion current flowing through the substrate 5 becomes high, and the etching rate becomes high. FIG. 3 shows the relationship between etch rate and Zw/Zc. It is clearly seen that the etching rate rises from around Z/Zc~2 and suddenly shows a high value.

また基板5の表面5aと、カバー23の表面23aとが
同一平面上にあるので、表面5a、23aの境界で電界
密度が一様になるので、基板5の表面上では電界密度が
不均一にならない、したがって基板5の面5aには密度
の均一なイオン電流が流れるので、基板5は均一にエツ
チングされる。
Furthermore, since the surface 5a of the substrate 5 and the surface 23a of the cover 23 are on the same plane, the electric field density becomes uniform at the boundary between the surfaces 5a and 23a, so that the electric field density is non-uniform on the surface of the substrate 5. Therefore, since an ion current with uniform density flows through the surface 5a of the substrate 5, the substrate 5 is etched uniformly.

なお上記実施例では、カバー23の厚さを厚くしてイン
ピーダンスZcを大きくしているが、厚さを厚くせずに
、誘電率の高い材質を選定することによってもインピー
ダンスを大きくすることができ、さらに金属ステージ2
1を省略して、その部分の電極表面を盛り上げてもよい
In the above embodiment, the impedance Zc is increased by increasing the thickness of the cover 23, but the impedance can also be increased by selecting a material with a high dielectric constant without increasing the thickness. , and further metal stage 2
1 may be omitted and the electrode surface of that portion may be raised.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は実施例の断面図、第2図はカバーの厚さとZ 
v / Z cとの関係を示したグラフ、第3図はエッ
チレートとZw/Zcとの関係を示したグラフ、第4図
は従来のエツチング装置の断面図である。 1・・・チャンバ      2・・・カソード5・・
・基板        5a・・・面9・・・アノード
      21・・・金属ステージ23・・・カバー
       23a・・・面代理人 弁理士    
嶋 宣之 糎 1 区 六 2 口 tL(−一 慴 3 口 ”%・
Figure 1 is a sectional view of the embodiment, Figure 2 is the thickness and Z of the cover.
FIG. 3 is a graph showing the relationship between etch rate and Zw/Zc, and FIG. 4 is a cross-sectional view of a conventional etching apparatus. 1...Chamber 2...Cathode 5...
・Substrate 5a...Surface 9...Anode 21...Metal stage 23...Cover 23a...Surface Agent Patent attorney
Nobuyuki Shima 1 Ku6 2 KutL(-Ichie 3 Kut”%・

Claims (1)

【特許請求の範囲】[Claims] チャンバ内に設置されたカソードに基板を載置し、基板
からはみ出るカソードの面をカバーで覆い、このカソー
ドに高周波電圧を印加してプラズマを発生させ、このプ
ラズマによって前記基板をドライエッチングする装置で
あって、前記カバーのインピーダンスを基板のインピー
ダンスよりも大きくするとともに、カバーの表面と、基
板の表面とがほぼ同一平面になるようにしたことを特徴
とするドライエッチング装置
A device that places a substrate on a cathode installed in a chamber, covers the surface of the cathode that protrudes from the substrate with a cover, applies a high-frequency voltage to the cathode to generate plasma, and uses this plasma to dry-etch the substrate. A dry etching apparatus characterized in that the impedance of the cover is made larger than the impedance of the substrate, and the surface of the cover and the surface of the substrate are substantially on the same plane.
JP60248183A 1985-11-06 1985-11-06 Dry etching equipment Expired - Lifetime JPH07107899B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60248183A JPH07107899B2 (en) 1985-11-06 1985-11-06 Dry etching equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60248183A JPH07107899B2 (en) 1985-11-06 1985-11-06 Dry etching equipment

Publications (2)

Publication Number Publication Date
JPS62108527A true JPS62108527A (en) 1987-05-19
JPH07107899B2 JPH07107899B2 (en) 1995-11-15

Family

ID=17174433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60248183A Expired - Lifetime JPH07107899B2 (en) 1985-11-06 1985-11-06 Dry etching equipment

Country Status (1)

Country Link
JP (1) JPH07107899B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03259516A (en) * 1990-03-08 1991-11-19 Nec Corp Dry etching method
US6878249B2 (en) 2000-06-16 2005-04-12 Anelva Corporation High frequency sputtering device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59132623A (en) * 1983-01-20 1984-07-30 Ulvac Corp Electrode for dry etching
JPS59139628A (en) * 1983-01-31 1984-08-10 Hitachi Ltd Dry etching device
JPS59201419A (en) * 1983-04-28 1984-11-15 Hamamatsu Photonics Kk Processing object locating device for plasma etching apparatus
JPS60100429A (en) * 1983-11-05 1985-06-04 Mitsubishi Electric Corp Dry etching method
JPS60201632A (en) * 1984-03-27 1985-10-12 Anelva Corp Dry etching apparatus
JPS61190132U (en) * 1985-05-20 1986-11-27

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59132623A (en) * 1983-01-20 1984-07-30 Ulvac Corp Electrode for dry etching
JPS59139628A (en) * 1983-01-31 1984-08-10 Hitachi Ltd Dry etching device
JPS59201419A (en) * 1983-04-28 1984-11-15 Hamamatsu Photonics Kk Processing object locating device for plasma etching apparatus
JPS60100429A (en) * 1983-11-05 1985-06-04 Mitsubishi Electric Corp Dry etching method
JPS60201632A (en) * 1984-03-27 1985-10-12 Anelva Corp Dry etching apparatus
JPS61190132U (en) * 1985-05-20 1986-11-27

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03259516A (en) * 1990-03-08 1991-11-19 Nec Corp Dry etching method
US6878249B2 (en) 2000-06-16 2005-04-12 Anelva Corporation High frequency sputtering device

Also Published As

Publication number Publication date
JPH07107899B2 (en) 1995-11-15

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