JPS6210714Y2 - - Google Patents

Description

[Detailed description of the invention] This invention is an electronic clock with an alarm that has a daylight saving time function, in which the alarm sound is made different from the normal one for a certain period of time from the time when the time changes from normal time to daylight saving time or from daylight saving time to normal time. It is something.

In recent years, many countries have implemented so-called daylight saving time, in which the clocks are moved forward by one hour for a certain period during the summer. However, when Daylight Saving Time came into effect, users would suddenly have to start their daily activities one hour earlier, which could disrupt the rhythm of their daily lives. In particular, since the time to go to bed at night and the time to wake up in the morning are shifted by one hour, the user may find it very difficult to wake up in the morning at first, and it is conceivable that a normal alarm sound will cause the user to fall asleep.
As described above, it was predicted that if daylight saving time were to be implemented, the effectiveness of current alarm functions would be reduced immediately after the switch to daylight saving time or normal time, but before the rhythm of life had returned to normal.

The present invention was developed in view of the conventional problems, and its purpose is to provide an electronic clock with an alarm that can provide a more effective alarm function when switching to daylight saving time or normal time. be.

In order to achieve the above object, the present invention is characterized in that the alarm sound is made different from normal for a certain period of time from the time when the time displayed on the clock changes to daylight saving time or normal time.

Examples will be described below based on the drawings.

The figure is a circuit diagram showing an embodiment of the present invention. In this embodiment, the volume of the alarm sound is increased more than usual for a certain period of time after switching to daylight saving time or normal time. Further, the volume of this alarm sound is configured to decrease as the number of times the alarm sound increases.

2 is a reference signal generator, 4 is a frequency dividing circuit, and 6
is a minute counter that counts minutes. 8 is an hour counter for counting time, and is composed of an up-down counter. The time signals from the minute counter 6 and hour counter 8 are applied to the display section 12 via the decoder/driver 10, and the time is displayed on the display section 12. In addition, the time signals from the minute counter 6 and hour counter 8 are sent to the coincidence circuit 14.
It is compared with the time signal stored in the alarm storage circuit 16. If the time signals from the minute counter 6 and hour counter 8 match the time signals from the alarm storage circuit 16, the output signal of the matching circuit 14 changes from a low potential (hereinafter referred to as L) to a high potential (hereinafter referred to as H). It is configured to be

18 is a switch that changes from normal time to daylight saving time when closed, and changes from daylight saving time to normal time when opened, and 20 is an alarm set/non-set switch. 22 is switch 1
8 is a discrimination circuit that discriminates whether the switch 18 is opened or closed, and 24 constitutes an operation detection circuit that detects that the switch 18 has been operated. Further, 25 is an operation detection circuit 2
26 is a pulse generation circuit that generates a single pulse for adding or subtracting the count contents of the hour counter 8 by 1 in response to the operation detection signal from 4; This is a counting direction switching circuit.
27 is a release circuit that clears and releases the discrimination content of the discrimination circuit 22 in response to the falling edge of a single pulse from the pulse generation circuit 25;
9 is a first alarm notification signal generation circuit that generates a first alarm notification signal of a constant volume in response to the coincidence signal from the coincidence circuit 14; This is a second alarm notification signal generation circuit that outputs a second alarm notification signal. Furthermore, 33 is a counter circuit that counts the number of times a coincidence signal has been generated;
Reference numeral 8 denotes an alarm sound generation circuit that generates an alarm sound upon receiving either the first alarm notification signal of the first alarm signal generation circuit 29 or the second alarm notification signal generation circuit 31. 35 supplies the coincidence signal from the coincidence circuit 14 to the second alarm notification signal generation circuit 29 in response to the fall of the single pulse from the pulse generation circuit 25, and responds to the carry signal from the counter circuit 33. and outputs the matching signal to the first alarm notification signal generation circuit 31.
This is an alarm switching circuit that switches so that the power is supplied to the alarm.

In this embodiment, the second alarm notification signal generation circuit 31 is configured to receive the count output from the counter circuit 33 so that the volume of the alarm gradually decreases each time an alarm occurs.
Therefore, the second alarm notification signal generation circuit 31
The alarm notification signal is applied to the alarm sound generation circuit 28 via the on-resistance of any one of the MOS transistors; are increasing in the order of

The operation of this circuit will be explained below.

Normally, when the displayed time reaches the time stored in the alarm time storage circuit 16, the signal of the coincidence circuit 14 goes high.
becomes. In this state, the flip-flop 38
Since the output signal is H, if the alarm set/unset switch 20 is closed, the AND gate 40 is opened and the alarm sound frequency signal 42 from the frequency divider circuit 4 is applied to the gate of the MOS transistor 36. . Every time this alarm sound frequency signal 42 becomes H, the MOS transistor 36
is turned on, current flows to the base of the driving transistor 44 via the on-resistance of the MOS transistor 36, and an alarm sound is generated from the speaker 46.

When the switch 18 is closed, an H signal is applied to the one shot circuit 48, and a positive single pulse is generated from the one shot circuit 48.
At the same time as this pulse rises, the output Q of the flip-flop 50 as a discrimination signal becomes H, and the H signal is applied to the input D of the flip-flop 54 via the OR gate 52. Thereafter, when the constant period signal 56 from the frequency divider circuit 4 applied to the clock input φ of the flip-flop 54 rises, the output Q of the flip-flop 54 becomes H, and the one-shot circuit 58 generates a positive single pulse. The single pulse is applied via an OR gate 60 to the clock input φ of the hour counter 8, and the displayed time is advanced by one hour to switch to daylight saving time. The single pulse from one-shot circuit 58 is also inverted by inverter 62 and applied to the clock input .phi. of flip-flop 64. When the single pulse from the one-shot circuit 58 falls, the flip-flop 6
The output Q of the flip-flop 4 becomes H, and the H signal is applied to the reset input R of the flip-flop 50 via the OR gate 66. As a result, flip-flop 5
The output Q of 0 becomes L, the output becomes H, and the output signal of the AND gate 68 also becomes H. The flip-flop 64 is reset by this signal, and the output Q becomes L.
Then, the reset of the flip-flop 50 is released again.

On the other hand, the single pulse from the one-shot circuit 58 is also applied to the clock input φ of the flip-flop 38, making its output Q signal H and its output signal L. The signal at the output Q is applied to the AND gate 70 to open the AND gate 70, and the signal at the output is applied to the AND gate 40 to close the AND gate 40. When the set time arrives, the output signal of the matching circuit 14 becomes H, the output signal of the AND gate 70 also becomes H, and the AND gate 72,
74 and 76. Also and gate 70
A positive single pulse is generated from the one-shot circuit 78 by the H signal of the shift register 80.
is applied to the clock input φ of . As a result, the signal of the output _Q2 of the shift register 80 becomes H, and the AND gate 72 opens and the alarm sound frequency signal 4
2 is input to the gate of the MOS transistor 30. The MOS transistor 30 is turned on every time the alarm sound frequency signal becomes H, and current flows through the on-resistance of the MOS transistor 30.
Since the on-resistance of the MOS transistor 30 is smaller than that of the MOS transistor 36, a loud alarm sound is generated from the speaker 46.

After this, when the set time arrives again, the output _Q3 of the shift register 80 becomes H due to the single pulse generated from the one shot circuit 78, and the AND gate 74 opens, and the alarm sound frequency signal is activated.
It is applied to the gate of the MOS transistor 32.

Since the on-resistance of the MOS transistor 32 is larger than that of the MOS transistor 30, the volume of the alarm sound is lower than that of the previous time. Then, when the set time comes again, the output _Q4 of the shift register 80 becomes H, the alarm sound frequency signal 42 is applied to the base of the MOS transistor 34, and current flows through the on-resistance of the MOS transistor 34. Since the on-resistance of the MOS transistor 34 is larger than the on-resistance of the MOS transistors 30 and 32, the volume of the generated alarm sound is even smaller than the previous one. Furthermore, when the set time arrives after this, the output of the shift register 80
_Q5 goes high and resets the shift register 80, and immediately the signal at output _Q1 goes high. Also output
The flip-flop 38 is also reset by the H signal of _Q5 , and the output Q signal becomes L and the output signal becomes H. As a result, the AND gate 70 is closed,
AND gate 40 opens and returns to normal state,
The alarm sound frequency signal 42 is an AND gate 40
is applied to the gate of the MOS transistor 36 via the MOS transistor 36. As a result, the current is MOS transistor 36
flows through the on-resistance of The on-resistance of the MOS transistor 36 is the same as that of the MOS transistors 30 and 3.
Since the on-resistance is large compared to the on-resistance of No. 2 and 34, the volume of the generated alarm sound is further reduced and returns to the normal volume. The alarm sound that occurs after this,
Since the current flows to the alarm sound generation circuit 28 via the MOS transistor 34, the volume does not change.

If the switch 18 is opened here, the inverter 82
An H signal is input to the one shot circuit 84 via the one shot circuit 84. This causes the one shot circuit 84 to generate a positive single pulse. With the rise of the single pulse, the output Q of the flip-flop 86 as a discrimination signal becomes H, and the H signal is inputted to one input of the NAND gate 88 via the OR gate 52. Since the H signal of the output Q of the flip-flop 86 is directly applied to the other input of the NAND gate 88, the output signal of the NAND gate 88 changes from H to L, so that the hour counter 8 becomes a down counter.

The high signal of OR gate 52 is also applied to input D of flip-flop 54, which causes a single positive pulse to be generated from one-shot circuit 58 as previously described. The single pulse is applied via an OR gate 60 to the clock input φ of the hour counter 8, delaying the displayed time by one hour. As a result, the time returns from summer time to normal time.
The single pulse of the one-shot circuit 58 is also applied via an inverter 62 to the clock input φ of the flip-flop 64.
The signal of the output Q of is set to H. This H signal is applied to the reset input R of flip-flop 86 via OR gate 90 to reset flip-flop 88. As a result, flip-flop 86,
The signals at the outputs of the flip-flops 50 and 50 both go high, and the output signal of the AND gate 68 goes high, resetting the flip-flop 64 and making the signal at the output Q of the flip-flop 64 go low.

Meanwhile, the single pulse from the one-shot circuit 58 is also applied to the clock input φ of the flip-flop 38. As a result, the output Q signal of flip-flop 38 becomes H, and the output signal becomes L. When the set time arrives, current flows to the alarm sound generation circuit 28 via the on-resistance of the MOS transistor 30, as described above. Thereafter, each time the set time arrives, the current flowing through the alarm sound generation circuit 28 first flows through the MOS transistor 30.
Next, through the on-resistance of MOS transistor 3
2, then the on-resistance of the MOS transistor 34, and then the on-resistance of the MOS transistor 36, and so on, and the on-resistance gradually decreases. Therefore, each time the alarm sounds, the volume of the alarm sound gradually decreases until it returns to the normal volume, and the volume does not change after that.

As described above, according to this embodiment, by increasing the volume of the alarm sound for a certain period of time after the display time is switched to daylight saving time or normal time, the effectiveness of the alarm function is reduced due to a one-hour shift in time. can be prevented. Furthermore, by increasing the alarm sound, the user can be informed that the time has changed to daylight saving time or normal time. Furthermore, in this embodiment, the volume of the alarm sound gradually decreases as the number of alarm sounds increases after switching to daylight saving time or normal time, so the user cannot hear the volume decrease to the normal volume. However, the alarm sound does not seem unusually low.

In this embodiment, the volume of the alarm sound is increased when switching to daylight saving time or normal time, but it is also possible to change the notification form of the alarm sound, such as changing from an electronic sound to a ringing sound.

As described above, according to the present invention, by making the alarm sound different from normal for a certain period of time from the time of switching to daylight saving time or normal time, the effectiveness of the alarm function is reduced due to a one-hour shift in time. can be prevented.

[Brief explanation of the drawing]

The figure is a circuit diagram showing an embodiment of the present invention. 8... Hour counter, 18... Switch, 22...
...Discrimination circuit, 24...Switching circuit, 26...Alarm sound switching circuit, 28...Alarm sound generation circuit.

Claims (1)

[Utility Model Claims] A reference signal generator that generates a reference signal, a frequency divider circuit that divides the reference signal, a minute counter that counts minutes of the time using an output signal from the frequency divider circuit, an hour counter that can be added or subtracted and counts hours of the time using a carry signal from the minute counter, a decoder driver that converts the count signals from the hour counter and the minute counter into a display signal, a display unit that displays hours and minutes using the display signal from the decoder driver, an alarm memory circuit that stores an alarm time, a coincidence circuit that outputs a coincidence signal when the alarm time signal from the alarm memory circuit matches the time signals from the hour counter and the minute counter, and a first alarm alarm signal creation circuit that outputs an alarm alarm signal of a constant volume in response to the coincidence signal from the coincidence circuit.
an operation detection circuit which outputs an operation detection signal in response to generation of the ON operation signal or the OFF operation signal from the discrimination circuit; a pulse generating circuit which generates a single pulse in response to the operation detection signal from the operation detection circuit; an OR gate which supplies the single pulse from the pulse generating circuit to the hour counter; a count direction switching circuit which normally sets the hour counter as an increment counter and switches the hour counter to a decrement counter while an OFF operation signal is being output from the discrimination circuit; and a release circuit which outputs a release signal to release the memory of the discrimination circuit in response to loss of the single pulse from the pulse generating circuit. an alarm switching circuit which supplies the coincidence signal from said coincidence circuit to said first alarm notification signal creation circuit in response to a carry signal from said counter circuit, and which supplies the coincidence signal from said coincidence circuit to said second alarm notification signal creation circuit in response to a single pulse from said pulse generating circuit.