JPS62106350A - Apparatus for inspecting flaw of pattern - Google Patents

Abstract

PURPOSE:To shorten the detection time of the flaw of a pattern based on image data, by alternately repeating operation reading image data already stored from one memory at every specific inspection area during a time when the image data is written in the other memory. CONSTITUTION:An image data selecting circuit 14 receives the order from a microcomputer system 16 to connect the data bus from an A/D converter circuit 7 to an image memory 12 and, at the same time, connects the data bus from an image memory to the side of CRT display 21. A reference data selecting circuit 8 similarily connects the data bus from a frame memory 4 to a reference memory 9 and the data bus from a reference memory 10 is connected to the data bus in the side of the display 21. Further, the memory 12 and the memory 9 receives the control order from a memory control circuit 15 to take writing operation and, contrarily, the memory 13 and the memory 10 take reading operation. As mentioned above, by alternately repeating the reading and writing of two memories 12, 13 at every specific inspection area, a pattern flaw detecting time is shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a pattern defect inspection apparatus that inspects defects in minute geometric patterns of semiconductor integrated circuits and the like by image processing.

(Background of the Invention) Conventionally, devices for inspecting defects in minute geometric patterns in semiconductor integrated circuits, etc., have been capable of producing two-dimensional images of the inspection area without requiring relative movement to the object to be inspected, unlike image pickup tubes. An apparatus for obtaining a two-dimensional image by scanning by relative movement of an R element such as a CCD line sensor and an object to be inspected is known.

By the way, in a pattern defect inspection apparatus that uses an image sensor such as a CCD line sensor that requires relative movement with the object to be inspected, the object to be inspected is mounted on a mechanical stage or the like that can freely move in the X-Y directions. It is common to use a method of mechanically moving the object to be inspected relative to a fixedly placed image sensor. Image data is obtained by scanning the image sensor in a line while moving the mechanical stage in a direction perpendicular to the pixel arrangement direction of the image sensor. In addition, the image data obtained from the image sensor is
Because the speed changes due to the feed of the mechanical stage, it is not possible to directly send image data to a CRT, etc. for display, or to transfer it to another image processing device in synchronization with a constant frequency transfer or lock. Data transfer is performed by writing the image data from the child once into the image memory, and reading it out in synchronization with the processing timing of the destination device after writing of a certain amount of image data is completed. In addition, at the same time as the image data obtained from the image sensor is written, design data (reference data) that serves as a comparison standard for pattern defect inspection is also written to the reference data memory in synchronization with the writing of image data by the image sensor.
After writing, the data is read out in accordance with the timing of the transfer destination.

(Problem to be Solved by the Invention) However, in a device that once writes image data obtained from an ill element, etc. to a memory, then reads it out and transfers the data for image processing, the data to the memory During writing, data cannot be transferred to a CRT, etc., and the CR
Data cannot be written to the memory while data is being read for data transfer to the T, etc., and normally multiple predetermined inspection areas of the inspected object are continuously processed, which reduces the processing time for pattern defect inspection. The problem was that it was too long.

(Object of the Invention) The present invention has been made in view of the above-mentioned conventional problems. Image data of a certain inspection area obtained from an image sensor etc. is once written to a memory, and after writing, it is transferred to the timing of the transfer destination. Another object of the present invention is to provide a pattern defect inspection device that can perform high-speed data processing by eliminating dead time when reading data from a memory and transferring data.

(Summary of the invention) In order to achieve this object, the present invention prepares two memories each for storing image data detected by an image sensor and two memories for storing reference image data serving as an inspection standard. While writing image data into one memory, the operation of reading already stored image data from the other memory is alternately and continuously repeated for each specific inspection area.

(Example) FIG. 1 is a block diagram showing one embodiment of the present invention.

In the figure, DB indicates a data bus, and AB indicates an address bus.

First, to explain the configuration, 1 is a CCD line sensor as an image sensor, which has a structure in which a plurality of light-receiving pixels are arranged in a straight line, as shown in FIG. An image signal of a certain inspection area is outputted to a buffer amplifier 6 by relative movement with an object to be inspected such as a semiconductor integrated circuit, which is digitally converted by an A/D conversion circuit 7 and outputted as image data from a data bus.

The CCD line sensor 1 operates in response to drive pulses from a CCD drive pulse generation circuit 2, and the output of the CCD drive pulse generation circuit 2 is supplied to a frame memory drive circuit 3. The CCD line sensor 1 stores reference data as a comparison standard for defect inspection, which is stored in advance in the frame memory 4 as design data.
The reading is performed in synchronization with the image detection by the.

A pair of image memories 12.1 serve as means for storing image data of a certain inspection area obtained from the CCD line sensor 1.
Similarly, a pair of reference memories 9 and 10 are provided as means for storing reference image data from the frame memory 4 as a comparison reference for defect inspection.

A data bus from the A/D conversion circuit 7 that converts and outputs image data from the CCD line sensor 1 is connected to image memories 12 and 13 via an image data selection circuit 14, and the image data selection circuit 14 is connected to a memory control circuit. The image memory 12 or 13 is in the writing state due to the control output from 15.
Supply image data to.

On the other hand, the reference image data from the frame memory 4 is connected via the reference data selection circuit 8 to the reference memories 9 and 10 by a data bus, and the reference data selection circuit 8 is put into a write control state by the control output of the memory control circuit 15. The reference data from the frame memory 3 is selectively supplied to the necessary reference memory 9 or 10.

Further, an address selection circuit 11 is provided for addressing the image memories 12, 13 and reference memories 9, 10. A write address for the address selection circuit 11 is generated by the write address generation circuit 5. The write address generation circuit 5 generates a write address in synchronization with the drive pulse from the COD drive pulse generation circuit 2.

On the other hand, read addresses are received from a read address generation circuit 17 which generates read addresses in synchronization with the timing of an image processing device such as a CRT, which will be explained later, and these address data are selectively switched.

Here, the image memory 12.13 by the memory control circuit 15
, the writing/reading control of the reference memories 9 and 10 is as follows.

(a) While image memory 12 and reference memory 9 are being written, image memory 13 and reference memory 10 are being read.

(b) While the image memory 13 and the reference memory 10 are writing, the image memory 12 and the reference memo 9 are being read.

Such an image memory 12.13 and a reference memory 9,1
In conjunction with the writing and reading control of 0, the image data selection circuit 14 and the reference data selection circuit 8 each supply image data and reference data to the writing side memory during memory writing, while supplying the image data and the reference data to the reading side memory. A path line connection is created for data transfer to an image processing device such as a CRT, which will be explained later.

Such an image memory 12.13 and a reference memory 9.1
The overall operation of writing/reading control of image data and reference data with respect to 0 is performed by the microcomputer system 16.
Executed after program control by .

Further, the microcomputer system 16 provides a control signal to a stage control section 23 in order to control the movement of a mechanical stage 24 on which the object to be inspected is movable in the X-Y directions.

The read data from the memory obtained through the image data selection circuit 14 and the reference data selection circuit 8 is used for displaying an image on a CRT display 21 shown as an example.
It is supplied to an image synthesis circuit 19 that synthesizes the image data detected by the CD line sensor 1 and the reference data image from the frame memory 4, and after timing control by the CRT control circuit 18, it is sent to the CRT display via the video amplifier 20. The composite image is displayed at 21.

Further, an image data selection circuit 14 and a reference data selection circuit 8
The data read out from the memory via is also given to an appropriate image processing device 22, which performs pattern defect detection processing by comparing and determining the image data obtained from the CCD line sensor 1 and the reference data from the frame memory 4. Do this.

The CRT display 21 and the image processing device 22 operate under their own timing control, and the CRT display 21 has a timing pulse generated from the CRT control circuit 18 for display control. , timing pulses are supplied from the CRT control circuit 1B to the read address generation circuit 17. Therefore, the read address generation circuit 17 generates a read address at a timing synchronized with the control on the CRT display 21 side and selects the address selection circuit. 11, CR
Memory data is read and transferred in synchronization with the display processing of the T-display 21. The same applies to the image processing device 22, and the timing pulse from the image processing device 22 is supplied to the read address generation circuit 17, so that the read address is generated in synchronization with the timing pulse of the image processing device 22. There is.

Next, the operation of the embodiment shown in FIG. 1 will be explained by taking as an example a pattern defect inspection of an object to be inspected as shown in FIG.

Now, regarding the pattern formed on the object to be inspected 30 shown in FIG. 2, certain inspection areas A, B, C,
It is assumed that the sequential inspection process is executed for D.

Therefore, the object to be inspected 3 placed on the mechanical stage 24
The first inspection area A is moved to the fixedly arranged CCD line sensor 1 under movement control by the stage control unit 23 of 0,
For example, as shown in FIG.
An initial setting is performed in which the D line sensor 1 is placed facing each other. When the alignment of the mechanical stage 24 under the control of the microcomputer system 16 is thus completed and a completion signal is obtained, the microcomputer system 16 instructs the CCD line sensor 1 to start detecting image data. At the same time, the microcomputer system 3 and 1
6 also issues a command to move the mechanical stage at a constant speed.

Upon receiving the command from the microcomputer system 16, the image data selection circuit 14 first selects the A/D conversion circuit 7.
The data bus from the image memory 13 is connected to the image memory 12, and at the same time the data bus from the image memory 13 is connected to the CRT display 2.
Connect to side 1. Further, the reference data selection circuit 8 similarly connects the data bus from the frame memory 4 to the reference memory 9, and connects the data bus from the reference memory 10 to the CRT.
Connect to the data bus on the display 21 side. Further, in response to a control command from the memory control circuit 15, the image memory 1
2 and the reference memory 9 are in a write operation, and conversely, the image memory 13 and the reference memory 10 are in a read operation.

Under such memory write/read control conditions, CO
In response to the drive pulse from the D drive pulse generation circuit 4, the C
The CD line sensor 1 is used, for example, in the inspection area A shown in FIG.
The image data (q) is sent from the line P1 to the buffer amplifier 6.
The digitally converted image data is supplied to the image memory 12 in a write operation state via the image data selection circuit 14. At the same time COD
The drive pulses of the drive pulse generation circuit 2 are supplied to the frame memory drive circuit 3, and from the frame memory 4, reference data, which is design plan data corresponding to the inspection area A, is sent out in synchronization with the readout of the CCD line sensor 1. The data is supplied to a reference memory 9 via a data selection circuit 8.

On the other hand, address data is supplied from the write address generation circuit 5 to the address selection circuit 11 in synchronization with the drive pulse from the COD drive pulse generation circuit 2, and the address selection circuit 11 selects the write address from the image memory. ] 2 and the reference memory 9, image data and reference data are input to the image memory 12 and the reference memory 9 according to the address specification synchronized with the drive pulse of the CCD line sensor 1. will be carried out.

On the other hand, when writing data for the first time, data is not stored in the other image memory 13 and reference memory 10, so even if a read address synchronized with the timing pulse on the CRT display 21 side is received, data cannot be read out. There is no transfer.

Image data and reference data synchronized with the CCD line sensor are stored in the inspection area A as shown in FIG.
The scanning is continued until the scanning of the pitches P1 to Pn is completed.

Next, when the image detection of the inspection area A is completed, the mechanical stage 24 performs alignment with the next inspection area B8 CCD line sensor 1, and when the alignment is completed, the detection process of the next image data is started.

In processing this second inspection area B, the image memory 12 and the reference memory 9, which had been in the write state, are switched to the read operation, and conversely, the image memory 13 and the reference memory 10 are switched to the write operation. . Regarding the image memory 13 and reference memory 10 that have been switched to write operation,
As in the case of the inspection area A, writing of image data from the CCD line sensor 1 and writing of reference data from the frame memory 4 are performed in synchronization with the COD drive pulse.

On the other hand, for reading out the image memory 12 and the reference memory 9 that have already stored the image data and reference data of the inspection area A, the read address generation circuit 17 selects an address in synchronization with a timing pulse from the CRT control circuit 18, for example. Image memory 13 and reference memory 10 via circuit 11
designates the readout address of the CRT display 21, reads out the image data and reference data of the inspection area ViA that have already been stored in synchronization with the control timing of the CRT display 21,
After the image synthesis circuit 19 synthesizes the detected image data and the reference data, the reference pattern and the detected pattern are superimposed and displayed on the CRT display 21 via the video amplifier 20, and pattern defects are detected by comparison with the reference pattern. The presence or absence can be determined by visual inspection or the like.

Thereafter, data processing for pattern defect detection is performed for the remaining inspection areas C and D in the same manner.

FIG. 4 shows the image data output of the CCD line sensor 1 ((a) in the figure) and the memory write/read timing ((b) to (C) in the figure) in the operation process of the embodiment in FIG. It is a time chart showing an example.

First, the CCD line sensor 1 shown enlarged in FIG. 4(a)
The output of image data is determined by the scanning time of one line shown in Fig. 3, which is determined by the timing of the CCD drive pulse.
tp, but the time it takes for the line sensor to move relatively to the next line depends on the control accuracy of the mechanical stage 24, so it is not a constant time; for example, Δtt)
1 to Δtpn −1. Therefore, the writing time tw to the memory determined by the output time of 0 lines of image data by the CCD line sensor 1 is:
tw=Δtpxn + (Δtf)1+Δtp2+−・
・+Δtpn)...(1) It is given by:

The memory write operation according to the write time tw given by the above-mentioned equation (1) becomes the timing shown in the shaded areas in FIG. and writing to the reference memory 1Q are repeated alternately.

On the other hand, for reading, the writing time t shown in the shaded area
By setting the readout time tr longer than w, for example, a break in the image display on the CRT display 21 is prevented from occurring.

That is, as shown in FIG. 4, the writing time t shown in the shaded area
By increasing the read time tr with respect to w, the memory 12
, 9, the timing of starting reading of the other memories 13 and 10 is adjusted, and as a result,
Data read from memory can be seamlessly transferred and displayed on an image processing device such as an RT display.

(Effects of the Invention) As described above, according to the present invention, there are two memories each for storing image data detected by a one-dimensional dynamic element such as a line sensor and for storing reference image data serving as an inspection standard. Prepare one unit at a time, and while writing data into one image memory and reference memory, read the already stored image data from the other image memory and reference memory and transfer the data to the image processing device for defect detection. As a result, the detection of image data of multiple inspection areas and the data transfer by memory reading to the image processing device can be performed continuously without wasting time due to writing and reading. The processing time for pattern defect detection based on this method can be significantly reduced.

In addition, since the timing of reading from the memory can be matched to the timing of an image processing device such as a CRT, it is possible to eliminate periods in which no image is displayed on an image display such as a CRT display, and pattern defects based on the image display can be eliminated. It is possible to more easily determine the presence or absence of the image processing apparatus, and to increase the processing speed within the range permitted by the capabilities of the image processing apparatus.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an explanatory diagram showing an example of an inspection area of an object to be inspected, and FIG. 3 is an explanatory diagram showing the relationship between the CCD line sensor and the inspection area. figure,
FIG. 4 is a time chart showing the operation timing of image data write/read control according to the embodiment of FIG. 1. 1: CCD line sensor 2: COD drive pulse generation circuit 3: Frame memory drive circuit 4: Frame memory 5: Write address generation circuit 6: Buffer amplifier 7: A/D conversion circuit 8: Reference data selection circuit 9.10 : Reference memory 11 Near address selection circuit 12.13: Image memory 14: Image data selection circuit 15: Memory control circuit 16 Two microcomputer system 17: Read address generation circuit 18: CRT control circuit 19: Image synthesis circuit 20: Video amplifier 21: CRT display 22: Image processing device 23: Stage control unit 24: Mechanical stage 30: Object to be inspected

Claims (1)

[Scope of Claims] In a pattern defect inspection device that inspects defects in fine geometric patterns formed on an object to be inspected, inspection image data obtained by detecting an inspection area of the object to be inspected with an image sensor is provided. a pair of image memories for storing, a pair of reference memories for storing reference image data for inspection corresponding to the image data to be inspected, and writing the image data to be inspected into one of the image memories; write control means for writing reference image data for inspection corresponding to the image data to be inspected into one of the reference memories in synchronization with writing of image data; one image memory by the write control means; During writing to the reference memory, image data corresponding to another inspection area different from the inspection area currently being written, which is already stored in the other of the image memory and the reference image memory, is read and transferred to the image processing device. 1. A pattern defect inspection device comprising: a readout control means.