JPS6210619A - Active matrix panel - Google Patents

Abstract

PURPOSE:To improve the contrast by forming a MOS capacitor having the same structure as a gate insulating film of a TFT in an active matrix substrate to increase the apparent capacity value of a liquid crystal cell. CONSTITUTION:A gate 25 of a MOS capacitor 23 is connected to a thin film transistor TR 21 and a liquid crystal cell 22, and the substrate of the MOS capacitor 23 is connected to a line 24 of a certain potential. Since the electric charge holding capacitor is formed in parallel with the liquid crystal cell and in the same structure as the gate insulating film of the thin film TR, the capacity value per unit area of the electric charge holding capacitor is increased, and the area ratio of the electric charge holding capacitor to picture elements is low. If the structure where impurities are doped in the substrate of the MOS capacitor is adopted, the MOS capacitor can be formed with gate lines of picture elements adjacent to each other, and the aperture rate of picture elements is kept high. Thus, the deterioration of the display capacity like the degradation of contrast and cross-talk due to the reduction of holding time is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an active matrix panel constructed using thin film transistors (hereinafter abbreviated as TIFT).

[Summary of the invention]

The present invention provides an active matrix panel in which a liquid crystal is driven by a TIFT, in which a capacitor made of the liquid crystal is connected in parallel with an M having the same structure as the TIPT.
By providing an O'f3 capacitor, the liquid crystal capacitance is apparently increased and display performance is improved.〇 [Prior art] In an active matrix panel that uses TIFT as a switching element, conventionally, one pixel is As shown in FIG.
It consisted of an FT3 and a liquid crystal display A/4. Conventional active matrix panels use thin film transistors as constituent elements, for example, as described in the document "Commercialized LCD Pocket Color Television" (Nikkei Electronics, September 10, 1984 issue). ◎ However, when trying to make the pixel size smaller and realize a higher-definition display, the following problems become apparent.

[Problems and Objectives to be Solved by the Invention] In a conventional active matrix panel, if the dimensions of one pixel are a length of a by a width of 6. The on-resistance of TIFT is R, and the off-resistance is R.
,, the capacity of the liquid crystal cell is O.

Suppose it is true. Here, for the conventional panel mentioned above,
Attempt to reduce planar dimensions without changing cross-sectional dimensions. (In order to change the cross-sectional dimensions, it is necessary to rebuild the TIFT manufacturing process and take measures to deal with the reduction in contrast caused by liquid crystal paste tarpsion, which is extremely difficult.)
Assuming that the reduction ratio is 1, the pixel dimensions of the new active matrix panel will be 1 vertically and 1 horizontally. Also, TIF
The on-resistance and off-resistance of T are the same as RI+R2, respectively.
The capacity of the liquid crystal cell increases. That is, by reducing the active matrix panel planarly, G is reduced to R, O,
For this reason, while the time to write signals to the pixel becomes shorter, the time to hold the charge stored in the pixel is shortened to -, and the effective value of the voltage applied to the liquid crystal cell decreases. Active matrix panels suffer from display defects such as poor contrast and crosstalk.The present invention solves the display defects of active matrix panels that occur due to the miniaturization of pixel dimensions as described above. The purpose is to provide a high-definition active matrix panel with contrast.

[Means for solving problems]

In order to prevent the retention time from being shortened as mentioned above, a MOS capacitor with the same structure as the gate insulating film of TIFT is formed in the active matrix substrate to increase the apparent capacitance value of the liquid crystal cell. ] The capacitance of one pixel of the tip matrix panel of the MOS capacitor built into the TIFT substrate is r2o.

+0M. Therefore, the time constant when not selected is ” (&2
CO + OM ), which can prevent the retention time of the charge stored in the pixels from shortening. As a result, high definition of active matrix panels can be achieved without causing poor contrast, crosstalk, etc. You can.

〔Example〕

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 8 shows an overall view of an active matrix panel. In the same figure, 5, 6.7 are gate lines, 8.9.10
1 is a data line, 11, 12, 13° 14 are thin film transistors, and 15, 16, 17° 1a are liquid crystal cells. The operation of the active matrix panel is described in detail in the literature [Commercialized LCD Pocket Color TV J (Nikkei Electronics, September 10, 1984 issue). Figure 1 shows the active matrix panel of the present invention. This is a diagram showing the configuration of the panel. In the diagram, 19 is a gate line, 2
0 is a data line, 21 is a thin film transistor, 22 is a liquid crystal cell, 23 is a MOS capacitor having the same structure as the thin film transistor 21, and 56 is a counter electrode of the liquid crystal cell. A gate 25 of the MOS capacitor 23 is connected to the thin film transistor 21 and the liquid crystal cell 22, and a substrate of the MOS capacitor 23 is connected to a constant potential line 24.

An example of the cross-sectional structure of the active matrix panel of FIG. 1 is shown in FIG. 3. In FIG. 3, 26 is a transparent substrate;
7.28 is a first silicon thin film, 29.30 is a gate insulating film, 31.32 is a second silicon thin film, 33 is an interlayer insulating film, 34 is a transparent conductive film, 35 is a liquid crystal, and 36 is a counter electrode. . 27, 29, and 31 are a substrate, a gate insulating film, and a gate, respectively, of the thin film transistor 21, and 28, 30, and 32 are a substrate, a gate insulating film, respectively, of the MOS capacitor 23.

It is a gate.

FIG. 2 is a diagram showing another configuration of the active matrix panel of the present invention. In the figure, 37 is a gate line, 38 is a data line, 39 is a thin film transistor, and 4
0 is a liquid crystal cell, 41 is a MOS capacitor having the same structure as the thin film transistor 39, and 57 is a counter electrode of the liquid crystal cell. The substrate 42 of the MOS capacitor 41 is connected to the thin film transistor 39 and the liquid crystal cell 40, and the MO8
A gate 43 of the capacitor 41 is connected to a constant potential line 44.

An example of the cross-sectional structure of the active matrix panel in FIG. 2 is shown in FIG. 4. In FIG. 4, 45 is a transparent substrate;
6.47 is a first silicon thin film, 48.49 is a gate insulating film, 50.51 is a second silicon thin film, 52 is an interlayer insulating film, 53 is a transparent conductive film, 54 is a liquid crystal, and 55 is a counter electrode. @46.48.50 are the substrate, gate insulating film, and gate of the thin film transistor 39 in FIG. 2, respectively, and 47.49.51 are M in FIG. 2, respectively.
O8 capacitor 41 substrate, gate insulating film,
It is a gate.

5 and 6 are constant potential @24 in FIG. 1 and constant potential I! in FIG. 2. 44 is a diagram showing the configuration of 44.

5 and 6, for convenience, the MOS capacitor is shown in the first
Although the configuration is shown in the figure, it does not go against the gist of the present invention even if it is replaced with the configuration in Figure 2. Figure 5 is a diagram showing two pixels adjacent in the vertical direction, 58 .59.60
is a gate line, 61 is a data line, and 62.65 is a constant potential line. Constant potential lines 62 and 63 are MOS capacitors 64.6
5 is fixed at a potential that turns it on.

In FIG. 6, unlike FIG. 5, the constant potential line is replaced by an adjacent gate line. In this case, the MOS capacitor 69.70
is not always in the ON state, and the MOS capacitor is
Does not function to hold charge @To solve this problem, the substrate of the MOS capacitor 69.70 is selectively doped with P-type or N-type impurity ions.
In FIGS. 3 and 4, the substrates 28 and 47 of the MOS capacitor are doped with P-type or N-type impurities.

〔Effect of the invention〕

By configuring an active matrix panel using the present invention, it is possible to prevent deterioration of display performance such as a decrease in contrast and crosstalk due to a decrease in retention time that occurs when pixels are made smaller and denser. Become.

In the present invention, by forming a charge retention capacitor in parallel with a liquid crystal cell and having the same structure as the gate insulating film of a thin film transistor, the capacitance value per unit area of the charge retention capacitor can be increased. You can. Therefore, the area ratio of the charge retention capacitor in the pixel can be small.In addition, by providing a constant potential line to keep the charge retention MOS capacitor in an OK state, the charge retention capacitor There is no need for any special manufacturing process, and it can be manufactured using conventional processes.

On the other hand, if a structure in which the substrate of the MO8 capacitor is doped with impurities is adopted, although the manufacturing process increases by one step, the MOS capacitor can be formed using the gate line of an adjacent pixel, and the aperture ratio of the pixel can be maintained large.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an active matrix panel of the present invention. FIG. 2 is another block diagram of the present invention. Figures 3 and 4 are cross-sectional views of the active matrix panels of the present invention shown in Figures 1 and 2, respectively @ Figures 5 and 6 are the active matrix panels of the present invention FIG. 3 is a configuration diagram showing connections of MOS capacitors. FIG. 7 is a configuration diagram of a conventional pixel section. Figure 8 is an overall diagram of the active matrix panel.

Claims (4)

[Claims] (1) In an active matrix panel consisting of a plurality of data lines, a plurality of gate lines, a group of thin film transistors whose conduction/non-conduction is controlled by the gate lines, and a group of liquid crystal cells connected to the data lines via the group of thin film transistors, An active matrix panel characterized in that a MOS capacitor formed using an insulating film having the same structure as the gate insulating film of the thin film transistor is provided in parallel with the capacitor made of the liquid crystal cell. (2) The MOS capacitor has one electrode connected to a pixel electrode and the other electrode connected to a gate line of a vertically adjacent pixel or a line of constant potential. Active matrix panel as described. (3) The active matrix panel according to claim 1, wherein the substrate of the MOS capacitor is a silicon thin film that is not doped with impurities. (4) The active matrix panel according to claim 1, wherein the substrate of the MOS capacitor is a silicon thin film doped with P-type or N-type impurities.