JPH0450925A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH0450925A
JPH0450925A JP2326438A JP32643890A JPH0450925A JP H0450925 A JPH0450925 A JP H0450925A JP 2326438 A JP2326438 A JP 2326438A JP 32643890 A JP32643890 A JP 32643890A JP H0450925 A JPH0450925 A JP H0450925A
Authority
JP
Japan
Prior art keywords
thin film
signal line
liquid crystal
pixel electrode
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2326438A
Other languages
Japanese (ja)
Inventor
Yojiro Matsueda
洋二郎 松枝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2326438A priority Critical patent/JPH0450925A/en
Publication of JPH0450925A publication Critical patent/JPH0450925A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To increase the rate of opening and to obtain high image quality by connecting 1st and 2nd TFT's to the same image element electrode at one connecting part and 1st and 2nd TFT's to the same signal line at one connecting part. CONSTITUTION:The drain D11a of TFT 11a and the drain D11b of TFT 11b are connected to an image element electrode 11 at a connecting part 121. The source S11b of the TFT 11b and the source S22a of TFT 22a are connected to a signal line X2 at a connecting part 122. Since the number of such connecting parts can be reduced, the area of an opening 100 is increased and high image quality can be attained.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は液晶表示装置に係わり、特にアクティブマトリ
クス型の装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a liquid crystal display device, and particularly to an active matrix type device.

(従来の技術) 従来のアクティブマトリクス型の液晶表示装置として、
「日経エレクトロニクス1986年12月15日号、p
、193−210コに掲載されたものがあり、その概略
構成を第4図に示す。列方向に信号線Xi、X2.X3
.・・・が配線され、行方向に走査線Y1..Y2.Y
3.・・・が配線されている。
(Conventional technology) As a conventional active matrix type liquid crystal display device,
“Nikkei Electronics December 15, 1986 issue, p.
, 193-210, and its schematic structure is shown in Fig. 4. Signal lines Xi, X2 . X3
.. ... are wired, and scanning lines Y1 . . . are wired in the row direction. .. Y2. Y
3. ...is wired.

また画素電極11がマトリクス状に配置され、各信号線
Xと走査線Yとの交点には薄膜トランジスタ(以−ド、
TPTと称す)か配置されている。
Further, pixel electrodes 11 are arranged in a matrix, and thin film transistors (hereinafter referred to as
(referred to as TPT).

例えば、信号線X1と走査線Y1との交点には薄膜トラ
ンジスタ11a1信号線X2と走査線Y2との交点には
TPTI 1 bがそれぞれ配置され、一つの画素電極
11に対して二つのTFTI 1 a及び11bが設け
られている。このように、いずれか一方が正常に動作し
ない場合にも他方を用いて救済し得るように、冗長性を
持たせている。
For example, a thin film transistor 11a is arranged at the intersection of the signal line X1 and the scanning line Y1, a TPTI 1b is arranged at the intersection of the signal line X2 and the scanning line Y2, and two TFTI 1a and TFTI 1b are arranged for one pixel electrode 11. 11b is provided. In this way, redundancy is provided so that even if one of them does not operate normally, the other can be used for relief.

そして、TFTI 1 aはゲートG11aが走査線Y
1に、ソースS]、1aか信号線X1に接続され、ドレ
インD llaか画素電極11に接続されている。
Then, in TFTI 1a, the gate G11a is connected to the scanning line Y.
1, the source S] and 1a are connected to the signal line X1, and the drain Dlla is connected to the pixel electrode 11.

またTPTllbは、ゲートG flbが走査線Y2に
、ソースS llbか信号線X2に接続され、ドレイン
Dllbは同し画素電極11に接続されている。
Further, the gate Gflb of TPTllb is connected to the scanning line Y2, the source Sllb is connected to the signal line X2, and the drain Dllb is connected to the same pixel electrode 11.

これにより、走査線Y1又はY2に送られてきた選択パ
ルスにより選択されたTPTl 1a又は11bに、信
号線X1又はX2より映像信号か入力され、その出力か
画素電極11に印加される。
As a result, a video signal is input from the signal line X1 or X2 to the TPTl 1a or 11b selected by the selection pulse sent to the scanning line Y1 or Y2, and its output is applied to the pixel electrode 11.

(発明か解決しようとする課題) しかし、各々の画素電極毎に二つのTPTを配置したた
め、各T P Tのトレインと画素電極、さらにはソー
スと信号線Xとの接続部の増加を招いていた。第5図に
示されたように、例えば画素電極11はTFTllaの
ドレインDllaとコンタクトホール202において接
続されており、TFTl、1bのドレインDllbとコ
ンタクトホール201において接続されている。このよ
うにコンタクトホールの数が増えると、光か液晶を透過
し得る開孔部200の面積か減少し、画面が暗くなり画
質が低下するという問題があった。
(Problem to be solved by the invention) However, since two TPTs are arranged for each pixel electrode, the number of connections between the train of each TPT and the pixel electrode, as well as between the source and the signal line X increases. Ta. As shown in FIG. 5, for example, the pixel electrode 11 is connected to the drain Dlla of TFTlla through a contact hole 202, and is connected to the drain Dllb of TFTl, 1b through a contact hole 201. When the number of contact holes increases in this way, the area of the openings 200 that can transmit light or liquid crystal decreases, resulting in a problem that the screen becomes dark and image quality deteriorates.

本発明は上記事情に鑑みてなされたものであり、開孔率
を上げて高画質化を達成し得る液晶表示装置を提供する
ことを目的とする。
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a liquid crystal display device that can increase the aperture ratio and achieve high image quality.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明は、第1の絶縁基板上に画素電極かマトリクス上
に配置され、第1の走査線より走査され第1の信号線よ
り信号を入力される第1のTPTと、第2の走査線より
走査され第2の信号線より信号を入力される第2のTP
Tとが各々の画素電極に接続されており、第2の絶縁基
板上に対向して設けられた第2の絶縁基板表面には対向
電極が配置され、第1の絶縁基板と第2の絶縁基板との
間には液晶が挟持された液晶表示装置であって、伺−の
画素電極に対する第1のTPTの接続部と第2のTPT
の接続部とが共有されており、同一の信号線に対する第
1のTPTの接続部と第2のTPTの接続部とか共有さ
れていることを特徴としている。
(Means for Solving the Problem) The present invention provides a first pixel electrode arranged on a first insulating substrate on a pixel electrode or matrix, scanned by a first scanning line, and inputted with a signal from a first signal line. and a second TP scanned by the second scanning line and receiving a signal from the second signal line.
T is connected to each pixel electrode, a counter electrode is arranged on the surface of a second insulating substrate provided oppositely on the second insulating substrate, and A liquid crystal display device in which a liquid crystal is sandwiched between a substrate and a connecting portion of a first TPT to a pixel electrode and a second TPT.
The connection portion of the first TPT and the connection portion of the second TPT to the same signal line are also shared.

(作 用) 各画素電極毎に冗長性を持たせるべく第1及び第2のT
PTか接続されているが、同一の画素電極に対する第1
のTPTと第2のTPTの接続部が共有化され、さらに
同一の信号線に対する第1のTPTと第2のTPTの接
続部か共有化されているため、接続部の数か減少し開孔
率か向上し高画質化かもたらされる。また、各TPTの
半導体薄膜同志か接続され短絡されているため、製造時
に不純物イオンを半導体薄膜に注入する過程で絶縁破壊
を起こさすに済み、製造歩留まりが向上する。
(Function) In order to provide redundancy for each pixel electrode, the first and second T
PT is connected, but the first to the same pixel electrode
Since the connection part between the first TPT and the second TPT is shared, and the connection part between the first TPT and the second TPT for the same signal line is also shared, the number of connections is reduced and the number of openings is reduced. This results in improved image quality and improved image quality. Further, since the semiconductor thin films of each TPT are connected and short-circuited, there is no need to cause dielectric breakdown during the process of implanting impurity ions into the semiconductor thin film during manufacturing, thereby improving manufacturing yield.

(実施例) 以下、本発明の一実施例について図面を参照して説明す
る。第1図に本実施例による液晶表示装置の構成を示す
。本実施例では、TPTと画素電極との接続部、さらに
はTPTと信号線との接続部の共有化を図ることて接続
部の数を減少させ、開孔率を向上させた点に特徴がある
(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of a liquid crystal display device according to this embodiment. This embodiment is characterized in that the number of connection parts is reduced by sharing the connection part between the TPT and the pixel electrode, as well as the connection part between the TPT and the signal line, and the aperture ratio is improved. be.

第1図に本実施例による液晶表示装置の回路構成を示す
。画素電極コ1とTFTI 1 aのドレインD ll
aとの接続部と、画素電極11とTPTI 1 bのド
レインDllbとの接続部が、接続部121において共
有されている。同様に、信号線X2とTFTllbのソ
ース5llbとの接続部と、信号線X2とTFT22a
のソースS 22aとの接続部か、接続部122におい
て共有されている。
FIG. 1 shows the circuit configuration of a liquid crystal display device according to this embodiment. Pixel electrode Co1 and drain Dll of TFTI1a
The connection portion 121 is shared by the connection portion between the pixel electrode 11 and the drain Dllb of the TPTI 1 b. Similarly, the connection between the signal line X2 and the source 5llb of TFTllb, and the connection between the signal line X2 and the TFT22a
The connection with the source S 22a or the connection 122 is shared.

この場合の具体的な平面構造を、第2図に示す。A specific planar structure in this case is shown in FIG.

TFTl 1 aのドレインDl]aとT P T l
lbのドレインDIlbとは、導電性を有する半導体薄
膜103で接続され、共有化したコンタクトホール10
1において画素電極11に接続されている。
Drain Dl of TFTl 1 a and T P T l
The drain DIlb of Ib is connected to the conductive semiconductor thin film 103 through a shared contact hole 10.
1 is connected to the pixel electrode 11 .

信号線X2に対するTPTllbのドレインD llb
とTFT22aのドレインD22aとの接続も同様に、
共有化したコンタクトホール102においてなされてい
る。このように、接続部の共有化を図ることでその数を
減らし、開孔部100の面積を増大させて明るい画面を
実現し、高画質化を達成している。具体的には、第5図
に示された従来の開孔部200の面積と比較すると、約
20%上昇している。
Drain Dllb of TPTllb for signal line X2
Similarly, the connection between and the drain D22a of the TFT22a is as follows.
This is done in a shared contact hole 102. In this way, by sharing the connection parts, the number of connections is reduced and the area of the aperture 100 is increased to realize a bright screen and achieve high image quality. Specifically, compared to the area of the conventional opening 200 shown in FIG. 5, the area has increased by about 20%.

また、各TPTの半導体薄膜同志が短絡されるため、製
造時に不純物イオンを注入する際にチャシアツブによる
絶縁破壊を起こさずに済み、静電気耐圧が向上して歩留
まり率を改善することができる。
In addition, since the semiconductor thin films of each TPT are short-circuited, dielectric breakdown due to chatter bulges does not occur when impurity ions are implanted during manufacturing, and the electrostatic breakdown voltage is improved, thereby improving the yield rate.

第3図に示された他の実施例は、保持容量11]を有し
た場合に相当する。この場合も同様に、TPTl 1 
aのドレインD llaとTPTllbのトレインDl
lbとか、共有化されたコンタクトホール10ユにおい
て画素電極11に接続されている。但しここでは、保持
容量111の共通電極1]2と画素電極11との接続も
、このコンタクトホール101を共有して行っている。
The other embodiment shown in FIG. 3 corresponds to the case where the storage capacity 11] is provided. In this case as well, TPTl 1
Drain D lla of a and train Dl of TPTllb
It is connected to the pixel electrode 11 through a shared contact hole 10u such as lb. However, here, the common electrode 1]2 of the storage capacitor 111 and the pixel electrode 11 are also connected to each other by sharing this contact hole 101.

上述した実施例はいずれも一例であり、本発明を限定す
るものではない。例えば、TPTとしては、多結晶シリ
コン、非晶質シリコンあるいはカドミウム・セレン(C
dSe)等のいずれの材料から成るTPTを用いた装置
においても、適用することができる。
The embodiments described above are merely examples and do not limit the present invention. For example, TPT can be polycrystalline silicon, amorphous silicon, cadmium selenium (C
It can be applied to devices using TPT made of any material such as dSe).

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、TPTと画素電極
、さらにTPTと信号線との接続部が共有され開孔率か
向上しているため、明るく高画質な画面を実現すること
かできると同時に、各TPTの半導体薄膜同志か接続さ
れ短絡されているため、不純物イオンを半導体薄膜に注
入する過程で絶縁破壊を起こさすに済み、製造歩留まり
を向上させることができる。
As explained above, according to the present invention, the connecting parts between the TPT and the pixel electrode, as well as between the TPT and the signal line, are shared and the aperture ratio is improved, making it possible to realize a bright and high-quality screen. At the same time, since the semiconductor thin films of each TPT are connected and short-circuited, there is no need to cause dielectric breakdown during the process of implanting impurity ions into the semiconductor thin film, and the manufacturing yield can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による液晶表示装置の構成を
示した回路図、第2図は同装置の構造を示した平面図、
第3図は本発明の他の実施例による液晶表示装置の構成
を示した回路図、第4図は従来の液晶表示装置の構成を
示した回路図、第5図は同装置の構造を示した平面図で
ある。 11−・・画素電極、lla、llb、22a−・・T
FT、 Dlla 、  Dllb 、  D22a 
・・・ドレイン、5lla 、  5llb 、  5
22a−=ソース、101゜102・・・コンタクトホ
ール、103・・・半導体薄膜、100.110・・・
開孔部、111・・・保持容量、112・・・共通電極
、Xl、、X2 、X3・・・信号線、Yl、Y2.Y
3・・・走査線。 気1 図
FIG. 1 is a circuit diagram showing the configuration of a liquid crystal display device according to an embodiment of the present invention, FIG. 2 is a plan view showing the structure of the device,
FIG. 3 is a circuit diagram showing the structure of a liquid crystal display device according to another embodiment of the present invention, FIG. 4 is a circuit diagram showing the structure of a conventional liquid crystal display device, and FIG. 5 is a circuit diagram showing the structure of the device. FIG. 11-...Pixel electrode, lla, llb, 22a-...T
FT, Dlla, Dllb, D22a
...Drain, 5lla, 5llb, 5
22a-=source, 101°102...contact hole, 103...semiconductor thin film, 100.110...
Opening portion, 111... Holding capacitor, 112... Common electrode, Xl, , X2, X3... Signal line, Yl, Y2. Y
3...Scanning line. Qi 1 figure

Claims (1)

【特許請求の範囲】  第1の絶縁基板上に画素電極がマトリクス上に配置さ
れ、第1の走査線より走査され第1の信号線より信号を
入力される第1の薄膜トランジスタと、第2の走査線よ
り走査され第2の信号線より信号を入力される第2の薄
膜トランジスタとが前記各々の画素電極に接続されてお
り、前記第2の絶縁基板上に対向して設けられた第2の
絶縁基板表面には対向電極が配置され、前記第1の絶縁
基板と前記第2の絶縁基板との間には液晶が挟持された
液晶表示装置において、 同一の画素電極に対する前記第1の薄膜トランジスタの
接続部と前記第2の薄膜トランジスタの接続部とが共有
されており、 同一の信号線に対する前記第1の薄膜トランジスタの接
続部と前記第2の薄膜トランジスタの接続部とが共有さ
れていることを特徴とする液晶表示装置。
[Claims] Pixel electrodes are arranged in a matrix on a first insulating substrate, a first thin film transistor scanned by a first scanning line, and a signal inputted from a first signal line; A second thin film transistor scanned by a scanning line and receiving a signal from a second signal line is connected to each of the pixel electrodes, and a second thin film transistor provided oppositely on the second insulating substrate is connected to each pixel electrode. In a liquid crystal display device in which a counter electrode is disposed on a surface of an insulating substrate, and a liquid crystal is sandwiched between the first insulating substrate and the second insulating substrate, the first thin film transistor is connected to the same pixel electrode. A connecting portion and a connecting portion of the second thin film transistor are shared, and a connecting portion of the first thin film transistor and a connecting portion of the second thin film transistor are shared with respect to the same signal line. LCD display device.
JP2326438A 1990-11-28 1990-11-28 Liquid crystal display device Pending JPH0450925A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2326438A JPH0450925A (en) 1990-11-28 1990-11-28 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2326438A JPH0450925A (en) 1990-11-28 1990-11-28 Liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH0450925A true JPH0450925A (en) 1992-02-19

Family

ID=18187810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2326438A Pending JPH0450925A (en) 1990-11-28 1990-11-28 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH0450925A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002244157A (en) * 2000-12-14 2002-08-28 Seiko Epson Corp Electro-optical panel and electronic instrument
JP2004145356A (en) * 2000-12-14 2004-05-20 Seiko Epson Corp Electro-optic panel and electronic equipment
KR100495827B1 (en) * 1996-04-16 2005-09-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Active Matrix Circuits and Displays
JP2006030782A (en) * 2004-07-20 2006-02-02 Sharp Corp Liquid crystal display device, method for repairing the same and method for driving the same
JP2006516162A (en) * 2002-08-21 2006-06-22 サムスン エレクトロニクス カンパニー リミテッド Thin film transistor array substrate and liquid crystal display device including the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100495827B1 (en) * 1996-04-16 2005-09-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Active Matrix Circuits and Displays
JP2002244157A (en) * 2000-12-14 2002-08-28 Seiko Epson Corp Electro-optical panel and electronic instrument
JP2004145356A (en) * 2000-12-14 2004-05-20 Seiko Epson Corp Electro-optic panel and electronic equipment
JP2006516162A (en) * 2002-08-21 2006-06-22 サムスン エレクトロニクス カンパニー リミテッド Thin film transistor array substrate and liquid crystal display device including the same
JP2006030782A (en) * 2004-07-20 2006-02-02 Sharp Corp Liquid crystal display device, method for repairing the same and method for driving the same
JP4498043B2 (en) * 2004-07-20 2010-07-07 シャープ株式会社 Liquid crystal display device, liquid crystal display device repair method, and liquid crystal display device drive method

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