JPS62105656U - - Google Patents
Info
- Publication number
- JPS62105656U JPS62105656U JP19754485U JP19754485U JPS62105656U JP S62105656 U JPS62105656 U JP S62105656U JP 19754485 U JP19754485 U JP 19754485U JP 19754485 U JP19754485 U JP 19754485U JP S62105656 U JPS62105656 U JP S62105656U
- Authority
- JP
- Japan
- Prior art keywords
- pseudo
- circuits
- trunk
- line
- interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 claims description 4
- 108010076504 Protein Sorting Signals Proteins 0.000 claims 1
- 238000012790 confirmation Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Monitoring And Testing Of Exchanges (AREA)
Description
第1図は本考案実施例装置の外観図。第2図は
本考案実施例装置の試験時接続を示すシーケンス
説明図。
NET……擬似呼発生装置、O1〜O20……
着信端子、T1〜T20……着信端子、NW……
通話路網、LC……加入者回路、OGT……出ト
ランク回路、ICT……入トランク回路。
FIG. 1 is an external view of the device according to the present invention. FIG. 2 is a sequence explanatory diagram showing the connection during testing of the device according to the embodiment of the present invention. NET...Pseudo call generator, O1 to O20 ...
Incoming terminal, T 1 to T 20 ... Incoming terminal, NW...
Communication path network, LC...subscriber circuit, OGT...outgoing trunk circuit, ICT...incoming trunk circuit.
Claims (1)
み一つの筐体に装着された擬似呼発生装置におい
て、 対ライン回路用インタフエースと対トランク回
路用インタフエースとを共用するライン回路用お
よびトランク回路用擬似呼発生手段を有する多負
荷試験手段と、 擬似相手局手段、多周波信号のシーケンス表示
手段および動作シーケンス確認手段を有する端末
装置試験手段と を備えたことを特徴とする擬似呼発生装置。[Scope of Claim for Utility Model Registration] In a pseudo call generation device that includes a means for connecting to the telephone exchange that is the subject of the test and is installed in one housing, the interface for line-to-line circuits and the interface for trunk-to-trunk circuits are shared. multi-load testing means having pseudo-call generating means for line circuits and trunk circuits, and terminal device testing means having pseudo-destination station means, multi-frequency signal sequence display means, and operation sequence confirmation means. Pseudo call generator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19754485U JPS62105656U (en) | 1985-12-23 | 1985-12-23 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19754485U JPS62105656U (en) | 1985-12-23 | 1985-12-23 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62105656U true JPS62105656U (en) | 1987-07-06 |
Family
ID=31157381
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19754485U Pending JPS62105656U (en) | 1985-12-23 | 1985-12-23 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62105656U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5553959A (en) * | 1978-10-17 | 1980-04-19 | Nec Corp | False calling device |
-
1985
- 1985-12-23 JP JP19754485U patent/JPS62105656U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5553959A (en) * | 1978-10-17 | 1980-04-19 | Nec Corp | False calling device |
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