JPS62105063A - Pattern generator - Google Patents

Abstract

PURPOSE:To obtain a flexible pattern generator which generates information in any waveform by reading digital waveform information which is stored in a RAM with the address signal of a phase accumulator. CONSTITUTION:A pattern data generation part 10 generates control information such as timing information TD, function information FD, a digital pattern signal PD, and expected value pattern data ED to be supplied to a subject 1. A digital waveform information generator 6 reads digital waveform data out of the RAM 13 at a specific repetitive speed with the address signal outputted from the phase accumulator 14 and outputs digital waveform data which as an expected value determined by given amplitude information. A timing generating circuit 5 outputs timing information. A timing generating circuit 5 outputs timing information to be supplied to a measurement system. Then, the control information outputted from a pattern data generation part 10 and digital waveform information outputted from a digital waveform generator 6 are shaped into waveform suitably to be supplied to the subject 1 by a waveform shaping part 3 and outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pattern generator used in an IC test device for testing semiconductor integrated circuits in which analog circuits and digital circuits coexist.

``Background of the Invention'' The use of ICs is progressing in the fields of audio equipment and video equipment, and the entire television reception image is now on the verge of being integrated into a single chip. The ICs that make up these devices convert analog input signals into digital signals in the AD conversion stage, perform various processing on the digital signals in a digital signal processing system including a microcomputer, and send the processing results to the DA conversion stage. The analog signal is converted back to an analog signal, and the analog output is output as an audio output or an image signal.

In the field of digital audio, there is also an IC that receives digital data directly as a human input signal, processes this digital waveform data, performs DA conversion, and outputs it as audio.

Other ICs that include analog circuits include telephone codecs and video codecs.

In this way, there are various kinds of ICs that include a mixture of analog circuits, so when considering a general-purpose test equipment that tests these various devices, it is necessary to use analog circuits in both the human input signal system to the device and the device output measurement system. It is also necessary to be able to handle signals both digitally and digitally.

FIG. 4 shows an outline of a signal source that provides a test signal to a subject and a device that captures signals output from the subject. In the figure, 1 indicates a subject, 2 an analog waveform generator, and 3 a pattern generator. The pattern generator 3 includes a synchronizing signal g4, a timing signal generator 5, and a digital waveform generator 6 that outputs analog waveform data such as a sine wave or a triangular wave as a digital signal.

An AD converter 7 and a buffer memory 8 for receiving digital signals are provided on the signal receiving side.

These analog signal generator 2, digital waveform generator 6
, AD converter 7, and buffer memory 8 each operate in synchronization with the synchronization signal output from synchronization signal a4.

The analog waveform generator 2 and the AD converter 7 are used to provide analog signals to the subject 1 and to receive analog signals output from the subject 1.

The digital waveform generator 6 and buffer memory 8 are used to provide digital waveform data to the subject 1 and to capture digital data output from the subject 1.

The digital signal output from the AD converter 7 and the signal taken into the buffer memory 8 are subjected to digital conversion processing such as FFT (Fast Fourier Transform) or DFT (Discrete Fourier Transform) to perform measurement, evaluation and analysis.

Here, the driver and comparison circuit for a digital function test that checks whether the logic circuit built into the test object 1 operates according to expected values is omitted.

The present invention relates to an improvement of the pattern generator 3 shown in FIG. 4, and in particular improves the digital waveform generator 6 to provide a highly versatile tick.

"Prior Art" FIGS. 5 to 7 show the configuration of a conventional digital waveform generator.

The digital waveform generator shown in FIG.
A, a memory IOB that stores timing information, and a waveform shaping and driving circuit 11 that sets the waveform information and timing information successively output from the memories IOA and IOB to a waveform and level suitable for the input signal of the subject 1. configured.

The arithmetic unit 9 receives sampling data P, which is input in advance.
Based on P, , P, ...P, the desired frequency and level and the digital waveform information that should become the desired analog waveform are calculated, the digital waveform information is transferred to the memory IOA, and the digital waveform is transferred from the memory 10A. The information is read and the read digital waveform information is supplied to the subject 1 through the waveform shaping and driving circuit 11.

At the same time, timing information is read from the memory IOB, and the timing information is given to the subject l in addition to the digital waveform data.

On the other hand, the digital waveform generator 6 shown in FIG.
1 is shown.

Digital waveform information with different amplitude levels, frequencies, waveforms, etc. is stored in advance in the memory 12A, and all necessary control information is stored in the memory 12B. ,
The timing information is read out and applied to the subject 1 via the waveform shaping and driving circuit 11.

Furthermore, the digital waveform generator 6 in FIG.
and the sampling data P stored in the ROM 13,
-P at desired intervals, a fixed timing generator 15, a multiplier 16, and a waveform shaping and driving circuit 11. This Dinkle waveform generator 6 uses sampling data P+, Pz, Pz...Pn in the ROM 13.
reading interval (for example, P+, p,, PS+ pff
The frequency of the digital waveform information can be changed by selecting an appropriate interval for reading (such as reading). Also, the amplitude value of the digital waveform information is calculated by the multiplier 16.
It can be changed by changing the coefficient value in .

[Problems to be Solved by the Invention] In the case of the digital waveform generator shown in FIG.
When changing the conditions of the digital waveform, ie, the frequency, amplitude, etc., each time the arithmetic operation unit 9 must perform calculations, and the calculation results must be written in the memo IJIOA.

Therefore, when changing the waveform conditions, it is necessary to input the conditions to the arithmetic unit 9 and to transfer the calculation results to the memory 10A, so there is a drawback that the waveform conditions cannot be changed in real time. .

Furthermore, since the waveform conditions must be entered manually into the calculator 9, there is an inconvenience that the waveform conditions cannot be easily changed. In other words, it has the drawback of lacking versatility.

On the other hand, according to the digital waveform generator shown in FIG. 6, necessary digital waveform information can be obtained by storing various types of waveform information in the memory IOA in advance and selecting and reading out the waveform information. .

However, the digital waveform generator shown in FIG. 6 has the disadvantage that the memory capacity is large and the cost required for this is high. Another disadvantage is that the waveform conditions cannot be changed in real time.

On the other hand, according to the digital waveform generator shown in FIG. 7, the frequency can be changed by changing the setting value (addition step value) of the phase accumulator 14, and the amplitude You can change the value. Therefore, waveform conditions can be changed in real time.

However, in this method, the waveforms ta i are limited to those stored in the ROM 13, so the types of waveforms are limited. Further, since the timing generator 15 has a fixed timing, the test timing of the subject I is fixed, which causes the inconvenience that a sufficient test cannot be performed.

"Means for Solving the Problems" In this invention, a digital waveform generator is configured by a RAM, a phase accumulator, a multiplier, etc., and necessary waveform information is written in the RAM, and this waveform information is transferred to a phase accumulator. The structure is such that reading is performed using an address signal output from the 1-neemulator.

Therefore, according to the present invention, a plurality of RAMs are prepared, a plurality of types of waveform information are written in the plurality of RAMs, the RAM in which the desired waveform information is written is selected, and the RAM is outputted from the phase accumulator. By reading using the address signal, digital waveform information having a desired frequency and waveform can be obtained. Furthermore, by changing the coefficients of the multiplier, the amplitude information of the digital waveform information can also be changed.

As described above, according to the present invention, since the RAM is used as the memory for storing waveform information, if the necessary waveform types are insufficient, the necessary waveform information can be written to the RAM. Therefore, there is no shortage of types of waveforms.

In addition, to change the frequency, it is sufficient to change the set value of the phase accumulator, and the change can be made in real time. Therefore, according to the present invention, the frequency and amplitude can be changed in real time, and since the waveform information can be rewritten at any time by using the RAM, there are no restrictions on the types of waveforms. Therefore, a pattern generator that is easy to operate and has high versatility can be provided.

"Embodiment" FIG. 1 shows an embodiment of the present invention. In Figure 1, 1
3 is a pattern generator, 4 is a synchronization signal generator,
11 indicates a waveform shaping and driving circuit, respectively.

The synchronization clock CLK output from the synchronization signal generator 4 is given to the timing signal generator 5, the microprogram sequencer 17, and the waveform shaping and driving circuit 11.

The timing signal generator 5 outputs a sample clock WS and a trigger clock WT based on the synchronization data and measurement timing data stored in the memory 18. The sample clock WP is applied to the phase accumulator 14,
The step speed of the address signal output from the phase accumulator 14 is defined. Further, a trigger clock W is given to a parallel-to-serial converter 19, which will be described later, and defines the ejection speed of the serial signal.

10B indicates a memory that stores timing information. The successive addresses of this memory IOB are defined by control data read from the memory 21. memory 21
is controlled according to the microprogram read out from the microprogram sequencer 17, and reads out the control information stored in the memory 10 in various forms such as loop and repeat.

The control information is timing information TD (
clock, synchronous clock, etc.), and function information 1FD (control digital signal) to be given to the subject l.
A logic/function test digital pattern No. 13 PD and expected value pattern data ED to be given to the subject 1 are included. The logic/function test digital pattern signal PD is a signal equivalent to a pattern signal conventionally used when testing digital ICs such as memory ICs.

Timing information TD such as clock to be given to subject 1
and digital pattern signal PD are applied to the clock input terminal of the subject 1 through the main channel selector 22 and the waveform shaping and driving circuit 11.

Control information FD (control digital signal) and digital pattern signal PD to be provided to the subject 1 are provided to the sub-channel selector 23.

The sub-channel selector 23 selects whether to send the control information FD as parallel data to the transmission line 24 or to supply it to the parallel-to-series converter 19.

The parallel-serial converter 19 converts the digital waveform information WF and control information FD into serial signals and supplies them to the main channel selector 22.

In this invention, a RAM is used as the memory 13 for storing waveform data in the digital waveform generator 6, and this RAM! The configuration is such that the digital waveform data stored in the phase accumulation rake 14 is read out by the address signal outputted from the phase accumulation rake 14.

For example, as shown in FIG. 2, the RAM constituting the memory I3 stores sampling information +tlpl for each address from the first address to the 8000th address.

P2. The example of FIG. 2 shows the case of sine wave data.

This sampling data P+, P2, Ps...
For example, when read out for each address using a sampling clock WP of 8 kllz, a sine wave digital fl'J f[5 of 1.0 Ilz is output. Further, when sampling data is read every 1020 addresses using a sampling clock WP of 8kllz, sine wave digital information WF of 102011z is output. The address interval of the address signal applied to the memory 13 can be freely changed by setting a value corresponding to the address interval in a register provided in the phase accumulator 14.

The memory 13 actually has a plurality of storage areas, each of which has a sine wave, a triangular wave, a sawtooth wave, a multisine wave,
Write various waveform information such as noise waves. Therefore, various types of waveform information can be read out by selecting and reading out the waveform information written in each storage area of the memory 13 as needed.

The digital waveform information read from the memory 13 is sent to the multiplier 1.
In step 6, the amplitude value when converted into an analog wave is adjusted to a desired value. 16A indicates a setting device for setting an amplitude value.

The digital waveform information whose amplitude value is defined by the multiplier 16 is converted by the code converter 25 into a code that conforms to the standards of the subject I, and is provided to the sub-channel selector 23. 2
5A indicates a setting device for specifying the code of the subject 1.

The sub channel selector 23 outputs digital waveform information WF.
When giving parallel signals to the subject 1, the digital waveform information fI! The WF is output to the transmission line 24.

When outputting digital waveform information iWP as a serial signal, convert digital waveform information IIWP to parallel-serial converter 1.
Give to 9. The parallel-serial converter 19 converts the provided digital waveform information WF alone or with the control information FD.
At the same time, it is converted into a serial signal as shown in FIG. 3, and this serial signal is sent to the main channel selector 22, and from the main channel selector 22, it is applied to the subject l via the waveform shaping and driving circuit 11. Note that L9A is bit a of the serial signal to be converted.
This is a setting device that defines the

"Operations and Effects of the Invention" As described above, according to the present invention, digital waveform information is stored in the RAM, and the digital waveform ff stored in the RAM is
Since the configuration is such that i is read out by the address signal of the phase accumulator 14, the frequency information included in the digital waveform information can be changed by appropriately changing the interval between addresses for reading out the RAM. This frequency information can be changed by setting a numerical value corresponding to the address interval in a register provided in the phase accumulator 14, and by sequentially cumulatively adding the numerical values to form an address signal. Furthermore, by adjusting the multiplier 16 and multiplying the digital signal by a coefficient, the amplitude value when converted into an analog signal can be defined.

Changes in frequency and amplitude values can therefore be made in real time. Furthermore, since this invention uses a RAM as the memory 13 that records digital waveforms,
If a waveform that has not been prepared in advance is required, the necessary waveform can be written into the memory 13 from the outside. Therefore, it is possible to provide a highly versatile pattern generator that can generate information of any waveform.

[Brief explanation of drawings]

FIG. 1 is a system diagram for explaining one embodiment of this invention.
Figure 2 is a graph showing an example of storing digital waveform information in memory, Figure 3 is a graph showing an example of converting digital waveform information and control information into serial signals, and Figure 4 is a test of an IC that includes analog circuits. FIGS. 5 to 7 are block diagrams for explaining the conventional pattern generator. l: Object, 2: Analog waveform generator, 3: Pattern generator, 4: Synchronization signal source, 5: Timing signal generator, 4
: Digital waveform generator, 13: Memory, 14: Phase accumulator, 16: Multiplier, [7: Microprogram sequencer, 19: Parallel-serial converter, 2
2: Raw channel selector, 23: Sub channel selector, 25: Code converter. Patent applicant: Atohan Chist Co., Ltd. Representative Takuhiro Kusano 20 Tree 40 O 5 K11 6 Figure 17

Claims (1)

[Claims] (1) A: a pattern data generation section that generates timing information to be given to the subject, control information to be given to the subject, and digital pattern signals; A digital waveform information generator that outputs digital waveform data having an amplitude value determined by the amplitude information; C. A timing generation section that outputs timing information to be given to the measurement system; D. Control information output from the pattern data generation section. and a waveform shaping section that shapes the digital waveform information outputted from the digital waveform information generator into a waveform suitable for giving to a subject.