JPS6198398A - Frequency conversion circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a frequency conversion circuit for acoustic signals.

←) Conventional technology Japanese Patent Application Laid-open No. 162996/1983 (G10L
) There is a technique described in .

That is, there is a method of compressing and expanding an acoustic signal waveform on the time axis and converting its frequency. The outline of its configuration will be explained with reference to FIG. (1) is the acoustic signal Kugata terminal (In), (2
1 is an AD conversion circuit that converts an input acoustic signal into a digital value, (3) is a digital storage means such as a RAM that stores a large audio sample converted into a digital value by the AD conversion circuit (2), and (4) is a storage means. This is a DA conversion circuit that converts the digital value of the audio sample read from the audio sample into an analog signal, and (5) is an audio signal output terminal (Out). (7) is a write address setting circuit that sets a write address to the digital storage means (3), (8) is a read address setting circuit that sets a read address, and a switching circuit (6)
The output of write and read addresses is switched by . (9
) is the mask-clock generation circuit, the first clock (
&), and αD is a variable frequency dividing circuit that generates a variable frequency second clock (b) for reading from the storage means and performing DA conversion. (2) is a frequency division number setting means for setting the frequency division number of the variable frequency divider circuit. According to the designation of the frequency conversion ratio from the outside, the corresponding frequency division number is set, and the corresponding frequency division number is set according to the setting. 1', the value of the second clock (b) frequency is determined.

Here, if the frequency of the first clock (a) is (fl) and the frequency of the second clock (b) is (f2), then the frequency of the output signal becomes h/f1 times the input signal frequency. Therefore, by changing the second clock frequency (f2), the frequency of the output signal can be changed.

This second clock is obtained by variable division of the master clock as described above, and its frequency division number is set in units of one pulse of the master clock. Therefore, the value of the second clock frequency can only take discontinuous values,
Its accuracy depends on the master clock frequency.

Now, if you apply this technology to audio equipment and want to change the input signal by a certain pitch, if the master clock frequency is low, it will correspond to the pitch change and perfectly match the large frequency conversion ratio. This results in the disadvantage that the second clock frequency cannot be obtained, and only a pitch slightly deviated from the desired pitch can be obtained. If the master clock frequency is set to high < 1, the frequency division number can be increased and the interval between changes in the second clock can be made finer, increasing the accuracy of the 1-frequency conversion ratio.However, the frequency of the circuit elements It is undesirable to make the master clock frequency higher than necessary due to the limitations of compatibility and clock frequency limitations when implementing an IC.

(c) Problems to be Solved by the Invention The present invention provides a frequency conversion circuit that can improve the accuracy of frequency conversion of audio signals without increasing the master clock frequency more than necessary.

(b) Means for solving the problem A frequency conversion ratio designation means for designating the frequency conversion ratio of the input acoustic signal is provided, and according to this designation, the master clock is frequency-divided by the first variable frequency divider circuit to obtain the first clock. Similarly, according to this designation, the master clock is frequency-divided by the second variable frequency divider circuit to obtain the second clock, the analog input signal is converted into a digital value according to the first clock, and the value is digitally stored. A frequency converter for converting the frequency of an input acoustic signal in real time according to the frequency ratio of the first clock and the second clock by storing the second clock in the digital storage means and converting the second clock from the digital storage means. The circuit is configured to perform frequency conversion with high accuracy by setting an optimal combination of frequencies of the first clock and the second clock.

(e) Effects and Examples Examples of the present invention will be described with reference to FIG. (1) is an audio signal input terminal, (2) is an AD conversion circuit that converts the input audio signal into a digital value, and (3) is a digital storage such as a RAM that stores audio samples converted to digital values by the AD conversion circuit. The means (4) is a DA conversion circuit that converts the digital value of the large audio sample read from the storage means into an analog signal, and (5) is an audio signal output terminal (O
ut). (7) is a write address setting circuit that sets a write address to the digital storage means (3), and (8) is a read address setting circuit that sets a read address.The switching circuit (6) outputs the write and read addresses. Perform switching. (9) is the master clock generation circuit, and the shout is the AD
This is a first variable frequency divider circuit that generates the first clock (a) for writing into the conversion circuit (2) and the memory circuit (3). 4) is a second variable frequency divider circuit that generates a second clock peak for performing DA conversion. (2) is a frequency division number setting means for setting the frequency division number of these variable frequency divider circuits, and according to the external designation of the frequency conversion ratio, the corresponding first variable frequency divider circuit and second variable frequency divider are set. This is to set the frequency division number of each circuit.

Next, a method of setting these frequency division numbers will be described. If the master clock frequency is (fo), the frequency division number of the first variable frequency divider circuit is nl, and the frequency division number of the second variable frequency divider circuit is nl, then the first clock frequency f1 (KR2) and the second clock frequency are f2(K'f1z) is f1=9/n1.
It is expressed as fz=fo/nz ("is ff2: integer). Here, if the frequency conversion ratio between the input acoustic signal and the output acoustic signal is m, m is determined by the frequency ratio of the first clock and the second clock. Then, :1 m = h/ft = n1/nz. Therefore, the frequency conversion ratio that is closest to the desired frequency conversion ratio (*1)
By setting the value of (nl) by the frequency division number setting means (2), a desired frequency ratio conversion can be performed. In the conventional method, the first clock frequency (fl) was kept constant, the speed n1 was kept constant, and only nl was changed to change the frequency conversion ratio, but with the configuration of the present invention, nl
, nl, it becomes possible to set the frequency conversion ratio with high accuracy.

An explanation will be given by listing specific numerical values in Tables 1 and 2 as an example of an actual configuration. Converts the frequency of the input acoustic signal,
Changes in pitch such as ± tones, ±1 tones, etc. (a, unit:
As an example, Table 1 shows the frequency conversion ratio < m) when changing only the second clock (fl) using the conventional method, and Table 2 shows the frequency conversion ratio < m) when changing the second clock (fl) using the conventional method. This figure shows the frequency conversion ratio (F7J) when both the first clock (fl) and the second clock (fl) are changed. Here (') 4 sound No. 1 0 sound 5 change Ihi hegoe sound 50
ゝ(I: (a) f.

This is the frequency conversion ratio to obtain, and the relationship of mCJ-2T. 1fc, 10 as master clock (fO)
Mnz is used. As shown in Table 1, if the first clock is kept constant and only the second clock is varied, the frequency conversion ratio can only be set within an accuracy of about 1%. When changing both the first clock and the second clock, it is possible to accurately set the frequency conversion ratio with an accuracy of about 0.01%.

(F) Effects of the Invention By using the frequency conversion circuit of the present invention, it is possible to set the frequency conversion ratio with much higher precision than with conventional circuits using the same master clock frequency. The clock frequency is 1QMHz,
If the first and second clock frequencies are set to about 100 -H2, approximately 100 times more precision can be obtained.

Therefore, even when changing the pitch of your signal, it is possible to obtain a frequency conversion ratio very close to the desired pitch without increasing the master clock frequency more than necessary. As described above, the present invention provides a real-time frequency conversion circuit that can accurately set the frequency conversion ratio of an input acoustic signal.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram of a main part of a frequency conversion circuit according to the present invention. FIG. 2 is a block circuit diagram of a main part of a conventional frequency conversion circuit. (1)...Acoustic signal input terminal, (2)...
...AD conversion circuit, (3)...Digital storage means, (4)...DA conversion circuit, (5)...
...Acoustic signal output terminal, (6)...Switching circuit, (7)...Write address setting circuit, (8)...
... Read address setting circuit, (9) ... Master clock generation circuit, α0; ... First variable frequency dividing circuit, (11) ... Second variable Frequency dividing circuit, ■・
...Dividing number setting means, (a)...First clock, (b)...Second clock.

Claims (1)

[Claims] (1) (a) AD conversion means for converting an analog input signal into a digital signal; (b) digital storage means for storing the output of the AD conversion means; (c) converting the output of the digital storage means into an analog value. (d) a first variable frequency divider circuit that divides the master clock to generate a first clock; (e) divides the master clock to generate a second clock; (f) a frequency division number setting means for setting a frequency division number between the first variable frequency divider circuit and the second variable frequency divider circuit; (g) the first variable frequency divider circuit;
(h) a read address setting means for specifying a read address of the digital storage means in response to the second clock; and (h) a read address setting means for specifying a read address of the digital storage means in response to the second clock. , Both the first variable frequency dividing circuit and the second variable frequency dividing circuit are controlled by the frequency dividing number setting means, and convert the frequency of the analog input signal according to the frequency ratio of the first clock and the second clock. A frequency conversion circuit characterized by: