JPS6196382U - - Google Patents
Info
- Publication number
- JPS6196382U JPS6196382U JP18135784U JP18135784U JPS6196382U JP S6196382 U JPS6196382 U JP S6196382U JP 18135784 U JP18135784 U JP 18135784U JP 18135784 U JP18135784 U JP 18135784U JP S6196382 U JPS6196382 U JP S6196382U
- Authority
- JP
- Japan
- Prior art keywords
- mounting plate
- support frame
- sockets
- mounting
- socket
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006073 displacement reaction Methods 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Tests Of Electronic Circuits (AREA)
Description
第１図は本考案の一実施例を示す図であつて、
第２図のＣ−Ｃ線断面図、第２図は斜視図、第３
図は第２図の裏側の概略を示す図、第４図は支持
枠の詳細図、第５図は従来のテストボードの概略
を示す図である。
１ａ，１ｂ……被試験デイバイス、２……ソケ
ツト、３……搭載板、４……支持枠、５，５′…
…溝、６ａ，６ｂ，６ｃ，６ｄ……ソケツト端子
、８，８′……接触子、１３……テストボード、
１４，１６……接触片、１５……押えバネ、１７
，１７′……凸部、１８ａ，１８ｂ，１８ｃ，１
８ｄ……凹部。
FIG. 1 is a diagram showing an embodiment of the present invention,
Figure 2 is a cross-sectional view taken along line C-C, Figure 2 is a perspective view, Figure 3 is a perspective view, and Figure 3 is a perspective view.
The drawings are a diagram schematically showing the back side of FIG. 2, FIG. 4 is a detailed diagram of the support frame, and FIG. 5 is a diagram schematically showing a conventional test board. 1a, 1b...Device under test, 2...Socket, 3...Mounting plate, 4...Support frame, 5, 5'...
...Groove, 6a, 6b, 6c, 6d...Socket terminal, 8, 8'...Contactor, 13...Test board,
14, 16... Contact piece, 15... Presser spring, 17
, 17'...Protrusion, 18a, 18b, 18c, 1
8d... recess.
Claims (1)
載板を相対変位可能に取付け、該搭載板に被試験
デバイス搭載用ソケツトの複数個を移動方向に列
状に配設するとともに、搭載板を変位させること
により複数個のソケツトの端子を切替接続させる
一組の接触子を前記支持枠を設けたことを特徴と
する半導体集積回路試験用ソケツト。 A support frame is mounted on the test board, a mounting plate is attached to the support frame so as to be relatively displaceable, a plurality of sockets for mounting the device under test are arranged on the mounting plate in a row in the direction of movement, and the mounting plate is 1. A socket for testing a semiconductor integrated circuit, characterized in that the supporting frame is provided with a set of contacts that switch and connect terminals of a plurality of sockets by displacement.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18135784U JPS6196382U (en) | 1984-11-29 | 1984-11-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18135784U JPS6196382U (en) | 1984-11-29 | 1984-11-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6196382U true JPS6196382U (en) | 1986-06-20 |
Family
ID=30738907
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18135784U Pending JPS6196382U (en) | 1984-11-29 | 1984-11-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6196382U (en) |
-
1984
- 1984-11-29 JP JP18135784U patent/JPS6196382U/ja active Pending
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