JPS6194127A - Protecting device for service interruption mode - Google Patents
Protecting device for service interruption modeInfo
- Publication number
- JPS6194127A JPS6194127A JP59214901A JP21490184A JPS6194127A JP S6194127 A JPS6194127 A JP S6194127A JP 59214901 A JP59214901 A JP 59214901A JP 21490184 A JP21490184 A JP 21490184A JP S6194127 A JPS6194127 A JP S6194127A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- power failure
- service interruption
- voltage
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Emergency Protection Circuit Devices (AREA)
- Direct Current Feeding And Distribution (AREA)
- Power Sources (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明はマイクロコンピュータ等を用いる制御系の制
御電源停電時の不正動作を防止する停電時保護装置に関
する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power outage protection device that prevents a control system using a microcomputer or the like from malfunctioning during a control power outage.
第2図に従来のこの種の停電時保護装置を示す。 FIG. 2 shows a conventional power outage protection device of this type.
同図において、1は電源母線、2は入力変圧器、3は制
御系電源装置、4は停電検出回路(比較器回路)、5は
制御禁止ゲ〜1・、6は制御装置(マ ′イクロコンピ
ュータ)、6aはマイクロコンピュータ出力、7は被制
御機器である。In the figure, 1 is a power bus, 2 is an input transformer, 3 is a control system power supply device, 4 is a power failure detection circuit (comparator circuit), 5 is a control inhibition gate 1, and 6 is a control device (microphone). 6a is a microcomputer output, and 7 is a controlled device.
この構成においては、電源母線1の電圧が降下した場合
、制御系電源装置3の出力電圧が所定レベル以下に低下
すると停電検出回路4がこの電圧低下を検出して制御禁
止ゲート回路5に停電検出信号を送出する。制御禁止ゲ
ート回路5ば上記停電検出信号を受けるとマイクロコン
ピュータ6が該制御禁止ゲート回路5を介して被制御機
器7に送出していた制御信号をしゃ断する。In this configuration, when the voltage of the power supply bus 1 drops and the output voltage of the control system power supply 3 drops below a predetermined level, the power failure detection circuit 4 detects this voltage drop and sends the control prohibition gate circuit 5 to detect the power failure. Send a signal. When the control prohibition gate circuit 5 receives the power failure detection signal, the microcomputer 6 cuts off the control signal sent to the controlled device 7 via the control prohibition gate circuit 5.
この従来の装置では、制御系電源装置3が出力する電圧
を停電検出回路4に入力しているので、停電検出信号の
発生が電源母線1の電圧の電圧低下より遅れ、該停電検
出信号の発生が制御系電源装置3の出力電圧の低下とほ
ぼ同時となるので、被制御機器7には不正制御信号が入
力される場合が生じ、また、マイクロコンピュータ6が
出力する制御信号と上記停電検出信号との同期が取れな
いので、出力中の制御信号がその規定信号中の途中でし
ゃ断されるといった問題があった。In this conventional device, since the voltage output from the control system power supply 3 is input to the power failure detection circuit 4, the generation of the power failure detection signal is delayed from the voltage drop in the voltage of the power supply bus 1, and the generation of the power failure detection signal is delayed. is almost simultaneously with the drop in the output voltage of the control system power supply 3, so an unauthorized control signal may be input to the controlled device 7, and the control signal output from the microcomputer 6 and the above power failure detection signal may be input to the controlled device 7. Since the control signal cannot be synchronized with the control signal, there is a problem in that the control signal being output is cut off in the middle of the specified signal.
この発明は上記問題を解決するためになされたもので、
停電時における制御装置の不正動作を確実に防止するこ
とができる停電時保護装置を得ることを目的とする。This invention was made to solve the above problem.
An object of the present invention is to obtain a power outage protection device that can reliably prevent malfunction of a control device during a power outage.
この発明は、停電検出回路は電源母線電圧を直接取込む
構成とし、一方、制御装置は停電検出回路の出力を割込
み信号して受け、これを受けた場合に、出力中の制御信
号の規定幅が終了するまで出力動作を続行する構成とし
たものである。In this invention, the power failure detection circuit is configured to directly take in the power supply bus voltage, and the control device receives the output of the power failure detection circuit as an interrupt signal, and when receiving this, the specified width of the control signal being output is The configuration is such that the output operation continues until the end of the output operation.
この発明においては、制御系電源装置の出力電圧が低下
する前に電源母線電圧の停電検出情報がマイクロコンピ
ュータに与えられるので、その間に不正出力を防止する
ための保護動作を行わせることができる。In this invention, since the power failure detection information of the power supply bus voltage is given to the microcomputer before the output voltage of the control system power supply device decreases, a protective operation for preventing unauthorized output can be performed during that time.
第1図はこの発明の一実施例を示すしたブロック図であ
り、停電検出回路4には電源母線lの電圧が導かれ、そ
の出力である停電検出信号はマイクロコンピュータ6の
割込端子(ノンマスカラファル割込端子)61に結合さ
れる。マイクロコンピュータ6は、その出力中に、割込
端子61に停電検出信号を受けると、当該制御信号規定
信号中の終了タイミングに同期して停電検出ビット出力
6bを停電検出ゲート回路8に送出するようにプログラ
ムされている。該停電検出ゲート回路8には停電検出回
路4の出力が導かれ、この出力と停電検出ビット信号6
bを受けると禁止指令(信号)を制御禁止ゲート回路5
に入力する。また、停電検出ゲート回路8の出力はマイ
クロコンピュータ6のリセット端子6Cに結合される。FIG. 1 is a block diagram showing one embodiment of the present invention, in which the voltage of the power supply bus l is led to the power failure detection circuit 4, and the power failure detection signal output from the power failure detection circuit 4 is sent to the interrupt terminal (non- (mascarafal interrupt terminal) 61. When the microcomputer 6 receives a power failure detection signal at the interrupt terminal 61 during output, it sends a power failure detection bit output 6b to the power failure detection gate circuit 8 in synchronization with the end timing of the control signal regulation signal. is programmed to. The output of the power failure detection circuit 4 is led to the power failure detection gate circuit 8, and this output and the power failure detection bit signal 6
When b is received, the prohibition gate circuit 5 controls the prohibition command (signal).
Enter. Further, the output of the power failure detection gate circuit 8 is coupled to the reset terminal 6C of the microcomputer 6.
本実施例では、停電検出回路4に電源母線工の電圧を取
込むように構成しであるので、該電圧が低下した場合、
マイクロコンピュータ6に供給される制御系電源装置3
の出力電圧が低下する前に電源母線1の電圧低下が検出
され、この電圧低下情報を受けると、マイクロコンピュ
ータ6は出力中の制御信号の終了をまって停電検出ビッ
ト信号5baを発生ずるので、該マイクロコンピュータ
6がリセットされると同時に制御禁止ゲート回路5が禁
止動作を行い、制御動作の中断は防止される。In this embodiment, since the power failure detection circuit 4 is configured to receive the voltage of the power supply bus, when the voltage decreases,
Control system power supply device 3 supplied to the microcomputer 6
A voltage drop on the power supply bus 1 is detected before the output voltage of the microcomputer 6 drops, and upon receiving this voltage drop information, the microcomputer 6 waits for the end of the control signal being output and then generates the power failure detection bit signal 5ba. At the same time as the microcomputer 6 is reset, the control inhibition gate circuit 5 performs an inhibition operation, thereby preventing interruption of the control operation.
この発明は以上説明した通り、停電検出回路に電源母線
の電圧を取込むように構成したので、従来に比し、該電
圧の低下を早期に検出することができ、制御信号の区切
りと同期して制御動作の禁止と制御装置のリセットとが
行われるので、停電時の不正動作を確実に防止すること
ができる。As explained above, this invention is configured so that the voltage of the power supply bus is taken into the power failure detection circuit, so that a drop in the voltage can be detected earlier than in the past, and it can be synchronized with the delimitation of the control signal. Since the control operation is prohibited and the control device is reset, it is possible to reliably prevent incorrect operation during a power outage.
第1図はこの発明の一実施例を示すブし179図、第2
図は従来の停電時保護装置を示すブロック図である。
図において、1〜・−電源母線、2・−・入力変圧器、
3−・・制御電源装置、4−停電検出回路、5・・・制
御禁止ゲート回路、6−制御装置、8−・・停電検出ゲ
ート回路I。
なお、図中、同一符号は同一または相当部分を示す。Figure 1 shows an embodiment of the present invention, Figure 179, and Figure 2.
The figure is a block diagram showing a conventional power failure protection device. In the figure, 1--power bus, 2--input transformer,
3--control power supply device, 4-power failure detection circuit, 5-control prohibition gate circuit, 6-control device, 8--power failure detection gate circuit I. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
線の電圧低下を直接に検出する停電検出回路、該停電検
出回路の出力後に制御装置が送出する制御信号を被制御
機器に対して遮断する制御禁止ゲート回路を具え、上記
停電検出回路の出力が停電検出ゲート回路を介して上記
禁止ゲート回路に導かれる共に上記制御装置に割込信号
として与えられ、該割込信号発生後上記制御装置が出力
中制御信号に同期して停電検出ビツト信号を上記停電検
出ゲート回路にゲート信号として入力する機能を有する
と共に上記停電検出ゲート回路の出力をリセツト信号と
して受けることを特徴とする停電時保護装置。A power outage detection circuit that directly detects a voltage drop on the power bus to which the control system power supply is connected via the input transformer, and cuts off the control signal sent by the control device to the controlled equipment after the output of the power outage detection circuit. The output of the power failure detection circuit is guided to the inhibition gate circuit via the power failure detection gate circuit and is also given to the control device as an interrupt signal, and after the interrupt signal is generated, the control device A power failure protection device having a function of inputting a power failure detection bit signal to the power failure detection gate circuit as a gate signal in synchronization with an outputting control signal, and receiving the output of the power failure detection gate circuit as a reset signal. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59214901A JPS6194127A (en) | 1984-10-12 | 1984-10-12 | Protecting device for service interruption mode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59214901A JPS6194127A (en) | 1984-10-12 | 1984-10-12 | Protecting device for service interruption mode |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6194127A true JPS6194127A (en) | 1986-05-13 |
Family
ID=16663433
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59214901A Pending JPS6194127A (en) | 1984-10-12 | 1984-10-12 | Protecting device for service interruption mode |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6194127A (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56118122A (en) * | 1980-02-21 | 1981-09-17 | Mitsubishi Electric Corp | Processing method of power failure in microcomputer system |
JPS57117194A (en) * | 1981-01-08 | 1982-07-21 | Nippon Denso Co Ltd | Protection method for data destruction of backup ram at power supply interruption of microcomputer system |
JPS59108126A (en) * | 1982-12-14 | 1984-06-22 | Canon Inc | Controlling circuit of electronic apparatus |
-
1984
- 1984-10-12 JP JP59214901A patent/JPS6194127A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56118122A (en) * | 1980-02-21 | 1981-09-17 | Mitsubishi Electric Corp | Processing method of power failure in microcomputer system |
JPS57117194A (en) * | 1981-01-08 | 1982-07-21 | Nippon Denso Co Ltd | Protection method for data destruction of backup ram at power supply interruption of microcomputer system |
JPS59108126A (en) * | 1982-12-14 | 1984-06-22 | Canon Inc | Controlling circuit of electronic apparatus |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR880701029A (en) | Electric circuit protection device and method | |
US4423477A (en) | Rectifier controller | |
US4346432A (en) | Rectifier controller responsive to sensed A.C. voltage signals | |
JPS6194127A (en) | Protecting device for service interruption mode | |
JPS5938824A (en) | Electric power supply controlling system | |
JPH05297992A (en) | Input circuit for programmable controller | |
JPH0345795B2 (en) | ||
KR930004365Y1 (en) | Power circuit | |
JPH02254968A (en) | Voltage detection system | |
JPS57117194A (en) | Protection method for data destruction of backup ram at power supply interruption of microcomputer system | |
JPS63180117A (en) | Processing system for power failure of computer system | |
JP2537920B2 (en) | System control circuit | |
JP2876581B2 (en) | Power supply | |
KR20000045990A (en) | Apparatus for controlling an inverter | |
JPS6125224A (en) | Power supply controller | |
JPH04117534A (en) | Supervisory unit for operating abnormality of computer equipment | |
JPH05130729A (en) | Method for controlling package power source | |
JPH10275020A (en) | Constant-voltage circuit | |
JPH099617A (en) | Device for short-circuit protection | |
JPS627332A (en) | Restarting system for power source unit | |
JPH0646526A (en) | Abnormality detecting method and system switching control method for semiconductor switch | |
JPH04302243A (en) | Automatic package state setting system | |
JPS6395514A (en) | Power supply switch controller | |
JPS63236114A (en) | Power supply control system | |
JPH02105624A (en) | Power source control circuit |