JPS6191743A - Control system of dedicated arithmetic device - Google Patents

Abstract

PURPOSE:To eliminate the input/output overhead between a central processor and a dedicated arithmetic device and to perform program processing by both devices in parallel by allowing the central processor and dedicated arithmetic device to share a main storage device. CONSTITUTION:The central processor 22 sets up a program to be executed and data in a main storage device 21, the dedicated arithmetic device 24 transfers information which indicates the location from the address converting mechanism 23 of the central processor 22 to the address converting mechanism 25 of the dedicated arithmetic device 24 and also supplies an execution start command to the dedicated device 24. The dedicated arithmetic device 24 also refers to the common main storage device 21 by an address converting mechanism 25 similar to that of the central processor 22 to eliminate the input/output overhead.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an electronic computer system, and in particular to a control method for sharing specific arithmetic functions using one or more dedicated arithmetic units. .

[Conventional technology]

FIG. 2A shows a typical conventional configuration of an electronic computer system having a dedicated arithmetic unit such as an array-dedicated arithmetic unit. In the figure, (1) is the main memory, (2)
is the central processing unit on the host side, (3) is the input/output control unit,
(4) is connected to the central processing unit (
2) A dedicated arithmetic unit connected to the dedicated arithmetic unit (
4) has a storage section (5) and an arithmetic section (6).

FIG. 2(B) is a functional block diagram of the above system.
(7) shows the functional system on the central processing unit (2) side, and (13
) indicates the functional system on the dedicated arithmetic unit (4) side. In the central processing unit system (7), (8) is a control program, (9
) is the interface with the dedicated arithmetic unit (4), (lO
) is an application program executed on the central processing unit (2), (11) is an application program executed on the dedicated arithmetic unit (4), and (12) is an application program that executes on the dedicated arithmetic unit (4). This is an inlet/outlet cutter for exchange. In addition, in the dedicated arithmetic unit system (13), (14) is a control program, (15) is an application program that runs on the dedicated arithmetic unit (4), and (16) is an input/output buffer (12) that is a human output buffer corresponding to K. It is.

As will become clear in the following explanation, the application program (1
5) is a copy of the application program (11).

Next, the operation will be explained. The application program (10) that has started running on the central processing unit (2) first runs the application program (11) stored in the main memory (1) on the dedicated arithmetic unit (
4) and the copy of the application program (15
) is stored in the storage unit (5). Next, prepare the calculation data in the input/output buffer (12) and transfer it to the input/output buffer (12).
16). The control program (14) of the dedicated arithmetic unit (4) starts execution of the application program (15) upon receiving the arithmetic data. Dedicated computing device (
When the arithmetic processing in 4) is completed, the human output buffer (1
6) The calculation result data stored in the input/output buffer (
12) Returned to 1 application program (lO)
The completion of the operation is reported for .

[Problem that the invention seeks to solve]

In the conventional control method as described above, a dedicated arithmetic unit (4)
It is necessary to transfer the application program (11) and calculation data from the central processing unit (2) before executing the calculation, and to send the calculation result data back to the central processing unit (2) upon completion of the calculation. This data transfer time is a large overhead and reduces the efficiency of the system. In addition, the interface (9) became complicated due to the above-mentioned data transfer, and the program (10) was not easy to write.

This invention was made in view of the above-mentioned conventional problems, and its purpose is to reduce the input/output overhead between the central processing unit and the dedicated arithmetic unit by sharing the main storage unit. Another object of the present invention is to provide a control system for a dedicated arithmetic unit that allows both units to process their respective programs in parallel.

[Means for solving problems]

In this invention, the dedicated arithmetic unit is provided with an address translation mechanism similar to the address translation mechanism used when the central processing unit accesses the main memory, so that the dedicated arithmetic unit can directly access the main memory. It is composed of After the central processing unit prepares the program and data to be executed by the dedicated arithmetic unit in the main memory,
Information indicating its location is transferred from the address translation mechanism of the central processing unit to the address translation mechanism of the dedicated arithmetic unit, and an execution start command is given to the dedicated arithmetic unit. Upon receiving this instruction, the dedicated arithmetic unit accesses the main memory in parallel with the central processing unit, and executes the program according to the data.

[Effect]

In the above control method, the dedicated arithmetic unit can immediately execute the program by simply transferring information indicating the location of the program and data, and there is no need to transfer the arithmetic result data. The central processing unit can execute program processing even while the dedicated arithmetic unit is performing arithmetic processing.

〔Example〕

゛ Fig. 1(A) shows an example of the configuration of an electronic computer system to which the control method of the present invention is applied. As shown in the figure, a central processing unit (22) and a dedicated arithmetic unit (24) are commonly connected to a main storage device (21).
2) has an address conversion mechanism (23) used when accessing the main memory (21), and a similar address conversion mechanism (25) is provided in the dedicated arithmetic unit (24). The dedicated arithmetic unit (24) can directly access the main memory (2, 1) via this address translation mechanism (25).

FIG. 2(B) is a functional block diagram corresponding to the above configuration, where (26) shows the functional system on the central processing unit (22) side, and (31) shows the functional system on the dedicated arithmetic unit (24) side. shows.

In the central processing unit system (26), (27) is a control program, (28) is an application program running on the central processing unit (22), (29) is an application program running on the dedicated arithmetic unit (24), and (30) is an application program running on the dedicated arithmetic unit (24). ) is calculation data. The application program (28), the application program (29), and the calculation data (30) are created as one program execution module. In addition, in the dedicated arithmetic unit system (31),
(32) is a program running on the dedicated arithmetic unit (24),
(33) indicates calculation data. The entities of program (32) and data (33) are program (29) and data (3).
0).

Only one set of these programs and data exists on the main storage device (21).

Next, the operation will be explained. Now the program (28) starts running on the central processing unit (22), and the calculation data (30
), an instruction to start execution of the dedicated arithmetic unit (24) is issued. Then, the contents of the address conversion mechanism (23) in the central processing unit (22) are converted to the dedicated arithmetic unit (24).
The address conversion mechanism (25) on the side is activated, and a command to start executing the program (29), that is, the program (32) is transmitted to the dedicated arithmetic unit (24).

On the other hand, the control program (27) of the central processing unit (22)
The start of program (29), ie, program (32), is also notified. The control program (27) waits for the program execution modules (28) (29) (30) (
Waiting for processing by the processing unit (24) for Tsuma-shi,
Central processing unit e (22)
Start above. At this time, the contents of the address translation mechanism (23) are rewritten for the new program.

In the dedicated arithmetic unit (24), it is possible to execute the siprogram (32) and access the data (33) based on the copied contents of the address translation mechanism (25). Eventually, when the calculations of the dedicated processing unit fi (24) are completed and all the results are set as data (33), an interrupt is transmitted to the central processing unit (22), and the program execution module (2g) (29) (ao ) is released from the processing waiting state, and the processing of program (28) can be resumed.

In the above embodiment, a control program was not provided on the dedicated arithmetic unit (24) side, but the content setting of the address translation mechanism from the central processing unit to the dedicated arithmetic unit and the execution start operation of the program (32) were provided. It may also be configured to be performed with the help of a control program on the dedicated arithmetic unit side. In that case, the hardware for exchanging control between the two devices is simplified.

In addition, as a modification of the above embodiment, a dedicated arithmetic unit (24)
When starting the program (32) on the central processing unit (22) side, the program (28) continues to run without entering a standby state, and the program (28) continues running the program (28) on the central processing unit (22) side.
It is also possible to synchronize the execution of both programs (28) and (32) when a request to wait for the completion of processing on the 4) side is issued.

In addition, as a method of implementing the address translation mechanism, the address translation table that is the substance of the mechanism is placed on the main memory, and the content transmitted from the central processing unit to the dedicated arithmetic unit is the pointer value to the above translation table. It is also possible to do only one.

〔Effect of the invention〕

As described in detail above, in the present invention, the dedicated arithmetic unit also references the common main storage device using the same address translation mechanism as the central processing unit, so input/output overhead can be eliminated. In addition, since the content of the address translation mechanism is copied prior to execution of processing by the dedicated processing unit, while the dedicated processing unit is running,
In parallel, the central processing unit can update the contents of the address translation mechanism and run another program execution module.

[Brief explanation of the drawing]

Figures 1 (A) and (B) are hardware configuration diagrams and functional block diagrams of a computer system to which the control method of the present invention is applied, and Figures 2 (A) and (B) are hardware configuration diagrams and functional block diagrams of a conventional system. In Figure 0, which is its functional block diagram, (21) is the main memory, (22) is the central processing unit, (23) is the address conversion mechanism, (24) is the dedicated arithmetic unit, and (25) is the address conversion mechanism. be. Agent Patent Attorney Masuo Oiwa (Ison≠Tsuta 2 Yu) Figure 1 (A) (B) Figure 2 (A) (B)

Claims (1)

[Claims] (1) The dedicated arithmetic unit is provided with an address translation mechanism similar to the address translation mechanism used when the central processing unit accesses the main memory, through which the dedicated arithmetic and device can directly access the main memory. After the central processing unit prepares the program and data to be executed by the dedicated arithmetic unit in the main storage device, information indicating the location thereof is transferred from the address conversion mechanism of the central processing unit to the dedicated processing unit. Transferring the address to the address conversion mechanism of the arithmetic unit and giving an execution start command to the dedicated arithmetic unit,
In response to this, the dedicated processing unit accesses the main storage device in parallel with the central processing unit, and executes the program according to the data.