JPS6185888A - Wire circuit board - Google Patents

Wire circuit board

Info

Publication number
JPS6185888A
JPS6185888A JP20919784A JP20919784A JPS6185888A JP S6185888 A JPS6185888 A JP S6185888A JP 20919784 A JP20919784 A JP 20919784A JP 20919784 A JP20919784 A JP 20919784A JP S6185888 A JPS6185888 A JP S6185888A
Authority
JP
Japan
Prior art keywords
circuit board
etching
wiring pattern
printed circuit
etching resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20919784A
Other languages
Japanese (ja)
Inventor
志野 勝英
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP20919784A priority Critical patent/JPS6185888A/en
Publication of JPS6185888A publication Critical patent/JPS6185888A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 く技術分野〉 本発明は、表示部の電極パターンと、配線回路基板の配
線パターンとを1枚の透明絶縁基板上の透明導電膜をエ
ツチング処理することにより形成する配線回路基板に関
するものである。
Detailed Description of the Invention [Technical Field] The present invention relates to a wiring method in which an electrode pattern of a display section and a wiring pattern of a printed circuit board are formed by etching a transparent conductive film on a single transparent insulating substrate. It relates to circuit boards.

〈従来技術〉 従来、電卓等において配線回路基板と表示部は別個に形
成され、さらにフレキシブル基板などの接続手段により
連結させていた。このような構成では配線回路基板の配
線パターンと表示部の表示電極を別個に形成するため2
度手間になり、さらに接続手段も設けなくてはならない
という欠点がある。
<Prior Art> Conventionally, in calculators and the like, a printed circuit board and a display section have been formed separately, and further connected by a connecting means such as a flexible board. In such a configuration, since the wiring pattern of the printed circuit board and the display electrode of the display section are formed separately, two
This method has disadvantages in that it is time consuming and requires additional connection means.

そこでこの欠点を解消するために、配線回路基板の配線
パターンと表示部の表示電極パターンとを一枚の透明絶
縁基板上に形成する方法が提案されている。
In order to overcome this drawback, a method has been proposed in which the wiring pattern of the printed circuit board and the display electrode pattern of the display section are formed on a single transparent insulating substrate.

この方法は第2図(イ)乃至(=)に示す様に、プラス
チックあるいはガラス等の透明絶縁基&1に蒸着スパッ
タ法にて透明導電膜2を形成しくイ)、該透明導電膜2
上にエツチングレジスト3にて配線パターンを形成した
のち(ロ)、エツチング処理うに形成することでパター
ン形成が1回ですみ、接続手段も設ける必要がなくなる
In this method, as shown in FIG. 2 (a) to (=), a transparent conductive film 2 is formed on a transparent insulating base such as plastic or glass by a vapor deposition sputtering method.
After a wiring pattern is formed on the etching resist 3 (b), etching is performed to form the wiring pattern, so that pattern formation can be performed only once, and there is no need to provide connection means.

しかしこの方法で形成した配線回路基板においても、透
明導電膜2をエツチング処理によってパターン形成した
透明電極が表面に表われているために傷付き易く、(特
にプラスチック基板の場合)信頼性の低下の要因となっ
ている。
However, even in the printed circuit board formed by this method, the transparent electrodes patterned by etching the transparent conductive film 2 are exposed on the surface, so they are easily scratched (particularly in the case of a plastic board), resulting in a decrease in reliability. This is a contributing factor.

また透明電極だけでは抵抗値が高いので、透明性を必要
とする表示部以外の配線パターン上には、別途金属によ
る被覆を施して抵抗値を低くさせる必要がある。このた
め工程の複雑化を招き、コスト高になるという欠点があ
る。
Further, since the resistance value is high when using only the transparent electrode, it is necessary to separately apply a metal coating to the wiring pattern other than the display portion that requires transparency to lower the resistance value. This has the drawback of complicating the process and increasing costs.

〈発明の目的〉 本発明は従来の欠点に鑑みてなされたもので、少なくと
も回路配線パターンの方を導電性のエツチングレジスト
にて形成し、エツチング処理後、表示部のtFMパター
ン上のエツチングレジストのみ除去することにより、耐
久性、耐腐食性に優れ、且つ安価に得られる配線回路基
板の提供を目的とする。
<Objective of the Invention> The present invention has been made in view of the drawbacks of the conventional art.At least the circuit wiring pattern is formed with a conductive etching resist, and after etching, only the etching resist on the tFM pattern of the display area is etched. The purpose is to provide a printed circuit board that has excellent durability and corrosion resistance and can be obtained at low cost by removing the metal.

〈実施例〉 以下図に基づいて本発明の詳細な説明する。<Example> The present invention will be described in detail below based on the figures.

第1図(イ)乃至(=)は本発明の配線回路基板の形成
方法を説明する図である。
FIGS. 1A to 1B are diagrams illustrating a method for forming a printed circuit board according to the present invention.

プラスチック或はガラス等の透明絶縁基板1に蒸着スパ
ッタ法にて透明電導膜2を形成しくイ)、該透明絶縁基
板1の透明性を必要としない配線回路部分はたとえばカ
ーホンペースト等に接着剤を混入させてなる導電性エツ
チングレジスト4にて、また透明性を必要とする表示部
の電極は通常のエツチングレジスト3にて順次印刷等の
方法により導電性エツチングレジスト4は、保護膜およ
び抵抗値を低くするための導電物として残し、透明性を
必要とする表示部の!極のエツチングレジスト3だけを
除去するようにしてい評 かかる配線回路基板によれば、配線回路部分は導電性エ
ツチングレジストが被覆しであるために、配線回路部分
の透明電極は保護され、耐久性、耐腐食性が向上する。
A transparent conductive film 2 is formed on a transparent insulating substrate 1 made of plastic or glass by vapor deposition sputtering.b) The wiring circuit portion of the transparent insulating substrate 1 that does not require transparency is coated with an adhesive such as carphone paste. The conductive etching resist 4 is coated with a protective film and resistance value by sequential printing or other methods for the electrodes of the display section that require transparency. of the display area that requires transparency, leaving it as a conductive material to lower the! According to the wired circuit board which has been evaluated by removing only the electrode etching resist 3, since the wired circuit portion is covered with a conductive etching resist, the transparent electrode of the wired circuit portion is protected and durability is improved. Improves corrosion resistance.

さらに新たな金属を被覆しなくても低抵抗となシ、部品
取り付けも直接でき、圧着も容易にできる。よって工程
の簡略化、コストダウンを達成できる。
Furthermore, it has low resistance without having to cover it with new metal, and parts can be attached directly and crimped easily. Therefore, process simplification and cost reduction can be achieved.

尚透明性を必要とする表示部の電極形成に導電性エツチ
ングレジストを使用することもできる。
Incidentally, a conductive etching resist can also be used to form electrodes in a display section that requires transparency.

〈発明の効果〉 以上のように本発明は、表示部の電極パターンと配線回
路基板の配線パターンを1枚の透明基板上に形成する際
に、少なくとも配線回路基板の配線パターンの方は導電
性のエツチングレジストにて形成し、エツチング処理後
、表示部の電極パターン上のエツチングレジストのみを
除去したので、配線回路基板の配線パターンは保護され
るために、耐久性、耐腐食性が向上し、新たに金属被覆
しなくても低抵抗となり、部品数シ付けも直接でき、圧
着も容易にできるため、工程の簡略化、コストダウンに
大きく貢献することができる。
<Effects of the Invention> As described above, in the present invention, when forming the electrode pattern of the display section and the wiring pattern of the printed circuit board on one transparent substrate, at least the wiring pattern of the printed circuit board is conductive. After the etching process, only the etching resist on the electrode pattern of the display area was removed, so the wiring pattern on the printed circuit board was protected, improving durability and corrosion resistance. It has low resistance without the need for new metal coating, can be directly attached to several parts, and can be easily crimped, making it possible to greatly contribute to process simplification and cost reduction.

【図面の簡単な説明】[Brief explanation of drawings]

癩 来の配線回路基板の形成方式を示す図である。 1ニブラスチツク或はガラス等の絶縁基板、2:透明導
電膜、3:通常のエツチングレジスト、4:導電性エツ
チングレジスト。
1 is a diagram showing a method of forming a conventional printed circuit board; FIG. 1: An insulating substrate such as a niblast stick or glass, 2: A transparent conductive film, 3: A normal etching resist, and 4: A conductive etching resist.

Claims (1)

【特許請求の範囲】 1、1枚の透明絶縁基板上に透明導電膜をエッチングし
て表示部の電極パターンと、配線回路基板の配線パター
ンを形成する配線回路基板において、 少なくとも前記配線回路基板の配線パターンの方は導電
性のエッチングレジストにて形成し、エッチング処理後
、前記表示部の電極パターン上のエッチングレジストの
みを除去したことを特徴とする配線回路基板。
[Scope of Claims] 1. A wired circuit board in which an electrode pattern of a display portion and a wiring pattern of a wired circuit board are formed by etching a transparent conductive film on one transparent insulating substrate, at least a portion of the wired circuit board. 1. A printed circuit board, characterized in that the wiring pattern is formed of a conductive etching resist, and after etching treatment, only the etching resist on the electrode pattern of the display section is removed.
JP20919784A 1984-10-03 1984-10-03 Wire circuit board Pending JPS6185888A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20919784A JPS6185888A (en) 1984-10-03 1984-10-03 Wire circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20919784A JPS6185888A (en) 1984-10-03 1984-10-03 Wire circuit board

Publications (1)

Publication Number Publication Date
JPS6185888A true JPS6185888A (en) 1986-05-01

Family

ID=16568957

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20919784A Pending JPS6185888A (en) 1984-10-03 1984-10-03 Wire circuit board

Country Status (1)

Country Link
JP (1) JPS6185888A (en)

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