JPS6184872A - Superlattice semiconductor device - Google Patents

Abstract

PURPOSE:To enable the effective injection of electrodes and holes during injection to the superlattice, by a method wherein a layer which does not reflect electrons or holes in quantum mechanics meaning is arranged between the superlattice and an electrode. CONSTITUTION:A transition region 21 as a quantum-mechanical reflection-free layer to electrons or holes is provided between the superlattice 1 and a homogeneous semiconductor 2. The transition region 21 is a part surrounded by boundaries 17 and 18: the potential level Vo' of the conduction band end 19 of the semiconductor at this part is lower than the potential level Vo of the superlattice, and the period of the conduction band end 19 is so determined as to be equal to that of the superlattice. The discontinuity of mini-band structure is eliminated between the superlattice 1 and the homogeneous semiconductor 2 by arranging the reflection-free layer 21 of such construction between the superlattice 1 and the semiconductor 2. As a result, the quantum-mechanical reflection of electrons which has been generated at the interface between the superlattice 1 and the semiconductor 2 is markedly alleviated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a superlattice semiconductor device that can efficiently inject electrons into a superlattice.

[Prior Art] Conventionally, superlattice semiconductor devices have been constructed as shown in Figure 2, in which ultrathin layers of two types of semiconductors with different properties are used to create a step in hand edge energy. Homogeneous semiconductors 2 and 3 are arranged on both sides of the superlattice l formed by alternately stacking them in the stacking direction, and these semiconductors 2 and 3 are
A negative electrode 14+4 and an anode 5 are arranged on the outer surface of the electrode.

6 and 7 are rieet wires connected to these electrodes 4 and 5.

Here, electrons are directly injected into the superlattice l from the homogeneous semiconductor 2. In that case, electrons cause quantum mechanical reflection at the interface between superlattice l and homogeneous semiconductor 2, so
It was difficult to inject enough electrons, and the injection efficiency was not high enough.

The reflection during electron injection will be briefly described in detail below. FIG. 3 is an energy diagram of the superlattice semiconductor device shown in FIG. Here, <the tooth-shaped broken line 11 represents the conduction band edge of the semiconductor constituting the superlattice 1, and its potential is V
o. Straight lines 12 and 13 represent the conduction bands of homogeneous semiconductors 2 and 3, respectively.6 Energy band 14 represents the first
The mini conduction band, energy band 15, is the first mini forbidden band. Electrons in the mini conduction band 14 can freely move within the superlattice 1, and electrons in the mini forbidden band 15 immediately
It will attenuate.

Let us now consider injecting electrons from a homogeneous region of the semiconductor 2 toward the superlattice 1. Energy Ve of electron e
is selected to correspond to the first conduction band 14 as shown in FIG. Once the electrons enter the first conduction band 14, they can freely move to the right as described above. However, the homogeneous semiconductor 2 and the superlattice 1 have significantly different energetic environments for electrons, as shown in FIG. In such a case, even if the energy Ve of the electron 8 to be introduced is in the first conduction band 1
4, it is understood from quantum mechanics that electrons are reflected at the boundary 16.

In this way, when injecting electrons into a superlattice, even if electrons with a certain energy can exist in the superlattice, such electrons do not necessarily enter the superlattice efficiently, and in reality, 1 According to the simulations conducted by the present inventors, complete reflection of electrons was easily achieved, but the efficiency of transmission was low.

[Objective] Therefore, an object of the present invention is to provide a semiconductor device that can efficiently inject electrons and holes into the superlattice.

[Structure of the Invention] In order to achieve the above object, in the present invention, a quantum mechanical anti-reflection coating is applied between the superlattice and the homogeneous semiconductor.

In other words, it is a superlattice that has a superlattice made by alternately stacking ultrathin layers of two types of semiconductors that can create steps in bunt edge energy, and electrodes placed at both ends of the superlattice in the stacking direction. This semiconductor device is characterized in that a layer that quantum mechanically does not reflect electrons or holes is disposed between a superlattice and an electrode.

[Example] The present invention will be described in detail below with reference to the drawings.

FIG. 1 shows an embodiment of the superlattice semiconductor device of the present invention, in which the same parts as in FIG. 2 are denoted by the same reference numerals, and the details thereof will be omitted here.

In the present invention, a transition region 21 is provided between the superlattice 1 and the homogeneous semiconductor 2 as a quantum mechanical non-reflection layer for electrons or holes.

The Boo reflective layer 21 is constructed so that its energy level has a distribution as shown in FIG. That is, the transition region 21 is a region surrounded by boundaries 17 and 18, and the potential level V of the conduction band edge 18 of the semiconductor in this region is
o' is lower than the superlattice potential level Va,
In addition, the period of the conduction band edge 19 is set to be equal to the period of the superlattice 1.

By arranging the anti-reflection layer 21 having such a configuration between the superlattice l and the homogeneous semiconductor 2, the discontinuity of the mini-band structure between the superlattice l and the homogeneous semiconductor 2 is eliminated, and as a result, In the configuration shown in FIG. 2, the quantum mechanical reflection of electrons occurring at the interface 1B between the superlattice 1 and the homogeneous semiconductor 2 is significantly reduced.

The transition region 21 shown in FIG.
Although the structure has only one potential peak, it is clear that electrons can be guided to the superlattice 1 more efficiently by increasing the number of potential peaks to two or more.

FIG. 5 shows a potential diagram of an example of such a structure. In FIG. 5, the transition region 21 has the same period as the superlattice 1, and only the potential height is gradually increased from left to right. It has a structure that smoothly connects the homogeneous semiconductor 2 and the superlattice 1.

In the structure shown in FIG. 5, the height of the energy peak is changed sequentially, but it is clear that a similar non-reflective layer can also be obtained with the structures shown in FIGS. 6 and 7.

That is, in the structure of FIG. 6, the height of the potential peak in the transition region 22 is the same as the height of the potential peak in the superlattice 1, but the width of the peak is increased sequentially from the electron injection side to make it smooth. Connect to the region of superlattice l.

In the structure shown in FIG. 7, the quality and width of the potential peak in the transition region 23 are simultaneously gradually increased and smoothly connected to the region of the superlattice 1.

In the example shown in FIG. 8, the period of the ridges in the transition area 24 is sequentially changed, and the height of each ridge is also sequentially changed. Such a structure is also effective in making a smooth connection between the homogeneous semiconductor 2 and the superlattice l.

In the example shown in FIG. 3, a slope potential 26 is provided in a part of the potential structure of the 11 transition region 25, and the slope potential 26 has a potential mountain structure 27 as shown in FIGS. 5 to 8. ffi to the opposite slope
The homogeneous semiconductor 2 and the superlattice 1 are smoothly connected by folding them and making them continuous.

By the way, the applicant had previously filed Japanese Patent Application No. 58-138171.
In "Semiconductor Device", a semiconductor device having a modulated superlattice structure in which the structure determining parameters are monotonically changed in the direction of the v1 layer of the superlattice was proposed, but by using the present invention in combination with such a semiconductor device, Current-voltage characteristics due to the modulated superlattice can be greatly improved. Examples are shown below.

In FIGS. 10(A), (B), and (C), the modulated superlattice 10
In FIG. 1θ (A) showing a superlattice semiconductor device in which a modulated superlattice 41 of the type shown in FIG. Similar to the superlattice 10, the potential of the superlattice 41 can be designed as shown in FIG. 10(C). In other words, the modulated superlattice 41 has the structure shown in FIG.
As shown in B) and (C), the step difference in the band 9 edge energy of each layer 41a and 41b at the position adjacent to the modulated superlattice lO, the 1 of each ff pair of 41a and 41b
7. It is configured in the form of a modulated superlattice such that the film thickness ratio within one period is similar to that of the modulated superlattice IO. At the same time, at a position adjacent to the homogeneous semiconductor 2, the step in the hand edge energy of 41a and 41b of each layer pair is made small so that it is similar to the hand edge energy 2' of the homogeneous semiconductor 2. The structure is such that the difference in punt edge energy becomes similar to the hand edge energy on the superlattice 10 side as it approaches 10. Furthermore, the electric field required to generate a nonlinear current-voltage characteristic in the modulating superlattice 41 can be designed to be higher than the electric field for the modulating superlattice 10. Therefore, the nonlinearity in this device can be designed to be caused exclusively by the nonlinearity in the modulated superlattice 10, iI! In the 1Mi lattice, due to the potential distribution in Figure 1O (C), miniband 4
4. Since it is thought that a minicap 45 is formed, the discontinuity of the miniband structure between the modulated superlattice 10 and the homogeneous semiconductor 2 is eliminated, and as a result, the discontinuity of the miniband structure between the modulated superlattice 10 and the homogeneous semiconductor 2 is eliminated. Quantum mechanical reflection of electrons occurring at the interface is significantly reduced, and the difference between the current value when the device conducts current and the current value when negative resistance occurs can be made larger.

In this case, the modulating superlattice 41 is:1 for the superlattice 10
This is the introductory part of the mechanical non-reflection. Note that the modulation superlattice 41, which is the non-reflection introduction part, is shown with only 7 layers due to space limitations; however, depending on the required electrical characteristics, it may be more than 7 layers, or even 1 layer or 2R. It is possible to obtain the effect of the introduction part. Figure 11 (A), (B)
, (C:) shows the modulated superlattice 41 of FIG.
Instead, a modulated superlattice 52 consisting of a slope-shaped semiconductor 51 whose composition is gradually changed and a layer pair 52a and 52b whose hand edge energy steps are gradually changed like the superlattice 41 is used. In FIGS. 11(A) and 11(13), which show semiconductor devices arranged adjacent to the lattice IO, the slope-shaped semiconductor 51 has a hunt edge energy 2' of the homogeneous semiconductor 2 adjacent to it, and its to have similar Hunt Edge energy at the interface, and to have a Hunt Edge cloud energy similar to the energy at the lower end of the mini-band of each layer pair 52a and 52b of the modulating superlattice 52 at the interface with the modulating superlattice 52. Configure it to have . The slope-like potential is indicated by reference numeral 55 in FIG. 1I (CG), and the modulating superlattice 52 is constructed such that the design parameters at both ends thereof are similar to the slope-like semiconductor 51 and the modulating superlattice lO, respectively. That is, the modulation superlattice 52
As shown in Figures 1 (B) and (C), a modulated superlattice 10
The difference in /hento-engineering energy of each layer 52a and 52b at a position adjacent to , the thickness of each layer pair, and the film thickness ratio within one period are made similar to that of the modulated superlattice 10,
At the same time, the same effect as the composite modified 258 lattice structure shown in FIG. It can be a quantum mechanical non-reflective introduction.

Due to the potential distribution in this example, Fig. 11 (C)
As shown in FIG. 2, a mini-band 56 and a mini-gap 57 are formed extending from a portion of the slope-like potential 55 to the superlattices 52 and 10.

In exactly the same way, the superlattice 41 of FIGS. 10(A) to (C) may be replaced by a superlattice modulated in the form of FIG.
Figure 12 (A) shows its configuration and potential.
, (B), where 61 is a superlattice modulated in the form shown in FIG. 6, and each pair of layers 81a and 81
Consists of b. By changing the ratio of the film thicknesses of each layer [11a and 81b, a potential 62 as shown in FIG. 12(B) is formed. In Figure 12 (8), 6
3 is a mini l<throat, and 64 is a mini gap. Furthermore, instead of the superlattice 41 in FIG. 10(A),
A superlattice having a configuration similar to the modulation superlattice disclosed in No. 138171 can also be used.

FIG. 13 shows an embodiment of the superlattice semiconductor device of the present invention in which a semiconductor layer 70 having a uniform composition is disposed between the non-reflection layer 41 and the homogeneous semiconductor 2 in the semiconductor device of FIG. 10(A).

Similarly, FIG. 14 shows an embodiment of the present invention in which a semiconductor 70 having a uniform composition is placed between the non-reflective layer and the homogeneous conductor 2 in FIG. 11(A), and FIG. A modulated superlattice 41 is used, and in FIG. 14, a slope-shaped semiconductor 51 and a modified iA superlattice 52 are used. By arranging the modulated superlattice 41 or the sloped semiconductor 51 and the modulated superlattice 52 between the uniform semiconductor 70 and the modulated superlattice 10, it is possible to increase the difference in current value generated by negative resistance. . In these examples, these portions 41 or 5
1 and 52 are configured such that the adjacency condition for the uniform semiconductor 70 and the modulated superlattice 10 is satisfied.

Further, even in the composite modulated superlattice structure provided with the non-reflection introducing portion shown in FIG. 13 or 14, the modulated superlattice 10
This can be achieved by using a modulated superlattice having the structure described in Japanese Patent Application No. 138171/1982.

Yet again. The modulation superlattice shown in FIG. 5 or N47 or FIG. 8 may be used instead of the modulation superlattice 41 or 52 which is the non-reflection introduction part in FIG. When the ahMJ grating is used as the non-reflection introduction layer 22, the film thickness within one period at the end of the modulation superlattice 22 of the non-reflection introduction portion is a condition for connection with the adjacent homogeneous semiconductor 2 or the uniform semiconductor 70. The ratio is such that the thickness of a film with the same band-edge energy as an adjacent homogeneous or uniform semiconductor is sufficiently greater than the thickness of a film with a different hand-0 edge energy than an adjacent homogeneous or uniform semiconductor. For example, in Figure 12 (B
) is constructed in the same way as the potential 62.

Note that the transition region 21 to 25, 41°51.1 of the structure described above (1 suppresses reflection of electrons, and transfers electrons to superlattice 1.1
0 will become more precisely clear when the Schrödinger equation, which describes the behavior of electrons, is solved under the potential structure.

151A(A)-(C) show three examples of computer simulation results of such calculations.

The left side of Figures 15 (A) to (C) shows the Bote/Noyal diagram of the superlattice and a schematic diagram of the minipat/minigap, and the right side shows the electrons in such a superlattice potential. The reflection coefficient when incident from the left side is plotted against the electron energy.

FIG. 15(A) shows the reflection coefficient at the boundary 1B of the conventional structure without transition region shown in FIG. 2 as a function of electron energy Ve. s:fS15(B) and (C) show
The reflection coefficients are shown for the boundary 17 of structures with transition regions 21 and 25 as shown in FIGS. 5 and 9, respectively.

As shown in Figure 15 (A), even if an electron enters a perfect superlattice from the left side, due to quantum mechanical reflection, the electron
Only about %: iSl does not enter the mini putt,
On the other hand, if we use the modulated superlattice potential as shown in :fSIS diagram (El) or (C), the first
If the reflection from the mini-pat is close to zero, most electron beams can be predynamically transmitted. Therefore, the non-reflection introduced portion by the modulated superlattice is extremely effective for electron injection and transmission, and can increase the difference in current value in the current-voltage characteristics, and can significantly improve injection efficiency.

Although the present invention has been described above with respect to the case where electrons are injected into the superlattice, the present invention is not limited to this only, and is also effective when applied to the case where holes are injected into the superlattice. Of course.

[Effects] As is clear from the above, according to the present invention, electrons and holes can be efficiently introduced into the superlattice.
The characteristics of the lattice semiconductor device are significantly improved, and therefore the performance of the ultra-high frequency amplifier 1 oscillator is also dramatically improved. Therefore, the superlattice semiconductor device of the present invention has great effects when used in various devices such as communication and information processing.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the present invention, fiS2 is a schematic block diagram of a conventional superlattice semiconductor device, Fig. 3 is a schematic diagram thereof, and Fig. 4 is a superlattice semiconductor of the present invention shown in Fig. 1. Potential diagrams of the device, Figures 5 to 9 are potential diagrams showing the structure of the anti-reflection layer in other examples of the present invention, Figure 1.
0 (A) is a block diagram showing an embodiment of another form fS of the present invention, FIG. 10 (B) is a block diagram showing details of the structure of the non-reflection layer, and FIG. 10 (C) is its potential. FIG. 11(A) is a configuration diagram showing still another embodiment of the present invention.
Figure 1 (B) is a configuration diagram showing details of the configuration of the non-reflection layer,
Figure 1t (C) is its potential diagram, Figure 12 (A)
FIG. 3 is a configuration diagram showing still another example of the non-reflection layer in the present invention. FIG. 12(B) is a potential diagram thereof, FIGS. 13 and 14 are block diagrams showing still another 2″A embodiment of the present invention, and FIGS. 15(A), (B) and (C) are It is a diagram showing the results obtained by computer simulation of the relationship between the potential and the reflection coefficient-electron energy in the non-reflection layer of the conventional and superlattice semiconductor devices according to the present invention 11. 1... Superlattice. 2. 3... Homogeneous semiconductor. 4.5... Electrode, 6.7... Lead wire, 10... Modulation superlattice, 21-25... Non-reflection FF+ (transition region) Sato
Takashi,” 1st Zuden Hanhan 10man 2nd Zuden vi
Electrical type η Dimensions Figure 6 Figure 8 Figure 9 Inside the office

Claims (1)

[Claims] 1) A superlattice formed by alternately stacking ultrathin layers of two types of semiconductors capable of creating a step in hand edge energy, and a superlattice formed at both ends of the superlattice in the stacking direction. A superlattice semiconductor device having arranged electrodes, characterized in that a layer which is quantum mechanically non-reflective to electrons or holes is arranged between the superlattice and the electrodes. Device. 2) The superlattice semiconductor device according to claim 1, wherein the non-reflective layer approaches the structure on the non-reflective layer side of the superlattice as it approaches the superlattice. 3) The superlattice semiconductor device according to claim 1, wherein the non-reflective layer is a single layer having a potential intermediate between the two types of semiconductors. 4) A patent claim characterized in that the non-reflective layer is composed of a plurality of layers having mutually different potentials intermediate between the two types of semiconductors and successively changing between the electrode and the superlattice. The superlattice semiconductor according to item 1. 5) The non-reflective layer is characterized by comprising a plurality of layers having an equal potential intermediate between the two types of semiconductors and having thicknesses that are successively changed between the electrode and the superlattice. A superlattice semiconductor device according to claim 1. 6) The superlattice semiconductor device according to claim 4, wherein the thickness of each of the plurality of layers is sequentially changed between the electrode and the superlattice. 7) The superlattice semiconductor according to any one of Items 1 to 6, wherein the non-reflective layer has a portion between it and the electrode where the composition changes in a slope shape in the stacking direction. Device. 8) The superlattice semiconductor device according to any one of claims 1 to 7, wherein the compositions of the plurality of layers change in a slope in the stacking direction. 9) The superlattice semiconductor device according to any one of claims 1 to 8, characterized in that a homogeneous semiconductor portion is disposed between the non-reflective layer and the electrode. 10) The superlattice semiconductor device according to claim 9, characterized in that a semiconductor portion having a uniform composition is disposed between the non-reflective layer and the homogeneous semiconductor portion. 11) The superlattice is a modulated superlattice in which parameters for determining its structure are monotonically changed in the stacking direction, according to any one of claims 1 to 10. The superlattice semiconductor device described above.