JPS6184760A - 信号処理回路 - Google Patents

信号処理回路

Info

Publication number
JPS6184760A
JPS6184760A JP59206812A JP20681284A JPS6184760A JP S6184760 A JPS6184760 A JP S6184760A JP 59206812 A JP59206812 A JP 59206812A JP 20681284 A JP20681284 A JP 20681284A JP S6184760 A JPS6184760 A JP S6184760A
Authority
JP
Japan
Prior art keywords
output
signal processing
input
information
processing circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59206812A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0443305B2 (cs
Inventor
Yoshio Sasajima
笹島　喜雄
Hiroshi Usukura
臼倉　博
Hiroshi Tachikawa
寛 太刀川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Signal Co Ltd
Original Assignee
Nippon Signal Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Signal Co Ltd filed Critical Nippon Signal Co Ltd
Priority to JP59206812A priority Critical patent/JPS6184760A/ja
Publication of JPS6184760A publication Critical patent/JPS6184760A/ja
Publication of JPH0443305B2 publication Critical patent/JPH0443305B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP59206812A 1984-10-02 1984-10-02 信号処理回路 Granted JPS6184760A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59206812A JPS6184760A (ja) 1984-10-02 1984-10-02 信号処理回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59206812A JPS6184760A (ja) 1984-10-02 1984-10-02 信号処理回路

Publications (2)

Publication Number Publication Date
JPS6184760A true JPS6184760A (ja) 1986-04-30
JPH0443305B2 JPH0443305B2 (cs) 1992-07-16

Family

ID=16529494

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59206812A Granted JPS6184760A (ja) 1984-10-02 1984-10-02 信号処理回路

Country Status (1)

Country Link
JP (1) JPS6184760A (cs)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50113315U (cs) * 1974-02-27 1975-09-16
JPS57189041U (cs) * 1981-05-28 1982-11-30

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50113315U (cs) * 1974-02-27 1975-09-16
JPS57189041U (cs) * 1981-05-28 1982-11-30

Also Published As

Publication number Publication date
JPH0443305B2 (cs) 1992-07-16

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees