JPS6183336U - - Google Patents

Info

Publication number
JPS6183336U
JPS6183336U JP16728684U JP16728684U JPS6183336U JP S6183336 U JPS6183336 U JP S6183336U JP 16728684 U JP16728684 U JP 16728684U JP 16728684 U JP16728684 U JP 16728684U JP S6183336 U JPS6183336 U JP S6183336U
Authority
JP
Japan
Prior art keywords
inverter
output
nth
input
series circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16728684U
Other languages
English (en)
Other versions
JPH0332114Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984167286U priority Critical patent/JPH0332114Y2/ja
Publication of JPS6183336U publication Critical patent/JPS6183336U/ja
Application granted granted Critical
Publication of JPH0332114Y2 publication Critical patent/JPH0332114Y2/ja
Expired legal-status Critical Current

Links

Description

【図面の簡単な説明】
第１図はこの考案による発振回路の一実施例を
示す図、第２図はアナログスイツチで抵抗のみを
切換えて発振周波数を切換える従来の発振回路の
一例を示す図、第３図は２組の発振部を持つ従来
の発振回路の一例を示す図である。 １…インバータ、２…第１のＣＲ直列回路、３
…第２のＣＲ直列回路、８…切換回路、１７…切
換入力端子。

Claims (1)

    【実用新案登録請求の範囲】
  1. 入力信号を反転するインバータと、該インバー
    タの入出力端子間に並列接続される第１ないし第
    ｎのＣＲ直列回路と、選択信号に基づいて前記第
    １ないし第ｎのＣＲ直列回路の各出力のいずれか
    １つを選択するとともに、この選択した出力を予
    め決められた電圧でコンパレートして前記インバ
    ータの入力端子に供給する切換え回路とを備えた
    ことを特徴とする発振回路。
JP1984167286U 1984-11-02 1984-11-02 Expired JPH0332114Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984167286U JPH0332114Y2 (ja) 1984-11-02 1984-11-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984167286U JPH0332114Y2 (ja) 1984-11-02 1984-11-02

Publications (2)

Publication Number Publication Date
JPS6183336U true JPS6183336U (ja) 1986-06-02
JPH0332114Y2 JPH0332114Y2 (ja) 1991-07-08

Family

ID=30725087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984167286U Expired JPH0332114Y2 (ja) 1984-11-02 1984-11-02

Country Status (1)

Country Link
JP (1) JPH0332114Y2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013021580A (ja) * 2011-07-13 2013-01-31 Seiko Epson Corp 抵抗周波数変換回路及び電子機器

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5739616A (en) * 1980-08-21 1982-03-04 Toshiba Corp Tristate gate type oscillation circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5739616A (en) * 1980-08-21 1982-03-04 Toshiba Corp Tristate gate type oscillation circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013021580A (ja) * 2011-07-13 2013-01-31 Seiko Epson Corp 抵抗周波数変換回路及び電子機器

Also Published As

Publication number Publication date
JPH0332114Y2 (ja) 1991-07-08

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