JPS617654A - Manufacture of resin molded semiconductor - Google Patents
Manufacture of resin molded semiconductorInfo
- Publication number
- JPS617654A JPS617654A JP59128908A JP12890884A JPS617654A JP S617654 A JPS617654 A JP S617654A JP 59128908 A JP59128908 A JP 59128908A JP 12890884 A JP12890884 A JP 12890884A JP S617654 A JPS617654 A JP S617654A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- benzotriazole
- resin
- derivative
- wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49586—Insulating layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はレジンモールド半導体の製造法に関し、特にレ
ジンモールドによる不可避的な透湿障害を改善すること
ができる経済的な半導体の製造法に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a resin-molded semiconductor, and in particular to an economical method for manufacturing a semiconductor that can improve the inevitable moisture permeability problem caused by resin molding. It is.
近年集積回路やトランジスターなどの半導体はますます
小型化、高密度化（高集積化）されると共に、初期の金
属やセラミック封止に代って安価なレジンモールドが用
いられるようになった。例えば集積回路用半導体は、第
１図に示すように、タブ（１）と、、その回りにインナ
ーリード（２）と、その外側にアウターリード（３）を
形成したリードフレームを用い、第２図に示すようにタ
ブ（１）上に表層を５ｉＯｚや Ｓｉ ３ Ｎ十など
の薄膜でパッシベーションづると共に電極（５）を形成
した半導体素子（４）を、エポキシなどの接着剤やＰｂ
−８ｎ １Ａｌｌ−８ｉ等の合金ろう材のような接合
剤（６）を用いてダイボンディングにより接合搭載し、
素子（４）の電極（５）とインナーリード（２）の先端
を八〇などの細線（７）を用いてワイヤーボンドした後
、エポキシやシリコーンなどのレジンモールド（８）を
施して封止している。In recent years, semiconductors such as integrated circuits and transistors have become increasingly smaller and more densely packed (highly integrated), and inexpensive resin molds have come to be used in place of the earlier metal and ceramic encapsulation. For example, as shown in FIG. 1, semiconductors for integrated circuits use a lead frame with a tab (1), an inner lead (2) around it, and an outer lead (3) on the outside. As shown in the figure, a semiconductor element (4) whose surface layer is passivated with a thin film such as 5iOz or Si3N0 on a tab (1) and an electrode (5) formed thereon is bonded with an adhesive such as epoxy or Pb.
-8n 1All-8i or other alloy brazing material (6) is used to bond and mount by die bonding,
After wire-bonding the electrode (5) of the element (4) and the tip of the inner lead (2) using a thin wire (7) such as 80, seal it with a resin mold (8) made of epoxy or silicone. ing.
これ等の操作は大気中で行なわれるため、タブ（１）や
インナーリード（２）にはＡＵやＡ（］などの貴金属メ
ッキが施されている。Since these operations are carried out in the atmosphere, the tab (1) and inner lead (2) are plated with a noble metal such as AU or A().
上記の如く半導体の製造には高価な貴金属が多量に用い
られており、これ等貴金属自体は耐食性であるが、卑金
属との接合部において卑金属を電食的に腐食するばかり
か、エポキシやシリコーンなどのレジンモールドとの接
合力が乏しく、使用中の熱膨張差などのストレスにより
微細な間隙を発生し、これが大気中の水分の浸入路とな
って、前記腐食をはじめ、各回路の障害や劣化の原因と
なっている。これ等の欠陥は高集積化にともなう回路微
細化にＪ５いて重大な障害となっており、経済的に優れ
たレジンモールドの使用が制約され°Ｃいる。As mentioned above, a large amount of expensive precious metals are used in the manufacture of semiconductors, and although these precious metals themselves are corrosion resistant, they not only cause electrolytic corrosion of the base metals at the joints with base metals, but also epoxy, silicone, etc. The bonding strength with the resin mold is poor, and stress due to differences in thermal expansion during use creates minute gaps, which become paths for moisture in the atmosphere to enter, leading to the corrosion mentioned above, as well as failures and deterioration of various circuits. It is the cause of These defects are a serious hindrance to the miniaturization of circuits accompanying higher integration, and are restricting the use of economically superior resin molds.
本発明はこれに鑑み種々検討の結果、レジンモールドの
透湿障害を改善することができる経済的な半導体の製造
法を開発したもので、り一ドフレームのタブ上に半導体
素子を搭載し、該素子上の電極とリードフレームのイン
ナーリードを還元性雰囲気中でワイヤーポンドした後、
レジンモールドする方法において、Ｃｕ又はＣｕ合金か
らなるリードフレームを用い、タブ上に搭載した素子上
の電極とインナーリードをワイヤーポンドした後、リー
ドフレームにベンゾトリアゾール又はその誘導体を付着
せしめ、しかる後レジンモールドすることを特徴とする
ものである。In view of this, as a result of various studies, the present invention has developed an economical semiconductor manufacturing method that can improve the moisture permeability problem of resin molds. After wire bonding the electrodes on the device and the inner leads of the lead frame in a reducing atmosphere,
In the resin molding method, a lead frame made of Cu or Cu alloy is used, and after bonding the electrodes and inner leads on the element mounted on the tab with a wire, benzotriazole or a derivative thereof is attached to the lead frame, and then resin molding is performed. It is characterized by being molded.
即ち本発明はＣｕ又はＣｕ−８ｎ、、Ｃｕ−Ｆｅ−Ｐ、
Ｃｕ −Ｎｉ −８ｎ 、Ｃｕ −８ｎ −Ｆｅ−Ｐ等
のＣＬＩ合金からなるリードフレームを用い、該フレー
ムのタブ上にエポキシやポリイミドｉ着剤を用いて素子
をダイポンドし、大気中１５０〜３００℃の温度で１５
〜３０分間硬化処理する。次に素子上の電極とリードフ
レームのインナーリードとをＡＬＩ線、Ｃｕ線、ＣＩＪ
合金線等を用いて還元性雰囲気、例えばＮｚ−Ｈｚ混合
ガス中で１５０〜３５０℃に加熱し、熱圧着法などによ
りワイヤーポンドする。続いてリードフレームにベンゾ
トリアゾール又はその誘導体を塗布し、しかる後常法に
従って１ポキシレジン等によりモールド封止するもので
ある。That is, the present invention provides Cu or Cu-8n, Cu-Fe-P,
Using a lead frame made of a CLI alloy such as Cu-Ni-8n or Cu-8n-Fe-P, the device is die-bonded onto the tab of the frame using epoxy or polyimide adhesive, and heated at 150 to 300°C in the atmosphere. 15 at a temperature of
Cure for ~30 minutes. Next, connect the electrodes on the element and the inner leads of the lead frame with ALI wire, Cu wire, CIJ
An alloy wire or the like is heated to 150 to 350° C. in a reducing atmosphere, for example, a Nz-Hz mixed gas, and wire pounded by a thermocompression bonding method or the like. Subsequently, benzotriazole or a derivative thereof is applied to the lead frame, and then molded and sealed with 1-poxy resin or the like according to a conventional method.
ベンゾトリアゾール又はその誘導体としては、ベンゾト
リアゾールを始め、トリルトリアゾール、エチルトリア
ゾール、アミノトリアゾール、ヒドロキシベンゾトリア
ゾール、カルボキシベンゾトリアゾール、ニトロベンゾ
トリアゾール等が有効であり、アルコール、アヒトン、
トルエン、フレオン等の溶液とし、これを噴霧するか、
これに浸漬することにより容易に塗布することができる
。Effective examples of benzotriazole or its derivatives include benzotriazole, tolyltriazole, ethyltriazole, aminotriazole, hydroxybenzotriazole, carboxybenzotriazole, nitrobenzotriazole, alcohol, ahitone,
Make a solution of toluene, freon, etc. and spray it, or
It can be easily applied by dipping it in this solution.
Ｃｕ又はＣｕ合金は従来のＦｅ−４２％Ｎ１合金やコバ
ール（Ｆｅ −Ｎｉ−Ｃｏ合金）より安価で、充分な強
度と導電性を有し、ワイヤ−ポンドの際の還元性雰囲気
中での加熱により、リードフレーム上の有害な酸化膜は
除去される。Cu or Cu alloy is cheaper than conventional Fe-42%N1 alloy or Kovar (Fe-Ni-Co alloy), has sufficient strength and conductivity, and can be heated in a reducing atmosphere during wire pounding. This removes the harmful oxide film on the lead frame.
通常リードル−ムではタブとインナーリードの先端部に
スポット状のＡ（＋メッキなどを施しでいるが、本発明
製造法では必・ずしもメッキを必要としない。このこと
は経済的であると同時に異種金属間の接合により起る各
種の欠陥発生を避【プることができる。例えばＣｕ細線
を用いたワイヤーポンドではＣｕ系同志の接合となり、
電食、パープルフレークなどの欠陥を避けることができ
る所謂単一化（ＭＯｎｏ−ｍｅｔａｌ化）の効果を得る
ことができる。Normally, in a lead room, spot-shaped A (+ plating, etc.) is applied to the tip of the tab and inner lead, but the manufacturing method of the present invention does not necessarily require plating.This is economical. At the same time, it is possible to avoid various defects caused by joining different metals.For example, in a wire pond using Cu thin wire, the bonding is between Cu-based metals.
It is possible to obtain the effect of so-called monolithization (MOno-metalization), which can avoid defects such as electrolytic corrosion and purple flakes.
また上記還元性雰囲気中での加熱によりＣｕ系リードフ
レームの表面は活性化され、ベンゾトリアゾール又はそ
の誘導体の塗布によりＣｕとポリマー性の安定な金属化
合物皮膜を強固に生成する。ワイヤーポンドにＣｕ細線
を用いた場合は、該細線の表面にも生成する。このため
エポキシなどのレジンモールドとの密着性が向上し、長
期間にわたって安定に保持されるので、外界からの水分
やその他の有害成分の浸入が抑制される。半導体の使用
時にＣ（−などのイオン成分が電気化学的に移動するこ
とがあるが、本発明による半導体ではリードフレームや
細線とレジンとの界面が強固に結合されているため、こ
れ等も確実に防止することができる。しかしてベンゾト
リアゾール又はその誘導体の膜厚は約１０Ａ ｉＸ上と
し、特に３０〜１２０Ａ程度とすることが望ましい。Further, the surface of the Cu-based lead frame is activated by heating in the above-mentioned reducing atmosphere, and by applying benzotriazole or its derivative, a stable metal compound film of Cu and polymer is formed firmly. When a Cu thin wire is used for the wire pond, it is also generated on the surface of the thin wire. This improves the adhesion with resin molds such as epoxy and maintains stability over a long period of time, thereby suppressing the infiltration of moisture and other harmful components from the outside world. When using a semiconductor, ion components such as C(-) may move electrochemically, but in the semiconductor according to the present invention, the interface between the lead frame or thin wire and the resin is firmly bonded, so this can be reliably avoided. Therefore, it is desirable that the film thickness of benzotriazole or its derivative be about 10A iX or more, and particularly about 30 to 120A.
更に、ベンゾトリアゾール又はその誘導体の塗布により
リードフレームのアウターリードの表面も保護されるた
め、該リードの予備半田付けを省略することができる。Furthermore, since the surface of the outer lead of the lead frame is also protected by coating with benzotriazole or its derivative, preliminary soldering of the lead can be omitted.
即ち半導体の保管中、Ｃｕ系表面の酸化が防止されるの
で、半田付は性は初期の清浄な表面が維持されるため、
保護的な予備半田を設番プなくてもプリント基板等に通
常の半田付けにより接合することかできる。In other words, during storage of semiconductors, oxidation of the Cu-based surface is prevented, and the initial clean surface is maintained for soldering.
It can be joined to a printed circuit board etc. by normal soldering without using protective preliminary solder.
目Ｊ２６＃、厚さ ０．２５ｍｍのＣｕ −０，１５％
３ｎ合金条からプレス成型により第１図に示ザリードフ
レームとほぼ同様の１４ビンリードフレームを作成した
。このリードフレームを用いて本発明法に従いタブ部に
ＡＱ−エポキシペーストを滴下し、その上に素子を置い
て、２２０℃の温度で２００分間キュアーして素子をダ
イボンドした。Eye J26#, thickness 0.25mm Cu -0.15%
A 14-bin lead frame substantially similar to the lead frame shown in FIG. 1 was made from a 3N alloy strip by press molding. Using this lead frame, AQ-epoxy paste was dropped onto the tab portion according to the method of the present invention, the device was placed on top of the paste, and the device was die-bonded by curing at a temperature of 220° C. for 200 minutes.
次にＡＵ細線とＣｕ −０，１５３ｎ細線（線径０．０
２５ｍ）を用い、それぞれＮＺ−１５％Ｈ２混合気流中
で、リードフレームを２９０℃に加熱し、素子上の電極
とインナーリードを超音波熱圧着ボンディング（５０Ｋ
Ｈｚ、第１ボンド５０ｇｒ。Next, AU thin wire and Cu -0,153n thin wire (wire diameter 0.0
The lead frame was heated to 290°C in a NZ-15% H2 mixed air flow, and the electrodes and inner leads on the element were bonded using ultrasonic thermocompression bonding (50K
Hz, 1st bond 50gr.
０．０５秒、第２ポンド８０ｇｒ、 ０．１秒）した
。0.05 seconds, second pound 80 gr, 0.1 seconds).
次に各リードフレームに０．１％ベンゾトリアゾールの
フレオン溶液を噴霧塗布したものと、０．２５％トリル
トリアゾールのフレオン溶液を噴霧塗布したものを乾燥
後、それぞれエポキシレジンをモールドして半゛導体を
製造した。尚噴霧塗布には溶解助剤として少量のメタノ
ールを併用した。Next, each lead frame was spray-coated with a Freon solution containing 0.1% benzotriazole and another was spray-coated with a Freon solution containing 0.25% Tolyltriazole. After drying, each lead frame was molded with epoxy resin to form a semiconductor. was manufactured. A small amount of methanol was also used as a solubilizing agent in the spray coating.
比較のため上記リードフレームを用い、従来法に基づい
てタブ及びインナーリード部に厚さ３μのＡＱメッキを
施し、上記と同様にしてダブ上に素子をダイプントして
から、Ａｌｌ細線を用いてワイヤーボンディングを行な
い、続いてエポキシレジンをモールドし、しかる後アウ
ターリード部に５ｎ−１０％Ｐｂ合金を１μの厚さに電
気メッキして半導体を製造した。For comparison, using the above lead frame, AQ plating with a thickness of 3 μm was applied to the tab and inner lead part based on the conventional method, and the device was die-punted on the dub in the same manner as above, and then the wire was bonded using All thin wire. Bonding was performed, followed by epoxy resin molding, and then a 5n-10% Pb alloy was electroplated to a thickness of 1 μm on the outer lead portion to produce a semiconductor.
これ等各半導体につい−Ｃ不良率を調べるため、各２０
個を温度１２０℃、湿度１００％の加湿チャンバー内に
５００時間保持してから通電試験を行なって不良率を求
めた。また各半導体についてアウターリードの半田付Ｇ
プ性を調べるため、温度６０℃、湿度９５％の恒温恒湿
槽内に１００時間保持した後、ソルダーチェッカーを用
いて２７０℃に保持した共晶半田浴における半田濡れ時
間を測定した。更にレジンモールド前のリードフレーム
について、プルテスターによりワイヤーボンディング強
麿を測定すると共にベンゾトリアゾールやトリルトリア
ゾールを塗布したものについて被膜厚さを測定した。こ
れ等の結果を第１表に示す。In order to check the -C defect rate for each of these semiconductors, 20
The pieces were held in a humidified chamber at a temperature of 120° C. and a humidity of 100% for 500 hours, and then a current test was conducted to determine the defective rate. Also, for each semiconductor, the soldering G of the outer lead
In order to examine the solderability, the solder wetting time was measured in a eutectic solder bath maintained at 270°C using a solder checker after holding it in a constant temperature and humidity chamber at a temperature of 60°C and a humidity of 95% for 100 hours. Furthermore, wire bonding strength was measured using a pull tester for the lead frame before resin molding, and the film thickness was also measured for those coated with benzotriazole or tolyltriazole. These results are shown in Table 1.
第１表から明らかなように本発明法Ｎｏ、 １〜４によ
り造られた半導体は従来法Ｎｏ、 ５〜６により造られ
た半導体より不良率が著しく少なく、ボンディング強度
や半田付は性においても遜色ない。特にボンディング細
線にＣｕ −０，１５％Ｓｎ合金線を用いた本発明法Ｎ
ｏ、 ３〜４１−はエポキシレジンモールドとの密着性
の向上により、不良率はＯとなり、更にプル強度も改善
されていることが判る。As is clear from Table 1, the semiconductors manufactured by the present invention methods No. 1 to 4 had significantly lower defect rates than the semiconductors manufactured by the conventional methods No. 5 to 6, and the bonding strength and soldering properties were also superior to those manufactured by the conventional methods No. 5 to 6. It's comparable. In particular, the method N of the present invention uses Cu-0,15%Sn alloy wire as the bonding thin wire.
It can be seen that for samples 3 to 41-, the defect rate was O due to improved adhesion with the epoxy resin mold, and the pull strength was also improved.
これに対し、半田メッキした従来法Ｎｏ、 ５では半田
メッキしない従来法Ｎｏ、 ６より不良率が増大してい
る。これはメッキ工程におい°（液成分が不可避的に残
留し、これが水と共に侵入するためと考えられる。また
半田メッキしない従来法Ｎｏ、 ６は酸化皮膜の発生に
より半田付は性の劣化が著しいことが判る。On the other hand, in conventional method No. 5 with solder plating, the defect rate is higher than in conventional method No. 6 without solder plating. This is thought to be due to liquid components remaining unavoidably in the plating process, which infiltrates together with water.Also, in conventional method No. 6, which does not use solder plating, the solderability deteriorates significantly due to the formation of an oxide film. I understand.
（発明の効果〕
このように本発明によれば、従来のＦｅ−Ｎｉ合金等の
リードフレームとセラミック封止に代り、安価なＣｕ系
リードフレームとレジンモールド封止の組合せにおいて
、不可避的な透湿障害を改善し、信頼性の高い半導体を
安価に提供し得るもので、工業上顕著な効果を奏づるも
のである。(Effects of the Invention) As described above, according to the present invention, in place of the conventional lead frame made of Fe-Ni alloy and ceramic sealing, the combination of an inexpensive Cu lead frame and resin mold sealing eliminates the inevitable transparency. It can improve moisture damage and provide highly reliable semiconductors at low cost, and has a significant industrial effect.
第１図は半導体用リードフレームの一例を示す平面図、
第２図は半導体の要部断面を示す説明図である。
１・・・タブ
２・・・インナーリード
３・・・アウターリード
４・・・素子
５・・・電極
６・・・接合剤
７・・・細線
８・・・レジンモールドFIG. 1 is a plan view showing an example of a semiconductor lead frame;
FIG. 2 is an explanatory diagram showing a cross section of a main part of a semiconductor. 1...Tab 2...Inner lead 3...Outer lead 4...Element 5...Electrode 6...Binding agent 7...Thin wire 8...Resin mold
Claims (1)
上の電極とリードフレームのインナーリードを還元性雰
囲気中でワイヤーボンドした後、レジンモールドする方
法において、Ｃｕ又はＣｕ合金からなるリードフレーム
を用い、ダブ上に搭載した素子上の電極とインナーリー
ドをワイヤーボンドした後、リードフレームにベンゾト
リアゾール又はその誘導体を付着せしめ、しかる後レジ
ンモールドすることを特徴とするレジンモールド半導体
の製造法。In a method in which a semiconductor element is mounted on a tab of a lead frame, electrodes on the element and inner leads of the lead frame are wire-bonded in a reducing atmosphere, and then resin molded, a lead frame made of Cu or Cu alloy is used. A method for manufacturing a resin molded semiconductor, which comprises wire-bonding an electrode on an element mounted on a dub and an inner lead, adhering benzotriazole or a derivative thereof to a lead frame, and then resin-molding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59128908A JPS617654A (en) | 1984-06-22 | 1984-06-22 | Manufacture of resin molded semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59128908A JPS617654A (en) | 1984-06-22 | 1984-06-22 | Manufacture of resin molded semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS617654A true JPS617654A (en) | 1986-01-14 |
Family
ID=14996332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59128908A Pending JPS617654A (en) | 1984-06-22 | 1984-06-22 | Manufacture of resin molded semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS617654A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0344504A2 (en) * | 1988-06-03 | 1989-12-06 | International Business Machines Corporation | Article comprising a polyimide and a metal layer and methods of making such articles |
-
1984
- 1984-06-22 JP JP59128908A patent/JPS617654A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0344504A2 (en) * | 1988-06-03 | 1989-12-06 | International Business Machines Corporation | Article comprising a polyimide and a metal layer and methods of making such articles |
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