JPS6173192A - Graphic display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a graphic display device used as a terminal for an electronic computer.

2. Description of the Related Art Structures of Conventional Examples and Their Problems In recent years, graphic display devices have been used in many fields.

A conventional graphic display device will be described below.

FIG. 1 shows the configuration of a conventional graphic display device. Here, 1 is a microprocessor that controls the main body of the graphic display device, 2 is a screen memory for displaying display information on the ClRT screen,
3 is a CRT for displaying the contents of the screen memory 2, 4 is an OM controller for writing display dot data into the screen memory at high speed, and 6 is a common bus steer.

The operation of the conventional graphic display device configured as described above will be described below.

When writing display dot data into the screen memory 2 at high speed, the DMA controller writes the display data while counting up the address of the screen memory one by one, as shown in FIG. Generally, addresses in screen memory are consecutive in binary form in the right-horizontal direction. For this purpose, the display data is written in the right horizontal direction by the DMA controller while counting up the address in binary. However, when writing display data in the vertical direction (directly below), the addresses become scattered (as shown in Figure 3, the addresses are continuous in the right horizontal direction, but not directly downward). Because of this, a DMA controller cannot be used, and data cannot be displayed at high speed, so image data cannot be processed at high speed.

OBJECT OF THE INVENTION The present invention solves the above-mentioned drawbacks and allows display data to be DM'd.
The purpose is to enable high-speed processing even in the vertical direction using the A controller.

Structure of the Invention The present invention is capable of writing display data in the vertical direction using a DMA controller by providing an address conversion circuit, and can display and write kanji characters, vertical bar graphs, etc. at high speed. You will be able to do it. DESCRIPTION OF AN EMBODIMENT FIG. 4 is a block diagram of a graphic display device in an embodiment of the present invention.

In the figure, 11 is a latch circuit that latches the first address of the screen address to be written to the address vertical conversion circuit;
A memory 2 stores data that is a multiple of the pitch in the horizontal direction of the screen memory, and is composed of a ROM or a RAM. Table 1 shows the contents of the data.

Table 1 N: Horizontal pitch 13 of the screen memory is an addition circuit that adds the data of the latch 11 and the data of the memory 12 and specifies the address indicating the location where the data is written to the screen memory.The latch circuit 11, the memory 12,
The adder circuit 13 constitutes an address vertical conversion circuit 15.

14 is a screen memory.

The operation of the graphic display device of this embodiment configured as above will be explained.

For example, when writing display data from address M in the vertical direction (directly downward) as shown in FIG. 6, the first data at address M is first written to the latch circuit 11 in FIG. 4.

Next, when the icDM human control circuit is started and display data is written to address 0 of the screen memory, the memory 12 in FIG. 4 outputs data 0 at memory address 0 to address 0. As a result, the address data (tM) and data 0 of the first address M are input to the adder circuit 1"3 in FIG. 4, and as a result, uMn is output to the screen memory as an address, and the screen memo 11 address M The display data is written to the 4th address.Next, when the DMA controller attempts to write the display data to the 1st address of the screen memory, the 4th
The memory 12 shown in the figure outputs data N at memory address 21 for address 1. As a result, the addition circuit is “M+N”
is output, and display data is written into the screen memory at address M+N as shown in FIG. Continuous DMA as above
Even if the controller sees data and writes display data in the horizontal direction of the cloth, the display data is actually written in the vertical direction.Advantages of the Invention According to the present invention, the address conversion circuit can be By providing this, display data can be written in the vertical direction at high speed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the general configuration of a graphic display device, FIG. 2 is an explanatory diagram showing the movement of display data, FIG. 3 is a diagram showing the address distribution of the screen memory, and FIG. 4 is a diagram showing the structure of the present invention. FIG. 5 is a block diagram showing the configuration of a graphic display device in one embodiment, and is a diagram showing changes in actual write addresses. 11...Latch circuit, 12...Memory, 13...Addition circuit, 14...Screen memo 18 Name of agent Patent attorney Toshi Nakao Others 1
Figure 3

Claims (1)

[Claims] Address conversion including a latch circuit that latches the start address of double-sided addresses of data to be displayed, a memory that stores data that is a multiple of the horizontal pitch of the screen memory, and an adder circuit that adds the data in the latch and the data in the memory. A graphic display device comprising a circuit.