JPS6171692A - Method of producing printed circuit board and printed circuit board - Google Patents

Method of producing printed circuit board and printed circuit board

Info

Publication number
JPS6171692A
JPS6171692A JP19369584A JP19369584A JPS6171692A JP S6171692 A JPS6171692 A JP S6171692A JP 19369584 A JP19369584 A JP 19369584A JP 19369584 A JP19369584 A JP 19369584A JP S6171692 A JPS6171692 A JP S6171692A
Authority
JP
Japan
Prior art keywords
thickness
plating resist
resist layer
base material
back surfaces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19369584A
Other languages
Japanese (ja)
Inventor
本間 政治
洋一 松田
松沢 公
正明 後藤
石山 義夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Lincstech Circuit Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Hitachi Condenser Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd, Hitachi Condenser Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP19369584A priority Critical patent/JPS6171692A/en
Publication of JPS6171692A publication Critical patent/JPS6171692A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はS電解めっき法により導電体を形成する印刷配
線板の製造方法及びその印刷配線板に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a printed wiring board in which a conductor is formed by S electrolytic plating, and to the printed wiring board.

従来の技術 本発明者らがすでに出願した特開昭58−128791
号公報及び特開昭58−134497号公報により、感
光性樹脂フィルムを絶縁基板に貼付け、焼付け、現像処
理して永久マスクを形成し、この永久マスクを除く部分
に無電解めっきにより導電体を形成した印刷配線板の製
造方法及びその印刷配線板が記載されている。
Prior art JP-A-58-128791 filed by the present inventors
According to Japanese Patent Publication No. 58-134497, a photosensitive resin film is attached to an insulating substrate, baked, and developed to form a permanent mask, and a conductor is formed by electroless plating in the area excluding the permanent mask. A method for manufacturing a printed wiring board and the printed wiring board are described.

発明が解決しようとする問題点 電子部品の小型化が進み、LSIや表示素子が配線板に
数多く搭載されるようになり、配線板上に形成された導
体間の間隔や導体幅の縮小化が急速に進行している。ま
た電子部品の配線板への実装方式は面付は方式が増えて
いる。
Problems that the invention aims to solve As electronic components become smaller and more LSIs and display elements are mounted on wiring boards, the spacing between conductors formed on wiring boards and the width of the conductors are becoming smaller. It's progressing rapidly. In addition, surface mounting is becoming more and more popular as a mounting method for electronic components on wiring boards.

従来めっきレジスト層を形成させるためには、フルアデ
ィティブ法ではスクリーン印刷方式に集中していたが、
前述の公開公報で示されている如く、フォトレジスト方
式が提案され普及しつつある。
Conventionally, fully additive methods focused on screen printing to form plating resist layers, but
As shown in the above-mentioned publication, a photoresist method has been proposed and is becoming popular.

しかし、OA機器の発展に伴い、印刷′配線板の両面に
電子部品を実装するとき、一方の面にはLSI等を並べ
、他方の面には液晶等の表示管を配設するような用い方
には不都合である。すなわちLSIの端子は基板から段
差を設けて引出されているのに対し、表示管の端子は基
板の背面に直接設けられていて、基板面から殆ど突出し
ていないので、従来の配線基板では良好なる対応ができ
なかった。
However, with the development of office automation equipment, when mounting electronic components on both sides of a printed wiring board, it is becoming increasingly common to arrange LSIs on one side and display tubes such as liquid crystals on the other side. This is inconvenient for some people. In other words, LSI terminals are drawn out from the board with a step, whereas display tube terminals are provided directly on the back of the board and hardly protrude from the board surface, so they do not work well with conventional wiring boards. I couldn't respond.

問題点を解決するための手段 本発明は無電解めっき液の金属陽イオンの還元に対して
接触反応する触媒を絶縁基板内に分散包含す゛るか、又
は表裏両面に触媒を付着さけた絶縁基板を基材とし、こ
の絶縁基板の表裏面にそれぞれフ゛イルムの厚さを異に
する感光性樹脂フィルムを貼付け、この感光性樹脂フィ
ルムの表面に写真フィルムをのせ紫外線を照射し、現像
して感光性樹脂フィルムをめっきレジスト層として形成
し、この絶縁基板を無電解めっき液中に浸漬してめっき
レジスト層を除く箇所にほぼ均一な厚さのIt体層を形
成し、この導電体層の厚さと小なる厚さのめっきレジス
ト層との厚さをほぼ同一厚さに形成する印lII配w!
板の製造方法である。
Means for Solving the Problems The present invention involves dispersing a catalyst that reacts catalytically with the reduction of metal cations in an electroless plating solution in an insulating substrate, or using an insulating substrate with catalysts attached to both the front and back surfaces. As a base material, photosensitive resin films with different film thicknesses are pasted on the front and back sides of this insulating substrate, and a photographic film is placed on the surface of this photosensitive resin film, irradiated with ultraviolet rays, and developed to form a photosensitive resin. The film is formed as a plating resist layer, and this insulating substrate is immersed in an electroless plating solution to form an It body layer with a substantially uniform thickness except for the plating resist layer. The thickness of the plating resist layer is approximately the same as that of the plating resist layer.
This is a method of manufacturing a board.

また、他の発明は触媒入り又は表裏面に触媒を付着した
絶縁基材を用い、この基材の表裏面に互いに厚さが異な
るめっきレジスト層が形成され、この絶縁基板のめっき
レジスト層を除く箇所に均一厚の無電解めっき層が形成
され、このめっき層の厚さが小なる厚さのめつきレジス
ト層の厚さとほぼ同一厚であり、他方の側のめつき層と
めっきレジスト層とには段差が形成されている印刷配線
板である。
In addition, another invention uses an insulating base material containing a catalyst or having a catalyst attached to the front and back surfaces, and plating resist layers having different thicknesses are formed on the front and back surfaces of this base material, excluding the plating resist layer of this insulating substrate. An electroless plating layer with a uniform thickness is formed at the location, and the thickness of this plating layer is almost the same as the thickness of the plating resist layer with a smaller thickness, and the plating layer and the plating resist layer on the other side are This is a printed wiring board on which a step is formed.

実施例 本発明の実施例を図面に基づき説明する。Example Embodiments of the present invention will be described based on the drawings.

1は絶縁基板であり、この絶縁基板1内に無電解めっき
液の金属陽イオンの還元に対して接触反応する触媒2を
分散包含するか、又は絶縁基板1の表裏両面に触媒2を
付着した絶縁基板を基材3とし、この基材3の表面に日
立化成株式会社!!lSR−3000型の30u厚の感
光性樹脂フィルム4を貼付け、裏面には同製品の70μ
厚の感光性樹脂フィルム5を貼付ける。すなわら、基材
1の表裏両面にそれぞれ厚さの異なる感光性樹脂フィル
ム4.5を貼付ける。
Reference numeral 1 denotes an insulating substrate, and the insulating substrate 1 contains a dispersed catalyst 2 that reacts catalytically with the reduction of metal cations in the electroless plating solution, or the catalyst 2 is attached to both the front and back surfaces of the insulating substrate 1. An insulating substrate is used as a base material 3, and Hitachi Chemical Co., Ltd. is applied to the surface of this base material 3! ! A 30u thick photosensitive resin film 4 of the lSR-3000 type is pasted, and a 70μ thick film of the same product is attached to the back side.
A thick photosensitive resin film 5 is attached. That is, photosensitive resin films 4.5 having different thicknesses are attached to both the front and back sides of the base material 1, respectively.

基材1上の感光性樹脂フィルム4,5に密着させて写真
フィルム6.7をのせ、紫外線8を照射する。写真フィ
ルム6.7には導体パターンの逆パターンが形成されて
いる。紫外線8を照射すると、光線が照射された部分の
感光性樹脂フィルム4A、5△は硬化され、写真フィル
ム6.7の不透明部分6A、’7Aは紫外線8が透過せ
ず、光線が遮蔽されて感光性樹脂フィルム4B、5Bは
硬化しない。
A photographic film 6.7 is placed on the substrate 1 in close contact with the photosensitive resin films 4 and 5, and is irradiated with ultraviolet light 8. A reverse pattern of the conductor pattern is formed on the photographic film 6.7. When the ultraviolet rays 8 are irradiated, the photosensitive resin films 4A and 5Δ in the irradiated areas are cured, and the opaque areas 6A and '7A of the photographic film 6.7 do not transmit the ultraviolet rays and are blocked. Photosensitive resin films 4B and 5B are not cured.

紫外線8を照射し柊ったら、この絶縁基Fi10の表裏
両面にトリクロールエチレンをスプレーすると、感光性
樹脂フィルム4.5の未硬化部4B。
After irradiating with ultraviolet rays 8 and spraying trichlorethylene on both the front and back surfaces of this insulating group Fi10, uncured portions 4B of the photosensitive resin film 4.5 are formed.

5Bは溶解し、硬化部4△、5Aはそのまま残り、めっ
きレジスト!111.12として形成される。
5B is dissolved, hardened parts 4△ and 5A remain as they are, and the plating resist! 111.12.

このとき基材の表裏面に形成されためっきレジスト層1
1.12の厚さは表面側が小さく(30μ)裏面側が大
きく(70μ)なっている。
At this time, the plating resist layer 1 formed on the front and back surfaces of the base material
The thickness of 1.12 is smaller on the front side (30μ) and larger on the back side (70μ).

次に、この基板10を重クロム酸ナトリウム及び硼弗化
水素酸からなる溶液に浸漬し、露出している基材の表面
13を化学的に粗化し、めっぎの付着力を良好にさせる
Next, this substrate 10 is immersed in a solution consisting of sodium dichromate and borofluoric acid to chemically roughen the exposed surface 13 of the substrate to improve the adhesion of the plating.

その後、下記組成の無電解めっき液 硫酸銅5水和物      10q/1エチレンジアミ
ン4酢酸  30g/l苛性ソーダ      PHが
12になる伍ホルマリン(37%)    3m乏/2
界面活性剤         若干 水         全体を1えにする聞からなり、液
温70’Cに加熱した液中に絶縁基板10を約3時間浸
FFtし、銅めつき膜厚が30μ(表面側に形成しため
つきレジスト層と同一厚)に成長したときに基板10を
めっき液中から取り出し、印刷配線板20を冑だ。この
導電体111の厚さは表裏面で均一な厚さく30μ)が
得られるので、表面側ではめつきレジスト11とほぼ同
一厚の凹凸のない平面21が得られ、裏面側はめつきレ
ジスト12/)(70μと厚いので段差22が形成され
る。
After that, electroless plating solution with the following composition: Copper sulfate pentahydrate 10q/1 Ethylenediaminetetraacetic acid 30g/l Caustic soda PH becomes 12.5 Formalin (37%) 3m/2
The insulating substrate 10 was immersed in a solution heated to a temperature of 70'C for about 3 hours, and the copper plating film thickness was 30μ (formed on the surface side). When the plating layer has grown to the same thickness as the deposited resist layer, the substrate 10 is removed from the plating solution and the printed wiring board 20 is removed. Since the thickness of this conductor 111 is uniform (30 μm) on the front and back surfaces, a flat surface 21 with almost the same thickness as the plating resist 11 and no unevenness is obtained on the front side, and the plating resist 12/ ) (Since it is as thick as 70μ, a step 22 is formed.

また、他の発明は、触媒2入り又は表裏面に触媒3が付
着された絶縁基材3を用い、この基材3の表裏両面に互
いに厚さが異なる例えば表側30μ、裏側70μのめつ
きレジスト811.12を形成する。めっきレジスト!
!!11.12としては感光性樹脂フィルムを用いて焼
付は現像して形成するか、液状のレジストを用いる場合
には塗付膜厚を調整することにより任意の厚さのめつき
レジストが得られる。表裏面で厚さの異なるめっきレジ
スト層11.12を形成した絶縁基板10をWI記の゛
無電解めっき液に浸漬し、厚さの小なる表面側のめつき
レジスト層30μとほぼ同一の厚さのめつ゛き厚30μ
を形成し印刷配線板20をうる。
Further, another invention uses an insulating base material 3 containing a catalyst 2 or having a catalyst 3 attached to the front and back surfaces, and a plating resist having different thicknesses, for example, 30 μm on the front side and 70 μm on the back side, on both the front and back surfaces of the base material 3. 811.12. Plating resist!
! ! As for 11.12, a plated resist of any thickness can be obtained by using a photosensitive resin film and developing it, or by adjusting the coating film thickness when using a liquid resist. The insulating substrate 10 on which plated resist layers 11 and 12 with different thicknesses are formed on the front and back surfaces is immersed in the electroless plating solution described in WI, and the thickness is approximately the same as that of the thinner plated resist layer 30 μ on the front side. Sanometsu thickness 30μ
A printed wiring board 20 is obtained.

発明の効果 本発明は絶縁基板の表裏面に形成しためつきレジスト層
の厚さを大小異にし、小なる厚さのめつきレジスト層と
同一厚の無電解めっきの導電体層を形成したので、基板
の表側の表面は平面状21に形成され、裏面側は段差2
2が形成された。このため表示管21のように本体22
から端子23があまり突出していないものは絶縁基板の
表面側に、LSI31のように本体32に対し端子33
が突出している電子部品は段差が形成された裏面側に取
付けると、位置決めが確実に行え、かつ半田付は作業が
確実に行え、導体間の間隔が狭くなっても半田のブリッ
ヂ現象を防止でき、沿面距離を長くとることができ絶縁
性を高める等の効果を持つ。
Effects of the Invention In the present invention, the thickness of the plating resist layer formed on the front and back surfaces of an insulating substrate is varied, and an electroless plated conductive layer having the same thickness as the plating resist layer of a small thickness is formed. , the front surface of the substrate is formed into a planar shape 21, and the back surface side is formed with a step 2.
2 was formed. Therefore, like the display tube 21, the main body 22
If the terminal 23 does not protrude too much from the main body 32, the terminal 33 is placed on the front side of the insulating board, such as the LSI 31.
If you install electronic components with protruding parts on the back side where a step is formed, positioning can be performed reliably, soldering work can be performed reliably, and solder bridging phenomenon can be prevented even if the spacing between conductors is narrow. , it has the effect of increasing creepage distance and improving insulation properties.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の印刷配線板の表面側に表示管を裏面側
にLSIを搭載した断面図、第2図及び第3図は基材の
断面図、第4図は感光性樹脂フィルムを貼付けた断面図
、第5図は写真フィルムをのせ紫外線を照射している断
面図、第6図はめつきレジスト層が形成された断面図、
第7図は本発明の断面図である。 図面において、1は絶縁基板、2は触媒、3は基材、4
.5は感光性樹脂フィルム、6.7は写真フィルム、8
は紫外線、 11.12はめつき1/シスト、14は導電体、20は
印刷配線板。 特許出願人 日立コンデンサ株式会社 第1図 第2図 第3図 第4図 手 続 補 正 書(自発) 昭和60年6月13日
Fig. 1 is a cross-sectional view of a printed wiring board of the present invention with a display tube mounted on the front side and an LSI mounted on the back side, Figs. 2 and 3 are cross-sectional views of the base material, and Fig. 4 is a photosensitive resin film mounted. Figure 5 is a cross-sectional view of the pasted photo film and irradiation with ultraviolet rays, Figure 6 is a cross-sectional view of the plated resist layer formed.
FIG. 7 is a cross-sectional view of the present invention. In the drawings, 1 is an insulating substrate, 2 is a catalyst, 3 is a base material, and 4
.. 5 is a photosensitive resin film, 6.7 is a photographic film, 8
11.12 is a plating 1/cyst, 14 is a conductor, and 20 is a printed wiring board. Patent applicant: Hitachi Capacitor Co., Ltd. Figure 1 Figure 2 Figure 3 Figure 4 Procedures Amendment (voluntary) June 13, 1985

Claims (2)

【特許請求の範囲】[Claims] (1)触媒入り又は表裏面に触媒を付着させた絶縁基板
を基材とし、この基材の表裏面にそれぞれ厚さの異なる
感光性樹脂フィルムを貼付け、この感光性樹脂フィルム
の上に写真フィルムをのせ紫外線を照射した後現像し、
硬化された感光性樹脂フィルムがめっきレジスト層とし
て形成され、この基板を無電解めっき液に浸漬しめっき
レジスト層を除く箇所にほぼ均一な厚さの導電体層を形
成し、この導電体層の厚さを小なる厚さのめっきレジス
ト層とほぼ同一厚に形成することを特徴とする印刷配線
板の製造方法。
(1) An insulating substrate containing a catalyst or a catalyst attached to the front and back surfaces is used as a base material, photosensitive resin films of different thicknesses are pasted on the front and back surfaces of this base material, and a photographic film is placed on top of this photosensitive resin film. After applying ultraviolet rays and developing it,
A cured photosensitive resin film is formed as a plating resist layer, and this substrate is immersed in an electroless plating solution to form a conductive layer with a substantially uniform thickness except for the plating resist layer. A method for manufacturing a printed wiring board, characterized in that the thickness is formed to be approximately the same thickness as a plating resist layer having a small thickness.
(2)触媒入り又は表裏面に触媒を付着した絶縁性基材
を用い、この基材の表裏面に互いに厚さが異なるめっき
レジスト層が形成され、このめっきレジスト層を除く絶
縁基板上に均一厚の無電解めっきによる導電体層が形成
され、この導電体層の厚さが小なる厚さのめっきレジス
ト層の厚さとほぼ同一厚であり、かつ他方のめっきレジ
スト層とは段差が形成されていることを特徴とする印刷
配線板。
(2) Using an insulating base material containing a catalyst or having a catalyst attached to the front and back surfaces, plating resist layers with different thicknesses are formed on the front and back surfaces of this base material, and the entire surface of the insulating substrate except for this plating resist layer is uniform. A thick conductive layer is formed by electroless plating, and the thickness of this conductive layer is almost the same as the thickness of the thinner plating resist layer, and a step is formed from the other plating resist layer. A printed wiring board characterized by:
JP19369584A 1984-09-14 1984-09-14 Method of producing printed circuit board and printed circuit board Pending JPS6171692A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19369584A JPS6171692A (en) 1984-09-14 1984-09-14 Method of producing printed circuit board and printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19369584A JPS6171692A (en) 1984-09-14 1984-09-14 Method of producing printed circuit board and printed circuit board

Publications (1)

Publication Number Publication Date
JPS6171692A true JPS6171692A (en) 1986-04-12

Family

ID=16312240

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19369584A Pending JPS6171692A (en) 1984-09-14 1984-09-14 Method of producing printed circuit board and printed circuit board

Country Status (1)

Country Link
JP (1) JPS6171692A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58134497A (en) * 1982-02-05 1983-08-10 日立コンデンサ株式会社 Method of producing printed circuit board and printed circuit board
JPS58220493A (en) * 1982-06-16 1983-12-22 シャープ株式会社 Circuit substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58134497A (en) * 1982-02-05 1983-08-10 日立コンデンサ株式会社 Method of producing printed circuit board and printed circuit board
JPS58220493A (en) * 1982-06-16 1983-12-22 シャープ株式会社 Circuit substrate

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