JPS617138U - Noise removal circuit - Google Patents
Noise removal circuitInfo
- Publication number
- JPS617138U JPS617138U JP9192684U JP9192684U JPS617138U JP S617138 U JPS617138 U JP S617138U JP 9192684 U JP9192684 U JP 9192684U JP 9192684 U JP9192684 U JP 9192684U JP S617138 U JPS617138 U JP S617138U
- Authority
- JP
- Japan
- Prior art keywords
- noise removal
- removal circuit
- timing signal
- power supply
- input voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の雑音除去回路の雑音除去について説明す
る波形図、第２図は本考案の一実施例の構成を示すブロ
ック図、第３図は第２図に示す実施例の動作について説
明する波形図、第４図は本考案の要部を示す他の実施例
の構成図である。
１・・・電源装置、２・・・機器、３・・・整流平滑回
路、４，９・・・抵抗、５・・・発光ダイオード、６・
・・ダイオード、７・・・フォトダイオード、８・・・
フォトカプラ、１０・・・マイクロプロセッサ、１１・
・・タイミング信号発生回路、Ｔ〜Ｔ９・・・端子、Ｖ
ｐ・・・電源電圧、Ｖｔ・・・タイミング信号、■・・
・入力電圧、■ｏ・・・雑音電圧ミ■５・・・信号電圧
。Fig. 1 is a waveform diagram explaining noise removal in a conventional noise removal circuit, Fig. 2 is a block diagram showing the configuration of an embodiment of the present invention, and Fig. 3 explains the operation of the embodiment shown in Fig. 2. FIG. 4 is a configuration diagram of another embodiment showing the essential parts of the present invention. DESCRIPTION OF SYMBOLS 1... Power supply device, 2... Equipment, 3... Rectifier smoothing circuit, 4, 9... Resistor, 5... Light emitting diode, 6...
...Diode, 7...Photodiode, 8...
Photocoupler, 10... Microprocessor, 11.
...Timing signal generation circuit, T to T9...terminal, V
p...power supply voltage, Vt...timing signal, ■...
・Input voltage, ■o...Noise voltage Mi■5...Signal voltage.
Claims (1)
込んでアナログ／デジタル変換器によりデジタル信号に
変換しこれ等の複数のデジタル信号を平均して雑音を除
去する雑音除去回路において、前記交流電源に同期した
タイミング信号を発生するタイミング信号発生手段を備
え南前記タイミング信号発生手段のタイミング信号によ
り前記入力電圧を読込むことを特徴とした雑音除去回路
。In a noise removal circuit that reads an analog input voltage every half cycle of an AC power supply, converts it into a digital signal by an analog/digital converter, and removes noise by averaging these multiple digital signals, the AC What is claimed is: 1. A noise removal circuit comprising: timing signal generating means for generating a timing signal synchronized with a power supply; and reading the input voltage according to a timing signal of the timing signal generating means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9192684U JPS617138U (en) | 1984-06-20 | 1984-06-20 | Noise removal circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9192684U JPS617138U (en) | 1984-06-20 | 1984-06-20 | Noise removal circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS617138U true JPS617138U (en) | 1986-01-17 |
Family
ID=30648254
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9192684U Pending JPS617138U (en) | 1984-06-20 | 1984-06-20 | Noise removal circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS617138U (en) |
-
1984
- 1984-06-20 JP JP9192684U patent/JPS617138U/en active Pending
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