JPS616692A - Musical sound generation system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

INDUSTRIAL APPLICATION FIELD The present invention relates to a musical tone generation system that can be used in electronic musical instruments and the like. Conventional configurations and their problems In recent years, musical tone generation systems used in electronic musical instruments and the like have been changing from conventional analog systems to digital systems. Numerous methods have been proposed for key assigners to assign a plurality of sound generation control data 5CD (note octave data and key on/off data) to limited channels. One of the functions of this key assigner is the function of assigning a new SCD when all channels are producing sound. In key assignment in conventional analog tone generation systems, simply assigning a new SOD'(z) to a predetermined channel did not pose a major problem. It is a method that weights the waves temporally and applies a filter whose characteristics change over time, and the filter itself is composed of an active filter using 0R-i, so new sound production control data SOD can be used. This is because even if the characteristics of the filter changed after being assigned, it was a continuous change and no clicks occurred.However, in a digital musical tone generation system,
If the sound generation corresponding to the old SCD data is not completely completed when new data SCD is assigned, a fatal discontinuity occurs, resulting in click noise. OBJECTS OF THE INVENTION It is an object of the present invention to quickly attenuate the currently sounding musical tone when assigning new sound generation control data SCD to a channel that is currently sounding, and to quickly attenuate the currently sounding musical tone and wait until the new sounding control data SCD is assigned to a channel that is currently sounding. Data SCD'f: By allocating, click noise can be minimized and
It is an object of the present invention to provide a musical tone generation system that can allocate new data SCD' (5) in the shortest time.Structure of the InventionThe musical tone generation system of the present invention has a sound generation control that specifies the scale and generation timing of the musical tone to be generated.・When assigning new sound generation control data to the sound generation control data generator that generates data and the currently sounding channel of the musical tone generator, a first damper request signal that quickly dampens the currently sounding musical sound is generated. a sound generation control device that transmits the sound generation control data sent from the sound generation control data generation means to the musical sound generation device when the musical sound generated by the musical sound generation device has sufficiently attenuated; This device consists of a musical tone generator that generates musical tones based on data, and it is possible to assign new tone control data to a channel that is currently generating sound in the shortest possible time without causing click noise.・Data can be assigned.Description of Embodiment [1] Configuration of musical tone generation system FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention in which the musical tone generation system of the present invention is applied to an electronic musical instrument. The main microcomputer MμC (101) receives signals from input devices such as a keyboard (102) and tab switch C103), and controls a plurality of musical tone generation systems (108-1 to 108-4). Musical sound generation system (1
The musical tone signals output from o8-1 to o8-4) are sent to adders (1
09) and output from the speaker (111) through the amplifier (11o). The sub-microcomputer SμG (104) receives sound generation control data SOD, tone selection data TSD, etc. sent from the main microcomputer Mμ,C (1o1), and outputs the digital sound generator DSG (105), low-pass・Filter L
It controls the PF (106) and the amplitude modulation section AMS (107). DSG (106) is a sound generation control signal sent from the sub-microcomputer SμG (104).
Eight channels of musical tones are generated independently based on data SCD, tone selection data TSD, etc. A digital sound generator DSG having such a function has been proposed in Japanese Patent Application No. 57-231482 titled ``Music Sound Generator''. The above musical tone generator sequentially reads two waveform data from the waveform memory, performs interpolation calculation, and passes the obtained output data through a digital-to-analog converter DAC.
It is configured to obtain analog musical sound output. However, the digital sound generator DSG (105)U in the musical sound generation system of the present invention does not have functions such as generation of frequency data corresponding to musical scales, vibrato addition processing, glide addition processing, etc., and the above processing is performed as a sub-processing.
This is done by the microcomputer SμG (10a), and the digital musical tone output in front of the digital-to-analog converter DAC is looked at independently on each channel, and all 0 detection is performed to indicate whether musical tone is being generated or not. It has a function to send channel state data CH3T' ((to the sub microcomputer SμC (1o4). Also, n5e (1os) is a channel-independent fast damper request sent from SμC (104). When it receives a signal, it has the function of attenuating the musical tone being produced in a short time.This first damper function is a DSG (10
This can be easily achieved by manipulating the envelope data in 5). Further, the signal FDP sent from the SμC (104) is ANDed with the inverted value KD of the key-on/off data KD of the corresponding channel, and the data K
When D is on, the first damper is not applied. [2] Sub-microcomputer input data format Figure 2 shows the main microcomputer VμG (1
o1), sub-microcomputer SμG (
This is a 10-step map of data transfer to 104). 3-6 are data format diagrams of the data shown in FIG. 2. Sound control data SOD is note data N
It consists of TD, octave data OTD, and key data KD, and OTD and NTD are digital sound
The signal is sent to a generator DSG (105), which generates a musical tone having a basic pitch, timbre, and envelope corresponding to the note name. The key on/off data KD is sent to the DSG (105) to control the start and end of sound generation. The pitch control data POD is note data NTD and octave data OTD, and is data that is given independently to the bi-sochi deviation channel from the determined basic pitch. Level Control - Data LC is data that sets the level of the musical tones to be sounded independently of each channel. The timbre selection data TSD is data that determines which timbre memory area on the waveform data memory is selected.
Up to 16 types of tones, such as guitar, can be selected independently for each channel.O Vibrato file data TEN is data for specifying on/off of vibrato for each channel. Glide invalid data C and EN are data that designate on/off of glide independently of each channel. Effect control data gang, data DVIB that specifies delay vibrato on/off, vibrato depth data vnp that specifies the depth of vibrato in 4 levels, and vibrato frequency data VFD that specifies the frequency of vibrato in 4 levels. , damper on/off data DMP that specifies damper on/off, and tremolo on/off data TR that specifies tremolo on/off.
It is composed of M and data GL specifying on/off of glide. [3] Data transfer method Next, the main microcomputer yμC1 (1
01) to sub-microcomputer SμG (104
) will be explained below. FIG. 6 is a block diagram of a data transfer device that implements the data transfer method used in the musical tone generation system of the present invention. The main microcomputer (201) transfers data to the sub microcomputer (203) via an 8-pit data bus DB. The data on the data bus is transferred to the main microcomputer MμG (2
The transfer flag TRF sent from 01) distinguishes between addresses and data, and determines the order of data. The reception and reception of data by the sub-microcomputer SμC begins at R when the RS Frinov block' (202) is set by the interrupt request signal WH sent from the main microcomputer MμC.
The process ends when the RS flip-flop (202) is reset by the reset signal sent from 3T. FIG. 7 is a functional block diagram of the data transfer device. The data sending device (306) is a sound generation control/f-
data generation means (301) for generating evening SCD, pitch control data PCD, etc.;
data output means (304) that sends the data generated by (301) to the data receiving device (312);
and before data output, transfer flag T'RF? : TRF output means (303) that sets a predetermined value and sends it out; timer means (302) that controls the timing of data output by the data output means (304); On the other hand, it is constituted by an interrupt request means (305) that sends an interrupt request signal. The data receiving device (312) is a data transmitting device (306).
) receives the interrupt request signal sent from the data input means (308), puts the data input means (308) into a full interrupt processing state, and when the data input is completed, the interrupt control means (309) enters the interrupt standby state, and the TRF input means (307). ) is sent from the data input means (30
8) and a data storage means (310) for distinguishing the data sent from and storing the data. The above data transfer device is configured as 8o49 as shown in Figure 6.
The flow chart of the program is shown in FIGS. 8 and 9 when it is realized on a microcomputer such as the following. FIG. 8 is a flowchart showing the operation of the data transmitting device realized by MllC(2o1), and FIG.
3 is a flow chart showing the operation of the data receiving device realized by C (203). There are two types of data transfer programs for MgO (201). Figure 8 (2L) is a flow chart of the block transfer method that transfers multiple words of data at once, and Figure 8 (b) is a flow chart of the block transfer method that transfers multiple words of data at once. Data 'f:% is a flow chart of a word transfer method for transferring to a fixed address. In the case of the block transfer method shown in FIG. 8(a), in advance,
Assume that 24 words of block data (SOD, PCD, LCD) are continuously stored in the memory on MgO (201). In the process (401), an address counter is set at the beginning of the block data area of the memory on Mμ((201), and in the process (402), the transfer 7 lag TRF-' O
'('O' outputs a logic 0 (represents 5) and initializes it. In the process (403), an interrupt request signal WR is output to the SμC (203), and then in the process (404)
) indicates the start of block transfer. Data 0O
Output H (H represents a hexadecimal number) and process (405)
Then, the flag TRF=' indicating that the next data is to be sent is set.
Outputs 1'('1' represents logic 2),
In the process (406), by waiting for a certain period of time,
SμC (203) suspends all transmission of the next data until it becomes possible to receive all of the next data. Next, in processing (407), data is read from the block data area of the memory on MllC (201), and processing (
At step 408), the data is sent to SμC (203), and at step (409,), the memory address counter is incremented. Thereafter, for the same purpose as the above processing (4oe), the processing (
410) and wait for a certain period of time. In the process (412), it is checked whether the address counter has been incremented to the final address. For example, 8 of SOD, POD, LCD
If we transfer word data in blocks at the same time (4
The processes from 07) to (411)'j are repeated 24 times. In the case of the word transfer method shown in FIG. 8(b), the process (413)
Set the address data to be output with and process (414
), the flag TRF=' indicating sending of address data is set.
O”jib is output, and SμC (2o3
) and outputs an interrupt request signal WRi to the process (416
), the address data is output, and in process (417), the process waits for a certain period of time for the same purpose as the process (406) described above. Next, a flag TRF −' indicating that data is to be sent
1', and in the process (419) interrupt request signal WRi is output.
output, process (420) output the data, process (42)
In step 1), wait for a certain period of time for the same purpose as the above-mentioned process (4oe). FIG. 9 shows that MgO (201) sends out data Sμ
C (203) shows a flowchart of an interrupt mill when receiving. When the interrupt routine is entered in response to the interrupt request signal WR from M It C (201), data is first input in processing (501), and the input data is outputted in processing (502).
It is checked whether it is OH or not, and if it is ooE, it is determined that a block transfer is to be started and the process (SO4) is executed, and if it is not OOH, it is determined that it is a word transfer and the process (61s)'r is executed. In the case of block transfer, in step (504), address counters of the SOD, POD, and LCD memories in which data is to be stored are initialized. The memory map of the memory in SμC (203) is shown in FIG. 1o. The data format of the data described here is the same as the data format explained in FIG. 4 from addresses 20H to 3FH. Next, in the process (505), the flag TRF changes from '○' to '1'.
After waiting until the value changes to ', data is inputted in a process (506) and stored in the memory shown in FIG. 10 in a process (507). Next, in process (5oa), the address counter is fully incremented, and in process (509), after waiting until the flag TRF is inverted, the address counter is fully incremented, and it is checked whether the address counter exceeds the last address. Check whether the address
It checks whether the counter is 38H or not and executes C process (505) or process (514). When the address counter is not 38H, again (606
) to (512), and when the address counter reaches 38H, in the process (514), the interlaced flip-flop (RS flip-flop in FIG.
202)) is output, and the process is ended. In the case of word transfer, in the process (516), the process (6
01), enter the input data at address (517),
Input the data, and in the process (518), process (51
Based on the address data saved in 5),
The data is stored in the memory, and finally, in a process (519), the interlaced flip flow jib is reset. FIG. 11(a) shows the transition from MgO(201) to S/IG(
203) is a timing chart when performing Hebronok transfer, and FIG. 11(b) is a timing chart when performing word transfer. Note that the signal names in the figure match the signal names in FIG. 6. In FIG. 11(a), from M7zC (201) to Sμ
When the interrupt request signal WR is sent to SμC (203), SμC (203) enters I'i interrupt processing, and DB
It determines that it is a block transfer by looking at the data 0OHj5 on the bus, receives the data sequentially while looking at the transfer flag TRFO value, and transfers data from data 5CDo to data L CD.
When all 24 data up to 7 are received, signal R8
The RS flip-flop (202) is loaded by T and enters the interrupt standby state. Note that the signal INTfi, RS flip-frog (202
) is an interrupt request signal sent from SμC (203) and is held until reset by signal R5T. FIG. 11(b) Nioite, MgO (201) sends an interrupt request signal WRiSμG (203), and then D
Send address person DRi via B bus, flag TRF
After inverting, data DATA is sent to SμC (203). SμC (203) receives data DATA (R
The S flip-flop (202) is reset and the process returns to normal processing. Block transfer and word transfer are performed at the timings described above. Nao MgO (1o1) in the musical tone generation system of the present invention
) to SμC (104), block transfer is used for data with a large number of words and high transfer frequency such as SCD, PCD, LCD, etc., and data with a small number of words and low transfer frequency such as TSD, EFT, VBIC, etc. uses word transfer. In other words, when transferring a large amount of data at once at the same timing, block transfer, which does not require address transfer, is advantageous, and when transferring a small number of data at separate timings, word transfer is advantageous, so these two methods are advantageous. By using different transfer methods depending on the data to be transferred,
Transfer processing that requires less CPU occupancy time can be realized. (4) Processing of the sub-microcomputer The sub-microcomputer SμG (104) generates sound generation control data 5OT for the digital sound generator I)S (. (105))
, control when switching the tone selection data TSD, processing to create frequency data FQD-ii corresponding to the fundamental frequency based on data 5ICD, control of delay vibrato, tremolo addition processing, glide addition processing, Output processing of various data to the DSG (105) is performed. [5] Input/output data format of digital sound generator FIG. 12 is a process map showing the input/output format of data between S μC (104) and DSG (105). X
10 address 44H channel state data is:
I) This is data that indicates that SG (105) is currently generating sound, independently of the channel, and from DsG (1o5) to SμC
(104). All other data are 37zC
(104) to the DSG (105). The sound generation control data SOD is exactly the same as the data format diagram shown in FIG. 3 when data is transferred from the M/IC (101) to the SμC (104). Level control data 1. CD, tone selection data TSD, envelope data ENY are the fourth
The data format is similar to the one shown in the figure when transferring from MgO (101) to SμC (104). FIGS. 13(a) to (C) are data formats of frequency data FQD sent from fl, 57zC (104) to DSG (105). Data FQD is 8 channel independent data with 1 word consisting of 13 bits, and the lower 8 bits and upper 5 bits are transferred sequentially and sent to the DS.
G (105) outputs a musical tone signal with a period corresponding to this data FQIIO value. Figure 13 (dj) and (d2) show damper on/off/
The data format of the data DMP is shown. Figure 13 (el) and (e2) are the first damper data FD.
It shows the data format of P, and data FDP
is data that requests a fast damper independently for the 8 sound generation channels generated by the DSG (105). S for a channel with DSG (105)
When a fast damper is requested from μC (1o4), DSG (105
) causes the musical tone to decay in a shorter time than normal musical tone decay. The shorter the decay time of the first damper, the faster the next new musical tone will be generated, but if it is too short, it will sound like a click, so it must be set to an appropriate time. FIGS. 13(fj) and (f2) are data format diagrams of the above-mentioned channel state data CH3T. (6) Sound production control data allocation processing SμC
The control of the sending timing of the sound generation control data SCD from (104) to DSG (105) will be explained below. FIG. 14 shows MgO (1o1) in FIG. 1. 57zC (104) and DSG (106) are viewed as one system for controlling sound generation. FIG. The SCD generator (eol) actually uses MgO(10
1) This is a generation device for generating sound control data SCD, which is realized by the above software. Sound control device (6
00) is a data SCD allocation timing control means realized by software on the SμC (104), and the musical tone generator (604) is a DSG (105).
corresponds to The sound control device (6o○) is the SCD generator (SOl)
receives the data SOD sent out from the musical tone generating device (604), looks at the channel state data CH8T-i sent out from the musical tone generating device (604), and sends the data SCD to the musical tone generating device (604).
604) and a musical tone generator (604).
If the corresponding channel is generating sound, the first damper request means (eos) requests the first damper from the corresponding channel. FIG. 16 is a detailed functional block diagram showing the functions of the sound generation control device (6oo). 5 CDs of data generated by the SCD generator (SOl)
ij, is transferred using the block transfer method described in the section of the data transfer method above, and is stored in the SCD storage means (eoe). Data SO stored in SCD storage means
D is transferred to the assignment flag generating means (607). Assign flag generation means (807) l-iscDSC
Store data 5CDi from D storage means e),
It has all the functions to turn on all assignment flags when the data SCD changes. This assignment flag is a flag that requests the SCD output means (609) to output the data SOD,
When new data SCD is output, the SCD output means is reset. As shown in FIG. 3, the sound production control data SCD includes note data NTD and octave data O.
Consists of TD and key on/off data [D], data NTD, data 0TDid, and the basic pitch of the musical tone to be sounded. The timbre and basic envelope are all determined, and the data KD controls the timing of the start and end of sound generation. However, data SCD with data KD off is the musical tone generator (604)
Even if the tone is sent out, the sound does not end immediately, and the output of the musical tone becomes zero after a specific release interval. The KD determination means (eos) is the SCD storage means (606
) All on/off determinations are made for the data KI) in the data SCD stored in the data SCD. The CH3T determination means (elo) receives the channel state data CH3Ti sent from the musical tone generator (604), and when the assign flag is on and the output of new data SCD is requested, a first damper request is issued. The means (603) is controlled to request the musical tone generator (eo4) for a first damper. The SCD output means (609) is the KD determination means (605)
, the SCD storage means (6o6) based on the signals from the assignment flag generation means (607) and the CH3T determination means.
), the data SCD'i stored in the musical tone generator (
At the same time, the first damper request means (603)i is controlled to reset the first damper request. At the same time, VCC: 5OD (currently 5CD)
The storage means (eoa) has a function of storing the same data as the output data SOD. Further, when a signal indicating key-on is sent from the KD determining means (605), the SCD output means outputs the data 1SOD.
It has a function of resetting 17) the data KD of the current SOD data C3CD stored in the C8CD storage means and outputting the data KD before outputting the data. In other words, in response to key-on, key-off processing is always performed before data SOD is output. Therefore, from the SOD generator, data SOD with different key-on
Even if it is sent, after performing key-off processing for 4 seconds, new key-on data 5CDf is generated by the musical tone generator (604).
It is designed to be sent to. FIG. 16 is a flowchart of a program when the functions of the sound generation control device (600) are realized using a microcomputer such as Intel 8049. In the sound production control process, the internal memory of the microcomputer is used as a variable area. Figure 10 shows the sub-microcompico
104) is shown. In Figure 10,
The contents of the data from addresses 20H to 3FH are shown in Figure 3.
Since it is the same as the transfer data format between MgO (101) and SμC (104) in FIG. 6, the explanation will be omitted here. The assignment flag ASN is a flag that is set when the sound production control data SOD transferred from MlIC (1o1) changes, and is reset when the assignment of data SCD is completed, and is a flag for 8 channels. have an area. The old sound control data 05CD is a memory for realizing the function of the above-mentioned assign flag generating means (607), and the assign flag generating means (607) is
Compare the data SCD stored in the D storage means (606) and the data 08CD (old 5ep) in the oscn memory, and if they are different, set the assign flag SN'fr: and then set the 03CD memory. Rewrite to new data SCD. cscn (currently 5ep) memory is SCD output means (60
Data 5 sent from 9) to the musical tone generator (604)
CT) is a memory that monitors all statuses, and SCD output means (6
It is rewritten simultaneously with the output of data SCD from 09). Next, the flowchart shown in FIG. 16 will be explained. This flowchart shows one channel of basic processing for timing control of data SCD allocation. Processing (7oo) id, assignment flag AS on memory
Determine whether it is on or off by looking at N'i, and if it is off, data SO
This process does not allocate D, and if it is on, executes the entire routine for the allocation process of 5CI).
01), the SCD key-on/off data KDi is checked, and if the key is off, data 5CDi is output as is, and if the key is on, SCD key-off processing is performed in step (702). The SCD key-off process reads data cscn from the cscn (current SOD data) memory, outputs the cleared data KD-i, and performs the key-off process. By this process, key-on data S
When the CD is output, that is, new data 5CDK
A key-off process is always performed before the corresponding sound is produced. Therefore, even if different key-on data SCDs are sent successively from the M7zC (101), key-off processing is always required, and each time a new data SCD is output, the DSG (105)
, it is recognized as new pronunciation information. In the process (703), when looking at the channel state data CI (ST) sent from the DSG (105), if data CH6T is on (sounding), the process (709)
In step (704), first damper data FDPi is set, and if data CH3T is off, data FDPi is cleared in step (704), and data 5CDf: is output in step (705). Next, in processing (706) 03GI
) Memo lJ[, data SC output in processing (end 05)
Write D, and in process (707) assign flag A
SN-i is cleared to indicate that data SOD allocation has been completed. In the process (70B), process (704). (709) f manipulated data FDP as DS(r(10
6) Output. Figure 18 shows the DSG during SOD allocation timing control.
(105) is a timing chart showing input and output. FIG. 18(a) shows SμC(104) to DSG(1
Figure 18 (+)) shows the output to SμC (10
4) shows the input. KD in FIG. 18 (2L) represents key-on/off data KDi in data sen, and FDP represents first damper data FDPi. AOUT in FIG. 18(b) represents the amplitude of the analog musical tone output signal of the DSG (105), and CH5T is
Channel state data G indicating that sound is being generated
H, S T : represents i. In FIG. 18, data KD rises at time (800), and signal AOUT also rises accordingly. Next, at time (801), when the data KD falls, the signal AOUT enters the release section and attenuates. In this state, the next data SCD'j is sent from SμC (104)
Fast damper data FDP is turned on to allocate z. The signal AOUT then enters a faster damping state than the release state, ie, fast damper mode. After that, at time (802), signal MOUT becomes zero and data CH3T turns off, SμC(10
4) sends a new day 1 SOD at time (803),
Thereafter, at time (804) the data F D P i IJ
The upper set will come. This new data SOD allocation and
Data FDPs cannot be reset at the same time if serial processing microcomputers are used. Furthermore, if the FDP off data is performed before the data SOD is assigned, it is necessary to send data FDP'(i) every time for each channel.・The data is transmitted after the transmission of the data SCD for 8 channels is completed, and in the section (805), the signal FDR, which is the logical product of FDP and KD, is set so as not to enter the fast damper mode. DSG (
105) Used internally. The above-described processing is performed independently for the 8 channels to realize control of the data SCD allocation timing independently of the channels. When the above-described sound generation control processing is performed on the SμC (104), there are the following advantages. ■Sound control data SOD is SμC (10
4) Since the data SOD of Mg2 (1o1) is held and then transferred to the digital sound generator DSG (105) at a predetermined timing, there is no restriction on the sending timing of the data SOD of Mg2 (1o1).・Processing becomes easier. ■ In SμC (10, 4), when assigning new data SCD' (5) to the channel that is currently sounding, a fast damper request is made to the corresponding channel to quickly dampen the musical tone that is currently sounding, and also Since new data 5an6 is allocated after confirming the end, new pronunciation can be performed in the shortest possible time without causing click noise. [7] Forced mute X processing forced mute flag generator (611) is the tone selection
A forced mute flag is generated to quickly attenuate the musical tone being generated in the musical tone generating device (6o4) when the data TSD is switched or when the musical tone generating system itself is reset. In FIG. 15, the forced silencing control means (612) in the sound production control device (eoo) receives the forced silencing flag, and the SC
D output means (609) or cscp storage means (808)
The data KD of the data cscD stored in
It has a control function to send out a damper request signal. FIG. 17 is a flowchart of a program in which a forced mute function is added to the program on the sound production control device (eoo) of FIG. 16. Note that the sound generation control data 5cnl shown in FIG. 3 is used for the signal specifying forced silencing sent from MgO (101), and the forced silencing mode is defined when data SCD,=OOH. In FIG. 17, in the process (710) the data S CD
,=OOH or not, and if the data is SOD\OOH, normal SCD allocation processing is performed, while data 5C
If D=00H, the first damper data FDP is set to the corresponding Viratra in the process (711), and the key-off process of the data SOD is performed in the process (712). This key-off process is similar to the key-off process in step (702). The above-mentioned silencing process is performed using MgO (1o
1) Forced mute request signal (data 5CD=OOH)
This is achieved by allowing musical tones to disappear smoothly when changing tones or resetting the system. Note that forced muting when changing tones, etc., is performed using SμC.
In step (104), a memo IJi storing the timbre selection data TSDi may be provided and the forced mute processing may be entered by comparing the old and new data TSDi. [8] Vibrato addition processing The vibrato addition processing performed in SμC (1o4) will be explained. The vibrato addition process in the musical sound generation system of the present invention is capable of adding a vibrato effect only to a specific channel, and detects key-on only in the channel to which the effect is added, and detects at least one key-on. Sometimes it starts a delay vibrato. The vibrato addition process is performed using the software on SμC (104).
FIG. 19 is a functional block diagram when viewed as one device having the function of SμC(104)'i vibrato addition. The vibrato adding device (903) is a device having a vibrato adding function realized by software on the SμC (104), and includes an SCD generating means (900), a vEN
, DVIB generation means (901) ij, MgO (101)
The musical tone generator (915), which is a function realized by the above software, corresponds to the DSG (10B) in FIG. The SCD generating means (900) has a function of generating sound generation control data SCD, and the function of generating sound generation control data SCD is VEN, DVIB generating means (901) [, delay vibrato on/off in the effect control data ECD explained in FIG.・Data DV I Bi stage setting function and vibrato enable data VKNf setting explained in Fig. 4,
It has a function to specify which channel out of 8 channels should be turned on with vibrato. All of these functions are based on MgO (101
) is realized by the software above. The vibrato adding device (903) is a device realized by software on the SμC (104), and includes the SCD storage means (905) and the TEN. The DVIB storage means (90B) corresponds to a memory that stores data transferred from the MgO (101), and the first
This corresponds to the memory shown in the memory map in Figure 0. On-key data generation unit (906) [, SCD storage means (905)] Looks at the key-on/off data KDQ in the stored data SOD and indicates which channel is key-on among the 8 channels. Generate on-key data ONK. The key-on start flag KO8 generation unit (907) generates data o*x and vxN generated by the ONK generation unit (906), vibrato enable data VEN (first Figure 4 (d
)), take the logical product for each channel, and judge whether all channels become zero or not. It is determined whether or not there is a key-on channel among the vinyl-on channels, and this is set as a start flag for adding delay vibrato common to all channels. The vibrato data reading means (910) uses a vibrato address counter (911) whose address tv update timing is controlled by the timer means (913).
)'i has a function of reading vibrato data from the vibrato data memory (909) in which the vibrato data is stored. FIG. 2o is an example of vibrato data stored in the vibrato data memory (909). The horizontal axis shows memory addresses, and the vertical axis shows data values. This vibrato data is stored as iPcM data for 7 delayed vibrato waveforms, and each waveform consists of 64 samples, and the last 64 samples (maximum amplitude sine wave) are the normal vibrato mode. It is read when . In addition, the key on-start signal sent from the KO8 generator
When the flag KO8 is turned on and the data DVIB stored in the DVIB storage means (90B) is turned on, the vibrato reading means (910) reads the first address of the vibrato data memory. It has a function to sequentially read out vibrato waveforms. At this time, the DVIB address counter (cz2) Fi
, v by the overflow of the address counter (911) every 64 counts, and is used when reading out the delay vibrato waveform. The output data of the vibrato data reading means (910) is added to the basic pitch data sent from the basic pitch data generating means (904) in the adding means (914) to form logarithmic pitch data and ICIP converting means (915), the musical tone generator (915) performs index conversion.
16). Note that, based on the note data NTDi in the data SOD stored in the basic pitch data generation means (904) i and the SCD storage means (905) IC, it corresponds to any pitch from C note to B note. It has the function of generating basic pitch day 4. On the other hand, SC
The frequency corresponding to the octave data OTD in D is controlled by the number of samples in one period, as shown in FIG.
In addition, the frequency data FQD[, which is generated by the index conversion means (914), is sent to the musical tone generator (915) in the format shown in the I10 map in FIG. 21 to 23 show the above vibrato addition process 6s.
It is a flowchart of a program when realized by software on μG (104). The vibrato addition process is divided into a process of changing the vibrato data read address at fixed time intervals using a timer, and a process of starting a delayed vibrato and reading the vibrato data asynchronously. FIG. 21 is a flow chart of a program for starting delay vibrato and reading vibrato data. First, in the process (920), vibrato frequency data VFD' in the effect control data KCD shown in FIG.
i and the corresponding timer data CYCLEi
set. This timer data CYCIIC is data that defines the processing interval of a routine whose processing timing is managed by a timer, and the speed of the vibrato is determined by this data. In the process (921), the delay vibrato on/off data DV in the data KCD is checked, and if it is off, the delay vibrato address is set in the process (935).
Set counter DCOUNT to 6. Vibrato data read address V A D R
fi, the above delay vibrato address counter]:1OUNT, and the vibrato address counter "/C0UNT, it is calculated as follows: VADR=DCOUNT-e4+VcOUNT...
1) In processing (921), f-ta DVIB75;
When it is determined that it is on, in a process (922), the logical product of the vibrato enable data EN and the on-key data ONK shown in FIG. 4 is calculated. The on-key data ONK is formatted as shown in FIG.
This data consists of 8 channels of key-on/off data KD in the data SCD output to 04), and the data SCD corresponds to channels 0 to 7.
It shows the contents of the data KD inside. FIG. 25 shows the sound generation control processing program in FIG.
2 is a flowchart of a program incorporating data ONK generation processing. Processing (713); In (715), bits of the on-key data ONK corresponding to the channel currently being processed are cleared, and in processing (714), all bits of the data ONK corresponding to the channel currently being processed are set. Here, we will return to the explanation of the flow chart of the vibrato addition processing program in FIG. 21. In the process (922), if the result of logical product of data vEN and data ONK is set as key-on start flag KO3, when all channels are key-off among the channels whose vibrato is turned on, flag KO8 is set as follows. OOH when at least one channel is key-on
do not become. In this example, the data K of the channel where vibrato is on is
Only when D changes from all 0's to anything other than all 0's, processing is executed to enter delay vibrato mode. Processing (923) T, 7 Rough K If the OS determines that it is OOH, delay, vibrato,
When the start flag DST'i is cleared and determined to be on, the counter l1lOU is cleared in processing (925).
Clear NTi and process (926)
otrN'rl is cleared, and flag DST is inverted in processing (927). FIG. 26 is a timing chart showing the above-mentioned delayed vibrato start processing.
) changes from OOH to other than OOH, counter D
cOUNT and VC0UNT are cleared, and at the same time the delay vibrato start flag DST is set at time (1021). Then time (1022)
When flag KO3 becomes OOH, flag DST
is cleared at time (1023). In other words, once one channel is key-on and delay vibrato starts, delay vibrato will not start for subsequent key-ons, and once all channels are key-off, a new Delay vibrato starts at the first key-on. In the flowchart of FIG. 21, the process after step (928) is a routine for reading vibrato data. When the delay vibrato address counter is O in the process (928), the vibrato data is set to O in the process (933). In this embodiment, the delay vibrato waveform as shown in FIG. Instead of reading, vibrato data is set to O in advance. This not only increases the processing speed, but also allows the portion of addresses 0 to 63 to be used for program memory and the like. The process (929) is a process to calculate the vibrato data address, and the calculation as shown in equation (1) is executed to obtain the read address VADR, and the process (930)
The vibrato data is read out based on the address data VADR. Processing (931) is a part that controls the amplitude of the read vibrato data, and performs conversion according to the vibrato depth data VDP shown in FIG. 6. This process is realized by repeatedly using bit shifting and addition, and without multiplication, the amplitude is A1%, V4
vibrato data can be easily obtained. The resulting vibrato data is added to the basic pitch data in a process (932). Also, as mentioned above, delay vibrato on/off
When data DVIB is off, process (935) 75
E is executed and the counter DCoUNT=6 is set, so that the last waveform in FIG. 2o is always read out. Figure 22 shows the vibrato address counter VCOUN
T, delay vibrato address counter D,
12 is a flow chart showing a process of periodically updating C0UNTi. Here, the subroutine TIMER (1oo3) is periodically executed by a timer, as shown in the flow chart of FIG. In FIG. 23, SμC
Various initial settings related to (104) are performed. Next, in process (1oo1), various processes such as data SOD allocation are performed, and in process (1002), the timer flag is referred to to see if the timer has overflowed. When the timer flag is turned on, subroutine T I
MER (1003) is executed, and the timer is initialized in this subroutine. By repeating such processing, sub-route f7T IMKR (10
03) or is executed periodically. In FIG. 22, in the process (1004), the timer data 1cYcLEiJ explained in the process (920) in FIG.
Save now, initialize the timer, and process (1005
), increment the counter VCOUNTi and process (
At 10o6, the counter VCOUNT is 6'7! If the counter VCOUNT = 64, the counter VcCOUNT is cleared in step (1007), and in step (1009), it is determined whether the counter DCOUNT is 6 or not, and the counter DCOUNT\ 6, the counter DCOUNT (H) is incremented in the process (1010).The counter DCOUNT is initially set to 0 in the asynchronous routine explained in FIG. D.C.O.
It is incremented until UNT=6. Further, the counter VCOUNT is incremented every time in the subroutine TIMEH, and the counter VCOUNT-6 is incremented every time.
When it reaches 4, it returns to the counter vCOUNT-O. Through the above processing, the function of the vibrato adding device is realized on the SμC (104).

[9] Tremolo control processing FIG. 27 is a functional block diagram when a tremolo control means capable of synchronizing with vibrato is realized by software on the SμC (104). The TRM generation means (1030) is a function realized by software on the MpG (101), and generates tremolo on/off data TRM (R
(on OD) all occur. The tremolo control means (1032) receives and stores the transmitted data TRM'i from the TRM generation means (1030).
33), SOD storage means (1036) for storing 5CDi of data sent from the SCD generation means (1031) realized by MgO (1'o1) upper software, and on-key・Data ON
ONK generation means (103B) that generates K and data ON
K generates key-on start flag KO3 from K
When the O3 generation unit (1034) and the data TFtM are on, the tremolo flag TMFi is generated under the control of the timer means (1037), and at the timing when the flag KO3 changes from OOH to 100H, the tremolo flag TMFi is generated. It is composed of TMF generation means having a function of initializing flag TMFi. Tremolo adding means (1o4o) u, low-pass filter LPF (1041) that filters the tremolo flag TMF (fixed period rectangular wave) sent from the tremolo control means
The musical tone generator (1044
) consists of a voltage-controlled amplifier VCA (1042) that controls the amplitude of the analog musical tone output output from the
VCA (1042) C: + output 1d, a musical tone reproducing device (1043) comprising an amplifier, speaker, etc. produces sound. Timer means (1037) of tremolo control means (1032)
), KO3 generation means (1034). ONK generation means (1038) SOD storage means (10
35) and the like with the vibrato adding device (9\03) (Fig. 19), a tremolo synchronized with vibrato can be obtained. All functions of the above-mentioned tremolo control means (1032) SμC (
The flow chart of FIG. 22 shows the flow of processing when realized by software on the 1OA). Most of the processing has been explained in the section on vibrato addition processing, so only the differences will be explained. In the process (1006), the vibrato address counter V
When COUNT reaches 64, the tremolo flag TRFi
Generated subroutine TRMSICT (100B)i
Execute. When the counter VCOUNT is not 64, the tremolo on/off data TRMi is
If the data TRM is on, process (1012)
It is determined whether the counter VCOUNT=32 or not, and if the counter VCOUNT=32, the sub routine TRM
Execute SKT(1o1s)i. In other words, when the data TRM is on, the counter vCO
When UNT-32 and counter vCOUNT=64, subroutine TRMSET (1014) is executed. Subroutine TRMSET (1014) has the function of always turning on flag TMF when data TRM is off or when counter DCOUNT=O, and inverting flag TMF when data TRM is on. In the process (1015), the data TRM is determined,
If it is off, unconditionally set flag TMF to on,
If it's on, place 8! (1016), the counter D
Determine whether COUNT=o or not, if 0, process (IC)
19) Execute i, and if it is not O, in process (1017),
tremolo. Check whether the flag TMF is on or off, and if the flag TMF is on, turn off the flag TMF in the process (1018),
If flag TMF is off, flag TMF is set in processing (1019).
Turn on MFi and output. FIG. 28 is a timing chart showing the timing of tremolo control processing. The tremolo flag TMF is always on when the tremolo on/off data TRM is off, and when the data TRM is turned on, the flag TMF is inverted every A cycle of the vibrato waveform VIB. Key-on start flag KO5 is 10 from oOH
When OHI/C occurs, the flag TMF starts from the on state. At the same time, delay vibrato starts. LPFOUT indicates the output signal of the LPF (1041), which is the output obtained by filtering the flag TMF. Kono L P F OUT IC Yotte, V CA (
1042) and apply tremolo. Effects of the Invention As is clear from the above description - A1, the musical tone generation system of the present invention is equipped with a generation device that generates tone generation control data S (D) that specifies the scale and generation timing of musical tones to be generated. and new sound generation control data SCD to the channel in which the musical tone generator is currently generating sound.
When assigning a first damper, a first damper request signal is sent to the musical tone generating device to quickly attenuate the musical tone being generated, and when the musical tone generated by the musical tone generating device is sufficiently attenuated, a first damper request signal is sent from the sound generation control data generating means. The sound generation control device that transfers the sound generation control data that has been generated to the 5CDi musical tone generator, and the sound generation control data S
It consists of a musical tone generator that generates musical tones based on a CD, so when new data 5 CDi is output to a channel that is currently generating sound, a first damper request is made to the corresponding channel and the musical tone that is currently being generated is output. In addition to quickly attenuating the sound, new data 5CDf is allocated after checking the channel state data CH8Tf, which indicates that a musical tone is being generated, to confirm that sounding has finished, so that the sound can be heard in the shortest possible time without causing click noise. In time, new data 5CDQ can be allocated. Note that when the musical sound output of the musical sound generator reaches an amplitude of 0, it can be considered that the sound generation ends, but if the click is within a reasonable range, the sound generation ends when the musical sound output falls below a certain value larger than the amplitude of 0. It can also be regarded as the end of sound generation, so if you set the amplitude level of the musical tone output that determines the end of sound generation to an appropriate value, new data SOD' (i7) can be assigned in a shorter time. Furthermore, the sound generation control data ( sep) The allocating means is the data 5GDf sent from the SCD generator.
A first SCD storage means for storing data, and an assignment function that is set when the data SCD stored in the first SCD storage means is completed and reset when the data SCD is sent to the musical tone generator. Assign flag generating means that generates a flag, and determines whether key-on/off data (KD) in the data SCD is on/off and outputs the SCD.
KD determination means for controlling the output means, and CH for determining on/off of channel state data (CH8T) sent from the musical tone generator and controlling the SCD output means.
3T determination means, SCD output means for outputting data SCD to the musical tone generator based on signals from the KD determination means, the assignment flag generation means, and the CH3T determination means; The data KD in the data SCD stored in the second SCD storage means is configured by a second SCD storage means for storing 5CD-jz, and the data KD in the data SCD stored in the second SCD storage means is outputted from the SCD output means. By configuring it to be turned off and transmitted, from the SCD generating means,
Key on/off data KD is on different data SO
Even if D is sent continuously, the SCD generation means automatically sends data 5CD-i5 with data KD turned off.
Data SC with D off: There is no need to send D-i, and the effect of simplifying processing can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a musical tone generation system according to an embodiment of the present invention, FIG. 2 is an I10 map between main microcomputer MμC and sub-microcomputer SμC, and FIGS. 3 to 5 are , a format diagram of data transferred between MgO and SμC, FIG. 6 is a block diagram of the data transfer device, FIG. 7 is a functional block diagram of the data transfer device, and FIG. 8 is a flowchart showing processing of the data transmission device. FIG. 9 is a flow chart showing the processing of the data receiving device, FIG. 10 is a memory map of the memory in the SμC, FIG. 11 is a timing chart of the data transfer device,
Figure 12 shows the 107th step between SμC and DSG.
The figure is a format diagram of data transferred between SμC and DS (14171). Figure 15 is a functional block diagram of the sound generation control device, and Figures 16 and 17 are flow charts showing the processing of the sound generation control device. , FIG. 18 is a timing chart showing the input and output of the digital sound generator DSG, FIG. 19 is a functional block diagram of the vibrato adding device, FIG. 20 is a graph showing the contents of the vibrato detector memory, and FIG. 21 to 23 are flow charts showing the processing of the vibrato adding device and the tremolo control means;
Figure 4 is a format diagram of on-key data, and Figure 25 is the on-key data generation process? A flow chart showing,
FIG. 26 is a timing chart of the vibrato adding device, FIG. 27 is a functional block diagram of the tremolo control means, and FIG.
FIG. 8 is a timing chart showing tremolo control processing. 101... Main microcomputer, 10
4...Sub microcomputer, 105.
...Digital sound generator, 10
7... Amplitude modulation unit, 600... Sound generation control device, 601... SCD generator, 602...
... SCD allocation means, 603 ... First dance request means, 604 ... Musical tone generation device, 6
05...KD determination means, 606...S
OD storage means, 607...Assign flag generation means, 60B...cscn storage means, 609...
. . . SOD output means, 610 . . . CH3T determination means, 611 . . . Forced silencing flag generator, 612
...Forcible silencing control means, 900...
S CD generation means, 901-=・TEN, DV I
B generating means, 903... vibrato adding device, 904... basic pitch data generating means, 9
06...ONK generation means, 907...K
O3 generation means, 909...Vibrato data...
Memory, 910... vibrato data reading means, 911... vibrato address counter, 912... delay vibrato address counter, 913... timer means, 914...
... Addition means, 916 ... Index conversion means, 9
16...Music sound generator, 1031...
SOD generation means, 1032...Tremolo control means, 1034...KO8 generation means, 1036.
... TMF generation means, 1037 ... Timer means, 1040 ... Tremolo addition means, 104
1...Low pass filter, 1042...
・ilt pressure M type amplifier, 1044... musical tone generator. Figure 2 (I: LrCl1ln Go to Figure 4 O U) Go to c3 A' 6th
Figure 7 Figure 8 (al <
b) Fig. 9 Fig. 1θ Fig. 16 Fig. 17 Fig. 18 Fig. Figure 25Figure 26

Claims (2)

[Claims] (1) When assigning new sound generation control data to the sound generation control data generator that generates sound generation control data that specifies the scale and sound timing of the musical sound to be generated, and the channel that is currently sounding the musical sound generator, A first damper request signal is sent to the musical tone generating device to attenuate the musical tone in a short period of time, and when the musical tone generated by the musical tone generating device has sufficiently attenuated, the tone generating control signal sent from the tone generating control data generating means is sent to the musical tone generating device. a sound generation control device that transfers data to a musical tone generator;
A musical tone generation system comprising a musical tone generator that generates musical tones based on pronunciation control data. (2) The sound generation control data generator independently generates sound generation control data for multiple channels, the sound generation control device independently controls sound generation control data for multiple channels, and the musical tone generator The musical sound generation system according to claim 1, characterized in that musical sounds are generated independently.